xref: /linux/drivers/gpu/drm/arm/malidp_drv.h (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
4  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
5  *
6  * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
7  */
8 
9 #ifndef __MALIDP_DRV_H__
10 #define __MALIDP_DRV_H__
11 
12 #include <linux/mutex.h>
13 #include <linux/wait.h>
14 #include <linux/spinlock.h>
15 
16 #include <drm/drm_writeback.h>
17 #include <drm/drm_encoder.h>
18 
19 #include "malidp_hw.h"
20 
21 #define MALIDP_CONFIG_VALID_INIT	0
22 #define MALIDP_CONFIG_VALID_DONE	1
23 #define MALIDP_CONFIG_START		0xd0
24 
25 struct malidp_error_stats {
26 	s32 num_errors;
27 	u32 last_error_status;
28 	s64 last_error_vblank;
29 };
30 
31 struct malidp_drm {
32 	struct drm_device base;
33 	struct malidp_hw_device *dev;
34 	struct drm_crtc crtc;
35 	struct drm_writeback_connector mw_connector;
36 	wait_queue_head_t wq;
37 	struct drm_pending_vblank_event *event;
38 	atomic_t config_valid;
39 	u32 core_id;
40 #ifdef CONFIG_DEBUG_FS
41 	struct malidp_error_stats de_errors;
42 	struct malidp_error_stats se_errors;
43 	/* Protects errors stats */
44 	spinlock_t errors_lock;
45 #endif
46 };
47 
48 #define drm_to_malidp(x) container_of(x, struct malidp_drm, base)
49 #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
50 
51 struct malidp_plane {
52 	struct drm_plane base;
53 	struct malidp_hw_device *hwdev;
54 	const struct malidp_layer *layer;
55 };
56 
57 enum mmu_prefetch_mode {
58 	MALIDP_PREFETCH_MODE_NONE,
59 	MALIDP_PREFETCH_MODE_PARTIAL,
60 	MALIDP_PREFETCH_MODE_FULL,
61 };
62 
63 struct malidp_plane_state {
64 	struct drm_plane_state base;
65 
66 	/* size of the required rotation memory if plane is rotated */
67 	u32 rotmem_size;
68 	/* internal format ID */
69 	u8 format;
70 	u8 n_planes;
71 	enum mmu_prefetch_mode mmu_prefetch_mode;
72 	u32 mmu_prefetch_pgsize;
73 };
74 
75 #define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
76 #define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
77 
78 struct malidp_crtc_state {
79 	struct drm_crtc_state base;
80 	u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
81 	u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
82 	struct malidp_se_config scaler_config;
83 	/* Bitfield of all the planes that have requested a scaled output. */
84 	u8 scaled_planes_mask;
85 };
86 
87 #define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
88 
89 int malidp_de_planes_init(struct drm_device *drm);
90 int malidp_crtc_init(struct drm_device *drm);
91 
92 bool malidp_hw_format_is_linear_only(u32 format);
93 bool malidp_hw_format_is_afbc_only(u32 format);
94 
95 bool malidp_format_mod_supported(struct drm_device *drm,
96 				 u32 format, u64 modifier);
97 
98 #ifdef CONFIG_DEBUG_FS
99 void malidp_error(struct malidp_drm *malidp,
100 		  struct malidp_error_stats *error_stats, u32 status,
101 		  u64 vblank);
102 #endif
103 
104 /* often used combination of rotational bits */
105 #define MALIDP_ROTATED_MASK	(DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
106 
107 #endif  /* __MALIDP_DRV_H__ */
108