1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2026 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #include <linux/irq_poll.h> 24 #include <linux/cpufreq.h> 25 26 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 27 #define CONFIG_SCSI_LPFC_DEBUG_FS 28 #endif 29 30 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 31 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 32 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 33 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 34 #define LPFC_RPI_LOW_WATER_MARK 10 35 36 #define LPFC_UNREG_FCF 1 37 #define LPFC_SKIP_UNREG_FCF 0 38 39 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 40 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 41 42 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 43 #define LPFC_NEMBED_MBOX_SGL_CNT 254 44 45 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 46 #define LPFC_HBA_HDWQ_MIN 0 47 #define LPFC_HBA_HDWQ_MAX 256 48 #define LPFC_HBA_HDWQ_DEF LPFC_HBA_HDWQ_MIN 49 50 /* irq_chann range, values */ 51 #define LPFC_IRQ_CHANN_MIN 0 52 #define LPFC_IRQ_CHANN_MAX 256 53 #define LPFC_IRQ_CHANN_DEF LPFC_IRQ_CHANN_MIN 54 55 /* FCP MQ queue count limiting */ 56 #define LPFC_FCP_MQ_THRESHOLD_MIN 0 57 #define LPFC_FCP_MQ_THRESHOLD_MAX 256 58 #define LPFC_FCP_MQ_THRESHOLD_DEF 8 59 60 /* 61 * Provide the default FCF Record attributes used by the driver 62 * when nonFIP mode is configured and there is no other default 63 * FCF Record attributes. 64 */ 65 #define LPFC_FCOE_FCF_DEF_INDEX 0 66 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 67 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 68 69 #define LPFC_FCOE_NULL_VID 0xFFF 70 #define LPFC_FCOE_IGNORE_VID 0xFFFF 71 72 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 73 #define LPFC_FCOE_FCF_MAC3 0xFF 74 #define LPFC_FCOE_FCF_MAC4 0xFF 75 #define LPFC_FCOE_FCF_MAC5 0xFE 76 #define LPFC_FCOE_FCF_MAP0 0x0E 77 #define LPFC_FCOE_FCF_MAP1 0xFC 78 #define LPFC_FCOE_FCF_MAP2 0x00 79 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 80 #define LPFC_FCOE_FKA_ADV_PER 0 81 #define LPFC_FCOE_FIP_PRIORITY 0x80 82 83 #define sli4_sid_from_fc_hdr(fc_hdr) \ 84 ((fc_hdr)->fh_s_id[0] << 16 | \ 85 (fc_hdr)->fh_s_id[1] << 8 | \ 86 (fc_hdr)->fh_s_id[2]) 87 88 #define sli4_did_from_fc_hdr(fc_hdr) \ 89 ((fc_hdr)->fh_d_id[0] << 16 | \ 90 (fc_hdr)->fh_d_id[1] << 8 | \ 91 (fc_hdr)->fh_d_id[2]) 92 93 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 94 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 95 (fc_hdr)->fh_f_ctl[1] << 8 | \ 96 (fc_hdr)->fh_f_ctl[2]) 97 98 #define sli4_type_from_fc_hdr(fc_hdr) \ 99 ((fc_hdr)->fh_type) 100 101 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 102 103 #define INT_FW_UPGRADE 0 104 #define RUN_FW_UPGRADE 1 105 106 enum lpfc_sli4_queue_type { 107 LPFC_EQ, 108 LPFC_GCQ, 109 LPFC_MCQ, 110 LPFC_WCQ, 111 LPFC_RCQ, 112 LPFC_MQ, 113 LPFC_WQ, 114 LPFC_HRQ, 115 LPFC_DRQ 116 }; 117 118 /* The queue sub-type defines the functional purpose of the queue */ 119 enum lpfc_sli4_queue_subtype { 120 LPFC_NONE, 121 LPFC_MBOX, 122 LPFC_IO, 123 LPFC_ELS, 124 LPFC_NVMET, 125 LPFC_NVME_LS, 126 LPFC_USOL 127 }; 128 129 /* RQ buffer list */ 130 struct lpfc_rqb { 131 uint16_t entry_count; /* Current number of RQ slots */ 132 uint16_t buffer_count; /* Current number of buffers posted */ 133 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 134 /* Callback for HBQ buffer allocation */ 135 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 136 /* Callback for HBQ buffer free */ 137 void (*rqb_free_buffer)(struct lpfc_hba *, 138 struct rqb_dmabuf *); 139 }; 140 141 enum lpfc_poll_mode { 142 LPFC_QUEUE_WORK, 143 LPFC_THREADED_IRQ, 144 }; 145 146 struct lpfc_idle_stat { 147 u64 prev_idle; 148 u64 prev_wall; 149 }; 150 151 struct lpfc_queue { 152 struct list_head list; 153 struct list_head wq_list; 154 155 /* 156 * If interrupts are in effect on _all_ the eq's the footprint 157 * of polling code is zero (except mode). This memory is chec- 158 * ked for every io to see if the io needs to be polled and 159 * while completion to check if the eq's needs to be rearmed. 160 * Keep in same cacheline as the queue ptr to avoid cpu fetch 161 * stalls. Using 1B memory will leave us with 7B hole. Fill 162 * it with other frequently used members. 163 */ 164 uint16_t last_cpu; /* most recent cpu */ 165 uint16_t hdwq; 166 uint8_t qe_valid; 167 uint8_t mode; /* interrupt or polling */ 168 #define LPFC_EQ_INTERRUPT 0 169 #define LPFC_EQ_POLL 1 170 171 struct list_head wqfull_list; 172 enum lpfc_sli4_queue_type type; 173 enum lpfc_sli4_queue_subtype subtype; 174 struct lpfc_hba *phba; 175 struct list_head child_list; 176 struct list_head page_list; 177 struct list_head sgl_list; 178 struct list_head cpu_list; 179 uint32_t entry_count; /* Number of entries to support on the queue */ 180 uint32_t entry_size; /* Size of each queue entry. */ 181 uint32_t entry_cnt_per_pg; 182 uint32_t notify_interval; /* Queue Notification Interval 183 * For chip->host queues (EQ, CQ, RQ): 184 * specifies the interval (number of 185 * entries) where the doorbell is rung to 186 * notify the chip of entry consumption. 187 * For host->chip queues (WQ): 188 * specifies the interval (number of 189 * entries) where consumption CQE is 190 * requested to indicate WQ entries 191 * consumed by the chip. 192 * Not used on an MQ. 193 */ 194 #define LPFC_EQ_NOTIFY_INTRVL 16 195 #define LPFC_CQ_NOTIFY_INTRVL 16 196 #define LPFC_WQ_NOTIFY_INTRVL 16 197 #define LPFC_RQ_NOTIFY_INTRVL 16 198 uint32_t max_proc_limit; /* Queue Processing Limit 199 * For chip->host queues (EQ, CQ): 200 * specifies the maximum number of 201 * entries to be consumed in one 202 * processing iteration sequence. Queue 203 * will be rearmed after each iteration. 204 * Not used on an MQ, RQ or WQ. 205 */ 206 #define LPFC_EQ_MAX_PROC_LIMIT 256 207 #define LPFC_CQ_MIN_PROC_LIMIT 64 208 #define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096 209 #define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024 210 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64 211 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 212 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 213 uint32_t queue_claimed; /* indicates queue is being processed */ 214 uint32_t queue_id; /* Queue ID assigned by the hardware */ 215 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 216 uint32_t host_index; /* The host's index for putting or getting */ 217 uint32_t hba_index; /* The last known hba index for get or put */ 218 uint32_t q_mode; 219 220 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 221 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 222 223 uint16_t page_count; /* Number of pages allocated for this queue */ 224 uint16_t page_size; /* size of page allocated for this queue */ 225 #define LPFC_EXPANDED_PAGE_SIZE 16384 226 #define LPFC_DEFAULT_PAGE_SIZE 4096 227 uint16_t chann; /* Hardware Queue association WQ/CQ */ 228 /* CPU affinity for EQ */ 229 #define LPFC_FIND_BY_EQ 0 230 #define LPFC_FIND_BY_HDWQ 1 231 uint8_t db_format; 232 #define LPFC_DB_RING_FORMAT 0x01 233 #define LPFC_DB_LIST_FORMAT 0x02 234 uint8_t q_flag; 235 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */ 236 #define HBA_NVMET_CQ_NOTIFY 0x1 /* LPFC_NVMET_CQ_NOTIFY CQEs this EQE */ 237 #define HBA_EQ_DELAY_CHK 0x2 /* EQ is a candidate for coalescing */ 238 #define LPFC_NVMET_CQ_NOTIFY 4 239 void __iomem *db_regaddr; 240 uint16_t dpp_enable; 241 uint16_t dpp_id; 242 void __iomem *dpp_regaddr; 243 244 /* For q stats */ 245 uint32_t q_cnt_1; 246 uint32_t q_cnt_2; 247 uint32_t q_cnt_3; 248 uint64_t q_cnt_4; 249 uint32_t q_cnt_5; 250 251 /* defines for EQ stats */ 252 #define EQ_max_eqe q_cnt_1 253 #define EQ_no_entry q_cnt_2 254 #define EQ_cqe_cnt q_cnt_3 255 #define EQ_processed q_cnt_4 256 257 /* defines for CQ stats */ 258 #define CQ_mbox q_cnt_1 259 #define CQ_max_cqe q_cnt_1 260 #define CQ_release_wqe q_cnt_2 261 #define CQ_xri_aborted q_cnt_3 262 #define CQ_wq q_cnt_4 263 264 /* defines for WQ stats */ 265 #define WQ_overflow q_cnt_1 266 #define WQ_posted q_cnt_4 267 268 /* defines for RQ stats */ 269 #define RQ_no_posted_buf q_cnt_1 270 #define RQ_no_buf_found q_cnt_2 271 #define RQ_buf_posted q_cnt_3 272 #define RQ_rcv_buf q_cnt_4 273 #define RQ_discard_frm q_cnt_5 274 275 struct work_struct irqwork; 276 struct work_struct spwork; 277 struct delayed_work sched_irqwork; 278 struct delayed_work sched_spwork; 279 280 uint64_t isr_timestamp; 281 struct lpfc_queue *assoc_qp; 282 struct list_head _poll_list; 283 284 enum lpfc_poll_mode poll_mode; 285 286 void *q_pgs[]; /* array to index entries per page */ 287 }; 288 289 struct lpfc_sli4_link { 290 uint32_t speed; 291 uint8_t duplex; 292 uint8_t status; 293 uint8_t type; 294 uint8_t number; 295 uint8_t fault; 296 uint8_t link_status; 297 uint16_t topology; 298 uint32_t logical_speed; 299 }; 300 301 struct lpfc_fcf_rec { 302 uint8_t fabric_name[8]; 303 uint8_t switch_name[8]; 304 uint8_t mac_addr[6]; 305 uint16_t fcf_indx; 306 uint32_t priority; 307 uint16_t vlan_id; 308 uint32_t addr_mode; 309 uint32_t flag; 310 #define BOOT_ENABLE 0x01 311 #define RECORD_VALID 0x02 312 }; 313 314 struct lpfc_fcf_pri_rec { 315 uint16_t fcf_index; 316 #define LPFC_FCF_ON_PRI_LIST 0x0001 317 #define LPFC_FCF_FLOGI_FAILED 0x0002 318 uint16_t flag; 319 uint32_t priority; 320 }; 321 322 struct lpfc_fcf_pri { 323 struct list_head list; 324 struct lpfc_fcf_pri_rec fcf_rec; 325 }; 326 327 /* 328 * Maximum FCF table index, it is for driver internal book keeping, it 329 * just needs to be no less than the supported HBA's FCF table size. 330 */ 331 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 332 333 struct lpfc_fcf { 334 uint16_t fcfi; 335 uint32_t fcf_flag; 336 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 337 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 338 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 339 #define FCF_IN_USE 0x08 /* At Least one discovery completed */ 340 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 341 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 342 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 343 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 344 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 345 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 346 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 347 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 348 uint16_t fcf_redisc_attempted; 349 uint32_t addr_mode; 350 uint32_t eligible_fcf_cnt; 351 struct lpfc_fcf_rec current_rec; 352 struct lpfc_fcf_rec failover_rec; 353 struct list_head fcf_pri_list; 354 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 355 uint32_t current_fcf_scan_pri; 356 struct timer_list redisc_wait; 357 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 358 }; 359 360 361 #define LPFC_REGION23_SIGNATURE "RG23" 362 #define LPFC_REGION23_VERSION 1 363 #define LPFC_REGION23_LAST_REC 0xff 364 #define DRIVER_SPECIFIC_TYPE 0xA2 365 #define LINUX_DRIVER_ID 0x20 366 #define PORT_STE_TYPE 0x1 367 368 struct lpfc_fip_param_hdr { 369 uint8_t type; 370 #define FCOE_PARAM_TYPE 0xA0 371 uint8_t length; 372 #define FCOE_PARAM_LENGTH 2 373 uint8_t parm_version; 374 #define FIPP_VERSION 0x01 375 uint8_t parm_flags; 376 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 377 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 378 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 379 #define FIPP_MODE_ON 0x1 380 #define FIPP_MODE_OFF 0x0 381 #define FIPP_VLAN_VALID 0x1 382 }; 383 384 struct lpfc_fcoe_params { 385 uint8_t fc_map[3]; 386 uint8_t reserved1; 387 uint16_t vlan_tag; 388 uint8_t reserved[2]; 389 }; 390 391 struct lpfc_fcf_conn_hdr { 392 uint8_t type; 393 #define FCOE_CONN_TBL_TYPE 0xA1 394 uint8_t length; /* words */ 395 uint8_t reserved[2]; 396 }; 397 398 struct lpfc_fcf_conn_rec { 399 uint16_t flags; 400 #define FCFCNCT_VALID 0x0001 401 #define FCFCNCT_BOOT 0x0002 402 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 403 #define FCFCNCT_FBNM_VALID 0x0008 404 #define FCFCNCT_SWNM_VALID 0x0010 405 #define FCFCNCT_VLAN_VALID 0x0020 406 #define FCFCNCT_AM_VALID 0x0040 407 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 408 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 409 410 uint16_t vlan_tag; 411 uint8_t fabric_name[8]; 412 uint8_t switch_name[8]; 413 }; 414 415 struct lpfc_fcf_conn_entry { 416 struct list_head list; 417 struct lpfc_fcf_conn_rec conn_rec; 418 }; 419 420 /* 421 * Define the host's bootstrap mailbox. This structure contains 422 * the member attributes needed to create, use, and destroy the 423 * bootstrap mailbox region. 424 * 425 * The macro definitions for the bmbx data structure are defined 426 * in lpfc_hw4.h with the register definition. 427 */ 428 struct lpfc_bmbx { 429 struct lpfc_dmabuf *dmabuf; 430 struct dma_address dma_address; 431 void *avirt; 432 dma_addr_t aphys; 433 uint32_t bmbx_size; 434 }; 435 436 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 437 438 #define LPFC_EQE_SIZE_4B 4 439 #define LPFC_EQE_SIZE_16B 16 440 #define LPFC_CQE_SIZE 16 441 #define LPFC_WQE_SIZE 64 442 #define LPFC_WQE128_SIZE 128 443 #define LPFC_MQE_SIZE 256 444 #define LPFC_RQE_SIZE 8 445 446 #define LPFC_EQE_DEF_COUNT 1024 447 #define LPFC_CQE_DEF_COUNT 1024 448 #define LPFC_CQE_EXP_COUNT 4096 449 #define LPFC_WQE_DEF_COUNT 256 450 #define LPFC_WQE_EXP_COUNT 1024 451 #define LPFC_MQE_DEF_COUNT 16 452 #define LPFC_RQE_DEF_COUNT 512 453 454 #define LPFC_QUEUE_NOARM false 455 #define LPFC_QUEUE_REARM true 456 457 458 /* 459 * SLI4 CT field defines 460 */ 461 #define SLI4_CT_RPI 0 462 #define SLI4_CT_VPI 1 463 #define SLI4_CT_VFI 2 464 #define SLI4_CT_FCFI 3 465 466 /* 467 * SLI4 specific data structures 468 */ 469 struct lpfc_max_cfg_param { 470 uint16_t max_xri; 471 uint16_t xri_base; 472 uint16_t xri_used; 473 uint16_t max_rpi; 474 uint16_t rpi_base; 475 uint16_t rpi_used; 476 uint16_t max_vpi; 477 uint16_t vpi_base; 478 uint16_t vpi_used; 479 uint16_t max_vfi; 480 uint16_t vfi_base; 481 uint16_t vfi_used; 482 uint16_t max_fcfi; 483 uint16_t fcfi_used; 484 uint16_t max_eq; 485 uint16_t max_rq; 486 uint16_t max_cq; 487 uint16_t max_wq; 488 }; 489 490 struct lpfc_hba; 491 /* SLI4 HBA multi-fcp queue handler struct */ 492 #define LPFC_SLI4_HANDLER_NAME_SZ 16 493 struct lpfc_hba_eq_hdl { 494 uint32_t idx; 495 int irq; 496 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 497 struct lpfc_hba *phba; 498 struct lpfc_queue *eq; 499 struct cpumask aff_mask; 500 }; 501 502 #define lpfc_get_eq_hdl(eqidx) (&phba->sli4_hba.hba_eq_hdl[eqidx]) 503 #define lpfc_get_aff_mask(eqidx) (&phba->sli4_hba.hba_eq_hdl[eqidx].aff_mask) 504 #define lpfc_get_irq(eqidx) (phba->sli4_hba.hba_eq_hdl[eqidx].irq) 505 506 /*BB Credit recovery value*/ 507 struct lpfc_bbscn_params { 508 uint32_t word0; 509 #define lpfc_bbscn_min_SHIFT 0 510 #define lpfc_bbscn_min_MASK 0x0000000F 511 #define lpfc_bbscn_min_WORD word0 512 #define lpfc_bbscn_max_SHIFT 4 513 #define lpfc_bbscn_max_MASK 0x0000000F 514 #define lpfc_bbscn_max_WORD word0 515 #define lpfc_bbscn_def_SHIFT 8 516 #define lpfc_bbscn_def_MASK 0x0000000F 517 #define lpfc_bbscn_def_WORD word0 518 }; 519 520 /* Port Capabilities for SLI4 Parameters */ 521 struct lpfc_pc_sli4_params { 522 uint32_t supported; 523 uint32_t if_type; 524 uint32_t sli_rev; 525 uint32_t sli_family; 526 uint32_t featurelevel_1; 527 uint32_t featurelevel_2; 528 uint32_t proto_types; 529 #define LPFC_SLI4_PROTO_FCOE 0x0000001 530 #define LPFC_SLI4_PROTO_FC 0x0000002 531 #define LPFC_SLI4_PROTO_NIC 0x0000004 532 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 533 #define LPFC_SLI4_PROTO_RDMA 0x0000010 534 uint32_t sge_supp_len; 535 uint32_t if_page_sz; 536 uint32_t rq_db_window; 537 uint32_t loopbk_scope; 538 uint32_t oas_supported; 539 uint32_t eq_pages_max; 540 uint32_t eqe_size; 541 uint32_t cq_pages_max; 542 uint32_t cqe_size; 543 uint32_t mq_pages_max; 544 uint32_t mqe_size; 545 uint32_t mq_elem_cnt; 546 uint32_t wq_pages_max; 547 uint32_t wqe_size; 548 uint32_t rq_pages_max; 549 uint32_t rqe_size; 550 uint32_t hdr_pages_max; 551 uint32_t hdr_size; 552 uint32_t hdr_pp_align; 553 uint32_t sgl_pages_max; 554 uint32_t sgl_pp_align; 555 uint32_t mib_size; 556 uint16_t mi_ver; 557 #define LPFC_MIB1_SUPPORT 1 558 #define LPFC_MIB2_SUPPORT 2 559 #define LPFC_MIB3_SUPPORT 3 560 uint16_t mi_value; 561 #define LPFC_DFLT_MIB_VAL 2 562 uint8_t mi_cap; 563 uint8_t mib_bde_cnt; 564 uint8_t cmf; 565 uint8_t cqv; 566 uint8_t mqv; 567 uint8_t wqv; 568 uint8_t rqv; 569 uint8_t eqav; 570 uint8_t cqav; 571 uint8_t wqsize; 572 uint8_t bv1s; 573 uint8_t pls; 574 #define LPFC_WQ_SZ64_SUPPORT 1 575 #define LPFC_WQ_SZ128_SUPPORT 2 576 uint8_t wqpcnt; 577 uint8_t nvme; 578 }; 579 580 #define LPFC_CQ_4K_PAGE_SZ 0x1 581 #define LPFC_CQ_16K_PAGE_SZ 0x4 582 #define LPFC_CQ_32K_PAGE_SZ 0x8 583 #define LPFC_WQ_4K_PAGE_SZ 0x1 584 #define LPFC_WQ_16K_PAGE_SZ 0x4 585 #define LPFC_WQ_32K_PAGE_SZ 0x8 586 587 struct lpfc_iov { 588 uint32_t pf_number; 589 uint32_t vf_number; 590 }; 591 592 struct lpfc_sli4_lnk_info { 593 uint8_t lnk_dv; 594 #define LPFC_LNK_DAT_INVAL 0 595 #define LPFC_LNK_DAT_VAL 1 596 uint8_t lnk_tp; 597 #define LPFC_LNK_GE 0x0 /* FCoE */ 598 #define LPFC_LNK_FC 0x1 /* FC */ 599 #define LPFC_LNK_FC_TRUNKED 0x2 /* FC_Trunked */ 600 uint8_t lnk_no; 601 uint8_t optic_state; 602 }; 603 604 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 605 LPFC_FOF_IO_CHAN_NUM) 606 607 /* Used for tracking CPU mapping attributes */ 608 struct lpfc_vector_map_info { 609 uint16_t phys_id; 610 uint16_t core_id; 611 uint16_t eq; 612 uint16_t hdwq; 613 uint16_t flag; 614 #define LPFC_CPU_MAP_HYPER 0x1 615 #define LPFC_CPU_MAP_UNASSIGN 0x2 616 #define LPFC_CPU_FIRST_IRQ 0x4 617 }; 618 #define LPFC_VECTOR_MAP_EMPTY 0xffff 619 620 #define LPFC_IRQ_EMPTY 0xffffffff 621 622 /* Multi-XRI pool */ 623 #define XRI_BATCH 8 624 625 struct lpfc_pbl_pool { 626 struct list_head list; 627 u32 count; 628 spinlock_t lock; /* lock for pbl_pool*/ 629 }; 630 631 struct lpfc_pvt_pool { 632 u32 low_watermark; 633 u32 high_watermark; 634 635 struct list_head list; 636 u32 count; 637 spinlock_t lock; /* lock for pvt_pool */ 638 }; 639 640 struct lpfc_multixri_pool { 641 u32 xri_limit; 642 643 /* Starting point when searching a pbl_pool with round-robin method */ 644 u32 rrb_next_hwqid; 645 646 /* Used by lpfc_adjust_pvt_pool_count. 647 * io_req_count is incremented by 1 during IO submission. The heartbeat 648 * handler uses these two variables to determine if pvt_pool is idle or 649 * busy. 650 */ 651 u32 prev_io_req_count; 652 u32 io_req_count; 653 654 /* statistics */ 655 u32 pbl_empty_count; 656 #ifdef LPFC_MXP_STAT 657 u32 above_limit_count; 658 u32 below_limit_count; 659 u32 local_pbl_hit_count; 660 u32 other_pbl_hit_count; 661 u32 stat_max_hwm; 662 663 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */ 664 u32 stat_pbl_count; 665 u32 stat_pvt_count; 666 u32 stat_busy_count; 667 u32 stat_snapshot_taken; 668 #endif 669 670 /* TODO: Separate pvt_pool into get and put list */ 671 struct lpfc_pbl_pool pbl_pool; /* Public free XRI pool */ 672 struct lpfc_pvt_pool pvt_pool; /* Private free XRI pool */ 673 }; 674 675 struct lpfc_fc4_ctrl_stat { 676 u32 input_requests; 677 u32 output_requests; 678 u32 control_requests; 679 u32 io_cmpls; 680 }; 681 682 #ifdef LPFC_HDWQ_LOCK_STAT 683 struct lpfc_lock_stat { 684 uint32_t alloc_xri_get; 685 uint32_t alloc_xri_put; 686 uint32_t free_xri; 687 uint32_t wq_access; 688 uint32_t alloc_pvt_pool; 689 uint32_t mv_from_pvt_pool; 690 uint32_t mv_to_pub_pool; 691 uint32_t mv_to_pvt_pool; 692 uint32_t free_pub_pool; 693 uint32_t free_pvt_pool; 694 }; 695 #endif 696 697 struct lpfc_eq_intr_info { 698 struct list_head list; 699 uint32_t icnt; 700 }; 701 702 /* SLI4 HBA data structure entries */ 703 struct lpfc_sli4_hdw_queue { 704 /* Pointers to the constructed SLI4 queues */ 705 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 706 struct lpfc_queue *io_cq; /* Fast-path FCP & NVME compl queue */ 707 struct lpfc_queue *io_wq; /* Fast-path FCP & NVME work queue */ 708 uint16_t io_cq_map; 709 710 /* Keep track of IO buffers for this hardware queue */ 711 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 712 struct list_head lpfc_io_buf_list_get; 713 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 714 struct list_head lpfc_io_buf_list_put; 715 spinlock_t abts_io_buf_list_lock; /* list of aborted IOs */ 716 struct list_head lpfc_abts_io_buf_list; 717 uint32_t total_io_bufs; 718 uint32_t get_io_bufs; 719 uint32_t put_io_bufs; 720 uint32_t empty_io_bufs; 721 uint32_t abts_scsi_io_bufs; 722 uint32_t abts_nvme_io_bufs; 723 724 /* Multi-XRI pool per HWQ */ 725 struct lpfc_multixri_pool *p_multixri_pool; 726 727 /* FC-4 Stats counters */ 728 struct lpfc_fc4_ctrl_stat nvme_cstat; 729 struct lpfc_fc4_ctrl_stat scsi_cstat; 730 #ifdef LPFC_HDWQ_LOCK_STAT 731 struct lpfc_lock_stat lock_conflict; 732 #endif 733 734 /* Per HDWQ pool resources */ 735 struct list_head sgl_list; 736 struct list_head cmd_rsp_buf_list; 737 738 /* Lock for syncing Per HDWQ pool resources */ 739 spinlock_t hdwq_lock; 740 }; 741 742 #ifdef LPFC_HDWQ_LOCK_STAT 743 /* compile time trylock stats */ 744 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 745 { \ 746 int only_once = 1; \ 747 while (spin_trylock_irqsave(lock, flag) == 0) { \ 748 if (only_once) { \ 749 only_once = 0; \ 750 qp->lock_conflict.lstat++; \ 751 } \ 752 } \ 753 } 754 #define lpfc_qp_spin_lock(lock, qp, lstat) \ 755 { \ 756 int only_once = 1; \ 757 while (spin_trylock(lock) == 0) { \ 758 if (only_once) { \ 759 only_once = 0; \ 760 qp->lock_conflict.lstat++; \ 761 } \ 762 } \ 763 } 764 #else 765 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 766 spin_lock_irqsave(lock, flag) 767 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock) 768 #endif 769 770 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 771 struct lpfc_hdwq_stat { 772 u32 hdwq_no; 773 u32 rcv_io; 774 u32 xmt_io; 775 u32 cmpl_io; 776 }; 777 #endif 778 779 struct lpfc_sli4_hba { 780 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 781 * config space registers 782 */ 783 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 784 * control registers 785 */ 786 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 787 * doorbell registers 788 */ 789 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for 790 * dpp registers 791 */ 792 void __iomem *dpp_regs_memmap_wc_p;/* Kernel memory mapped address for 793 * dpp registers with write combining 794 */ 795 union { 796 struct { 797 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 798 void __iomem *UERRLOregaddr; 799 void __iomem *UERRHIregaddr; 800 void __iomem *UEMASKLOregaddr; 801 void __iomem *UEMASKHIregaddr; 802 } if_type0; 803 struct { 804 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 805 void __iomem *STATUSregaddr; 806 void __iomem *CTRLregaddr; 807 void __iomem *ERR1regaddr; 808 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 809 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 810 void __iomem *ERR2regaddr; 811 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 812 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 813 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 814 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 815 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 816 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 817 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 818 void __iomem *EQDregaddr; 819 } if_type2; 820 } u; 821 822 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 823 void __iomem *PSMPHRregaddr; 824 825 /* Well-known SLI INTF register memory map. */ 826 void __iomem *SLIINTFregaddr; 827 828 /* IF type 0, BAR 1 function CSR register memory map */ 829 void __iomem *ISRregaddr; /* HST_ISR register */ 830 void __iomem *IMRregaddr; /* HST_IMR register */ 831 void __iomem *ISCRregaddr; /* HST_ISCR register */ 832 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 833 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 834 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 835 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */ 836 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */ 837 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 838 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 839 840 uint32_t ue_mask_lo; 841 uint32_t ue_mask_hi; 842 uint32_t ue_to_sr; 843 uint32_t ue_to_rp; 844 struct lpfc_register sli_intf; 845 struct lpfc_register asic_id; 846 struct lpfc_pc_sli4_params pc_sli4_params; 847 struct lpfc_bbscn_params bbscn_params; 848 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 849 850 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 851 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq, 852 uint32_t count, bool arm); 853 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq, 854 uint32_t count, bool arm); 855 856 /* Pointers to the constructed SLI4 queues */ 857 struct lpfc_sli4_hdw_queue *hdwq; 858 struct list_head lpfc_wq_list; 859 860 /* Pointers to the constructed SLI4 queues for NVMET */ 861 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 862 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 863 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 864 865 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 866 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 867 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 868 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 869 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 870 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 871 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 872 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 873 874 struct lpfc_name wwnn; 875 struct lpfc_name wwpn; 876 877 uint32_t fw_func_mode; /* FW function protocol mode */ 878 879 /* Optimized Access Storage specific queues/structures */ 880 uint64_t oas_next_lun; 881 uint8_t oas_next_tgt_wwpn[8]; 882 uint8_t oas_next_vpt_wwpn[8]; 883 884 /* Setup information for various queue parameters */ 885 int eq_esize; 886 int eq_ecount; 887 int cq_esize; 888 int cq_ecount; 889 int wq_esize; 890 int wq_ecount; 891 int mq_esize; 892 int mq_ecount; 893 int rq_esize; 894 int rq_ecount; 895 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 896 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 897 898 uint32_t intr_enable; 899 900 /* Indicates whether SLI Port supports FEDIF */ 901 bool encryption_support; 902 903 struct lpfc_bmbx bmbx; 904 struct lpfc_max_cfg_param max_cfg_param; 905 uint16_t extents_in_use; /* must allocate resource extents. */ 906 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 907 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 908 uint16_t next_rpi; 909 uint16_t io_xri_max; 910 uint16_t io_xri_cnt; 911 uint16_t io_xri_start; 912 uint16_t els_xri_cnt; 913 uint16_t nvmet_xri_cnt; 914 uint16_t nvmet_io_wait_cnt; 915 uint16_t nvmet_io_wait_total; 916 uint16_t cq_max; 917 struct lpfc_queue **cq_lookup; 918 struct list_head lpfc_els_sgl_list; 919 struct list_head lpfc_abts_els_sgl_list; 920 spinlock_t abts_io_buf_list_lock; /* list of aborted SCSI IOs */ 921 struct list_head lpfc_abts_io_buf_list; 922 struct list_head lpfc_nvmet_sgl_list; 923 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 924 struct list_head lpfc_abts_nvmet_ctx_list; 925 spinlock_t t_active_list_lock; /* list of active NVMET IOs */ 926 struct list_head t_active_ctx_list; 927 struct list_head lpfc_nvmet_io_wait_list; 928 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 929 struct lpfc_sglq **lpfc_sglq_active_list; 930 struct list_head lpfc_rpi_hdr_list; 931 unsigned long *rpi_bmask; 932 uint16_t *rpi_ids; 933 uint16_t rpi_count; 934 struct list_head lpfc_rpi_blk_list; 935 unsigned long *xri_bmask; 936 uint16_t *xri_ids; 937 struct list_head lpfc_xri_blk_list; 938 unsigned long *vfi_bmask; 939 uint16_t *vfi_ids; 940 uint16_t vfi_count; 941 struct list_head lpfc_vfi_blk_list; 942 struct lpfc_sli4_flags sli4_flags; 943 struct list_head sp_queue_event; 944 struct list_head sp_cqe_event_pool; 945 struct list_head sp_asynce_work_queue; 946 spinlock_t asynce_list_lock; /* protect sp_asynce_work_queue list */ 947 struct list_head sp_els_xri_aborted_work_queue; 948 spinlock_t els_xri_abrt_list_lock; /* protect els_xri_aborted list */ 949 struct list_head sp_unsol_work_queue; 950 struct lpfc_sli4_link link_state; 951 struct lpfc_sli4_lnk_info lnk_info; 952 uint32_t pport_name_sta; 953 #define LPFC_SLI4_PPNAME_NON 0 954 #define LPFC_SLI4_PPNAME_GET 1 955 struct lpfc_iov iov; 956 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 957 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 958 uint32_t physical_port; 959 960 /* CPU to vector mapping information */ 961 struct lpfc_vector_map_info *cpu_map; 962 uint16_t num_possible_cpu; 963 uint16_t num_present_cpu; 964 struct cpumask irq_aff_mask; 965 uint16_t curr_disp_cpu; 966 struct lpfc_eq_intr_info __percpu *eq_info; 967 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 968 struct lpfc_hdwq_stat __percpu *c_stat; 969 #endif 970 struct lpfc_idle_stat *idle_stat; 971 uint32_t conf_trunk; 972 #define lpfc_conf_trunk_port0_WORD conf_trunk 973 #define lpfc_conf_trunk_port0_SHIFT 0 974 #define lpfc_conf_trunk_port0_MASK 0x1 975 #define lpfc_conf_trunk_port1_WORD conf_trunk 976 #define lpfc_conf_trunk_port1_SHIFT 1 977 #define lpfc_conf_trunk_port1_MASK 0x1 978 #define lpfc_conf_trunk_port2_WORD conf_trunk 979 #define lpfc_conf_trunk_port2_SHIFT 2 980 #define lpfc_conf_trunk_port2_MASK 0x1 981 #define lpfc_conf_trunk_port3_WORD conf_trunk 982 #define lpfc_conf_trunk_port3_SHIFT 3 983 #define lpfc_conf_trunk_port3_MASK 0x1 984 #define lpfc_conf_trunk_port0_nd_WORD conf_trunk 985 #define lpfc_conf_trunk_port0_nd_SHIFT 4 986 #define lpfc_conf_trunk_port0_nd_MASK 0x1 987 #define lpfc_conf_trunk_port1_nd_WORD conf_trunk 988 #define lpfc_conf_trunk_port1_nd_SHIFT 5 989 #define lpfc_conf_trunk_port1_nd_MASK 0x1 990 #define lpfc_conf_trunk_port2_nd_WORD conf_trunk 991 #define lpfc_conf_trunk_port2_nd_SHIFT 6 992 #define lpfc_conf_trunk_port2_nd_MASK 0x1 993 #define lpfc_conf_trunk_port3_nd_WORD conf_trunk 994 #define lpfc_conf_trunk_port3_nd_SHIFT 7 995 #define lpfc_conf_trunk_port3_nd_MASK 0x1 996 uint8_t flash_id; 997 uint8_t asic_rev; 998 uint16_t fawwpn_flag; /* FA-WWPN support state */ 999 #define LPFC_FAWWPN_CONFIG 0x1 /* FA-PWWN is configured */ 1000 #define LPFC_FAWWPN_FABRIC 0x2 /* FA-PWWN success with Fabric */ 1001 }; 1002 1003 enum lpfc_sge_type { 1004 GEN_BUFF_TYPE, 1005 SCSI_BUFF_TYPE, 1006 NVMET_BUFF_TYPE 1007 }; 1008 1009 enum lpfc_sgl_state { 1010 SGL_FREED, 1011 SGL_ALLOCATED, 1012 SGL_XRI_ABORTED 1013 }; 1014 1015 struct lpfc_sglq { 1016 /* lpfc_sglqs are used in double linked lists */ 1017 struct list_head list; 1018 struct list_head clist; 1019 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 1020 enum lpfc_sgl_state state; 1021 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 1022 uint16_t iotag; /* pre-assigned IO tag */ 1023 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 1024 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 1025 struct sli4_sge *sgl; /* pre-assigned SGL */ 1026 void *virt; /* virtual address. */ 1027 dma_addr_t phys; /* physical address */ 1028 }; 1029 1030 struct lpfc_rpi_hdr { 1031 struct list_head list; 1032 uint32_t len; 1033 struct lpfc_dmabuf *dmabuf; 1034 uint32_t page_count; 1035 uint32_t start_rpi; 1036 uint16_t next_rpi; 1037 }; 1038 1039 struct lpfc_rsrc_blks { 1040 struct list_head list; 1041 uint16_t rsrc_start; 1042 uint16_t rsrc_size; 1043 uint16_t rsrc_used; 1044 }; 1045 1046 struct lpfc_rdp_context { 1047 struct lpfc_nodelist *ndlp; 1048 uint16_t ox_id; 1049 uint16_t rx_id; 1050 READ_LNK_VAR link_stat; 1051 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 1052 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 1053 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 1054 }; 1055 1056 struct lpfc_lcb_context { 1057 uint8_t sub_command; 1058 uint8_t type; 1059 uint8_t capability; 1060 uint8_t frequency; 1061 uint16_t duration; 1062 uint16_t ox_id; 1063 uint16_t rx_id; 1064 struct lpfc_nodelist *ndlp; 1065 }; 1066 1067 1068 /* 1069 * SLI4 specific function prototypes 1070 */ 1071 int lpfc_pci_function_reset(struct lpfc_hba *); 1072 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 1073 int lpfc_sli4_hba_setup(struct lpfc_hba *); 1074 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 1075 uint8_t, uint32_t, bool); 1076 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 1077 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 1078 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 1079 struct lpfc_mbx_sge *); 1080 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 1081 uint16_t); 1082 1083 void lpfc_sli4_hba_reset(struct lpfc_hba *); 1084 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba, 1085 uint32_t page_size, 1086 uint32_t entry_size, 1087 uint32_t entry_count, int cpu); 1088 void lpfc_sli4_queue_free(struct lpfc_queue *); 1089 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 1090 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 1091 uint32_t numq, uint32_t usdelay); 1092 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 1093 struct lpfc_queue *, uint32_t, uint32_t); 1094 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 1095 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type, 1096 uint32_t subtype); 1097 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 1098 struct lpfc_queue *, uint32_t); 1099 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 1100 struct lpfc_queue *, uint32_t); 1101 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 1102 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 1103 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 1104 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 1105 uint32_t subtype); 1106 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1107 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1108 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1109 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1110 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 1111 struct lpfc_queue *); 1112 int lpfc_sli4_queue_setup(struct lpfc_hba *); 1113 void lpfc_sli4_queue_unset(struct lpfc_hba *); 1114 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 1115 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba); 1116 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 1117 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 1118 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 1119 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1120 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1121 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1122 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1123 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 1124 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 1125 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 1126 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 1127 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 1128 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 1129 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 1130 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 1131 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 1132 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 1133 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp, 1134 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), 1135 struct lpfc_iocbq *iocbq); 1136 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba); 1137 void lpfc_sli4_nvme_pci_offline_aborted(struct lpfc_hba *phba, 1138 struct lpfc_io_buf *lpfc_ncmd); 1139 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1140 struct sli4_wcqe_xri_aborted *axri, 1141 struct lpfc_io_buf *lpfc_ncmd); 1142 void lpfc_sli4_io_xri_aborted(struct lpfc_hba *phba, 1143 struct sli4_wcqe_xri_aborted *axri, int idx); 1144 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1145 struct sli4_wcqe_xri_aborted *axri); 1146 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 1147 struct sli4_wcqe_xri_aborted *); 1148 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 1149 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 1150 int lpfc_sli4_brdreset(struct lpfc_hba *); 1151 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 1152 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 1153 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 1154 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1155 int lpfc_sli4_init_vpi(struct lpfc_vport *); 1156 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1157 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1158 uint32_t count, bool arm); 1159 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1160 uint32_t count, bool arm); 1161 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1162 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1163 uint32_t count, bool arm); 1164 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1165 uint32_t count, bool arm); 1166 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1167 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1168 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1169 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 1170 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1171 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1172 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1173 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 1174 int lpfc_sli4_post_status_check(struct lpfc_hba *); 1175 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1176 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1177 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1178 struct sli4_hybrid_sgl *lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, 1179 struct lpfc_io_buf *buf); 1180 struct fcp_cmd_rsp_buf *lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1181 struct lpfc_io_buf *buf); 1182 int lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *buf); 1183 int lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1184 struct lpfc_io_buf *buf); 1185 void lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba, 1186 struct lpfc_sli4_hdw_queue *hdwq); 1187 void lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1188 struct lpfc_sli4_hdw_queue *hdwq); 1189 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1190 { 1191 return q->q_pgs[idx / q->entry_cnt_per_pg] + 1192 (q->entry_size * (idx % q->entry_cnt_per_pg)); 1193 } 1194 1195 /** 1196 * lpfc_sli4_unrecoverable_port - Check ERR and RN bits in portstat_reg 1197 * @portstat_reg: portstat_reg pointer containing portstat_reg contents 1198 * 1199 * Description: 1200 * Use only for SLI4 interface type-2 or later. If ERR is set && RN is 0, then 1201 * port is deemed unrecoverable. 1202 * 1203 * Returns: 1204 * true - ERR && !RN 1205 * false - otherwise 1206 */ 1207 static inline bool 1208 lpfc_sli4_unrecoverable_port(struct lpfc_register *portstat_reg) 1209 { 1210 return bf_get(lpfc_sliport_status_err, portstat_reg) && 1211 !bf_get(lpfc_sliport_status_rn, portstat_reg); 1212 } 1213