1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Huawei HiNIC PCI Express Linux driver 3 * Copyright(c) 2017 Huawei Technologies Co., Ltd 4 */ 5 #include <linux/pci.h> 6 #include <linux/delay.h> 7 #include <linux/types.h> 8 #include <linux/completion.h> 9 #include <linux/semaphore.h> 10 #include <linux/spinlock.h> 11 #include <linux/workqueue.h> 12 13 #include "hinic_hw_if.h" 14 #include "hinic_hw_mgmt.h" 15 #include "hinic_hw_csr.h" 16 #include "hinic_hw_dev.h" 17 #include "hinic_hw_mbox.h" 18 19 #define HINIC_MBOX_INT_DST_FUNC_SHIFT 0 20 #define HINIC_MBOX_INT_DST_AEQN_SHIFT 10 21 #define HINIC_MBOX_INT_SRC_RESP_AEQN_SHIFT 12 22 #define HINIC_MBOX_INT_STAT_DMA_SHIFT 14 23 /* The size of data to be sended (unit of 4 bytes) */ 24 #define HINIC_MBOX_INT_TX_SIZE_SHIFT 20 25 /* SO_RO(strong order, relax order) */ 26 #define HINIC_MBOX_INT_STAT_DMA_SO_RO_SHIFT 25 27 #define HINIC_MBOX_INT_WB_EN_SHIFT 28 28 29 #define HINIC_MBOX_INT_DST_FUNC_MASK 0x3FF 30 #define HINIC_MBOX_INT_DST_AEQN_MASK 0x3 31 #define HINIC_MBOX_INT_SRC_RESP_AEQN_MASK 0x3 32 #define HINIC_MBOX_INT_STAT_DMA_MASK 0x3F 33 #define HINIC_MBOX_INT_TX_SIZE_MASK 0x1F 34 #define HINIC_MBOX_INT_STAT_DMA_SO_RO_MASK 0x3 35 #define HINIC_MBOX_INT_WB_EN_MASK 0x1 36 37 #define HINIC_MBOX_INT_SET(val, field) \ 38 (((val) & HINIC_MBOX_INT_##field##_MASK) << \ 39 HINIC_MBOX_INT_##field##_SHIFT) 40 41 enum hinic_mbox_tx_status { 42 TX_NOT_DONE = 1, 43 }; 44 45 #define HINIC_MBOX_CTRL_TRIGGER_AEQE_SHIFT 0 46 47 /* specifies the issue request for the message data. 48 * 0 - Tx request is done; 49 * 1 - Tx request is in process. 50 */ 51 #define HINIC_MBOX_CTRL_TX_STATUS_SHIFT 1 52 53 #define HINIC_MBOX_CTRL_TRIGGER_AEQE_MASK 0x1 54 #define HINIC_MBOX_CTRL_TX_STATUS_MASK 0x1 55 56 #define HINIC_MBOX_CTRL_SET(val, field) \ 57 (((val) & HINIC_MBOX_CTRL_##field##_MASK) << \ 58 HINIC_MBOX_CTRL_##field##_SHIFT) 59 60 #define HINIC_MBOX_HEADER_MSG_LEN_SHIFT 0 61 #define HINIC_MBOX_HEADER_MODULE_SHIFT 11 62 #define HINIC_MBOX_HEADER_SEG_LEN_SHIFT 16 63 #define HINIC_MBOX_HEADER_NO_ACK_SHIFT 22 64 #define HINIC_MBOX_HEADER_SEQID_SHIFT 24 65 #define HINIC_MBOX_HEADER_LAST_SHIFT 30 66 67 /* specifies the mailbox message direction 68 * 0 - send 69 * 1 - receive 70 */ 71 #define HINIC_MBOX_HEADER_DIRECTION_SHIFT 31 72 #define HINIC_MBOX_HEADER_CMD_SHIFT 32 73 #define HINIC_MBOX_HEADER_MSG_ID_SHIFT 40 74 #define HINIC_MBOX_HEADER_STATUS_SHIFT 48 75 #define HINIC_MBOX_HEADER_SRC_GLB_FUNC_IDX_SHIFT 54 76 77 #define HINIC_MBOX_HEADER_MSG_LEN_MASK 0x7FF 78 #define HINIC_MBOX_HEADER_MODULE_MASK 0x1F 79 #define HINIC_MBOX_HEADER_SEG_LEN_MASK 0x3F 80 #define HINIC_MBOX_HEADER_NO_ACK_MASK 0x1 81 #define HINIC_MBOX_HEADER_SEQID_MASK 0x3F 82 #define HINIC_MBOX_HEADER_LAST_MASK 0x1 83 #define HINIC_MBOX_HEADER_DIRECTION_MASK 0x1 84 #define HINIC_MBOX_HEADER_CMD_MASK 0xFF 85 #define HINIC_MBOX_HEADER_MSG_ID_MASK 0xFF 86 #define HINIC_MBOX_HEADER_STATUS_MASK 0x3F 87 #define HINIC_MBOX_HEADER_SRC_GLB_FUNC_IDX_MASK 0x3FF 88 89 #define HINIC_MBOX_HEADER_GET(val, field) \ 90 (((val) >> HINIC_MBOX_HEADER_##field##_SHIFT) & \ 91 HINIC_MBOX_HEADER_##field##_MASK) 92 #define HINIC_MBOX_HEADER_SET(val, field) \ 93 ((u64)((val) & HINIC_MBOX_HEADER_##field##_MASK) << \ 94 HINIC_MBOX_HEADER_##field##_SHIFT) 95 96 #define MBOX_SEGLEN_MASK \ 97 HINIC_MBOX_HEADER_SET(HINIC_MBOX_HEADER_SEG_LEN_MASK, SEG_LEN) 98 99 #define HINIC_MBOX_SEG_LEN 48 100 #define HINIC_MBOX_COMP_TIME 8000U 101 #define MBOX_MSG_POLLING_TIMEOUT 8000 102 103 #define HINIC_MBOX_DATA_SIZE 2040 104 105 #define MBOX_MAX_BUF_SZ 2048UL 106 #define MBOX_HEADER_SZ 8 107 108 #define MBOX_INFO_SZ 4 109 110 /* MBOX size is 64B, 8B for mbox_header, 4B reserved */ 111 #define MBOX_SEG_LEN 48 112 #define MBOX_SEG_LEN_ALIGN 4 113 #define MBOX_WB_STATUS_LEN 16UL 114 115 /* mbox write back status is 16B, only first 4B is used */ 116 #define MBOX_WB_STATUS_ERRCODE_MASK 0xFFFF 117 #define MBOX_WB_STATUS_MASK 0xFF 118 #define MBOX_WB_ERROR_CODE_MASK 0xFF00 119 #define MBOX_WB_STATUS_FINISHED_SUCCESS 0xFF 120 #define MBOX_WB_STATUS_NOT_FINISHED 0x00 121 122 #define MBOX_STATUS_FINISHED(wb) \ 123 (((wb) & MBOX_WB_STATUS_MASK) != MBOX_WB_STATUS_NOT_FINISHED) 124 #define MBOX_STATUS_SUCCESS(wb) \ 125 (((wb) & MBOX_WB_STATUS_MASK) == MBOX_WB_STATUS_FINISHED_SUCCESS) 126 #define MBOX_STATUS_ERRCODE(wb) \ 127 ((wb) & MBOX_WB_ERROR_CODE_MASK) 128 129 #define SEQ_ID_START_VAL 0 130 #define SEQ_ID_MAX_VAL 42 131 #define MBOX_LAST_SEG_MAX_LEN (MBOX_MAX_BUF_SZ - SEQ_ID_MAX_VAL * MBOX_SEG_LEN) 132 133 #define NO_DMA_ATTRIBUTE_VAL 0 134 135 #define HINIC_MBOX_RSP_AEQN 2 136 #define HINIC_MBOX_RECV_AEQN 0 137 138 #define MBOX_MSG_NO_DATA_LEN 1 139 140 #define MBOX_BODY_FROM_HDR(header) ((u8 *)(header) + MBOX_HEADER_SZ) 141 #define MBOX_AREA(hwif) \ 142 ((hwif)->cfg_regs_bar + HINIC_FUNC_CSR_MAILBOX_DATA_OFF) 143 144 #define IS_PF_OR_PPF_SRC(src_func_idx) ((src_func_idx) < HINIC_MAX_PF_FUNCS) 145 146 #define MBOX_MSG_ID_MASK 0xFF 147 #define MBOX_MSG_ID(func_to_func) ((func_to_func)->send_msg_id) 148 #define MBOX_MSG_ID_INC(func_to_func_mbox) (MBOX_MSG_ID(func_to_func_mbox) = \ 149 (MBOX_MSG_ID(func_to_func_mbox) + 1) & MBOX_MSG_ID_MASK) 150 151 #define FUNC_ID_OFF_SET_8B 8 152 153 /* max message counter wait to process for one function */ 154 #define HINIC_MAX_MSG_CNT_TO_PROCESS 10 155 156 #define HINIC_QUEUE_MIN_DEPTH 6 157 #define HINIC_QUEUE_MAX_DEPTH 12 158 #define HINIC_MAX_RX_BUFFER_SIZE 15 159 160 enum hinic_hwif_direction_type { 161 HINIC_HWIF_DIRECT_SEND = 0, 162 HINIC_HWIF_RESPONSE = 1, 163 }; 164 165 enum mbox_send_mod { 166 MBOX_SEND_MSG_INT, 167 }; 168 169 enum mbox_seg_type { 170 NOT_LAST_SEG, 171 LAST_SEG, 172 }; 173 174 enum mbox_ordering_type { 175 STRONG_ORDER, 176 }; 177 178 enum mbox_write_back_type { 179 WRITE_BACK = 1, 180 }; 181 182 enum mbox_aeq_trig_type { 183 NOT_TRIGGER, 184 TRIGGER, 185 }; 186 187 static bool check_func_id(struct hinic_hwdev *hwdev, u16 src_func_idx, 188 const void *buf_in, u16 in_size, u16 offset) 189 { 190 u16 func_idx; 191 192 if (in_size < offset + sizeof(func_idx)) { 193 dev_warn(&hwdev->hwif->pdev->dev, 194 "Receive mailbox msg len: %d less than %d Bytes is invalid\n", 195 in_size, offset); 196 return false; 197 } 198 199 func_idx = *((u16 *)((u8 *)buf_in + offset)); 200 201 if (src_func_idx != func_idx) { 202 dev_warn(&hwdev->hwif->pdev->dev, 203 "Receive mailbox function id: 0x%x not equal to msg function id: 0x%x\n", 204 src_func_idx, func_idx); 205 return false; 206 } 207 208 return true; 209 } 210 211 bool hinic_mbox_check_func_id_8B(struct hinic_hwdev *hwdev, u16 func_idx, 212 void *buf_in, u16 in_size) 213 { 214 return check_func_id(hwdev, func_idx, buf_in, in_size, 215 FUNC_ID_OFF_SET_8B); 216 } 217 218 /** 219 * hinic_register_pf_mbox_cb - register mbox callback for pf 220 * @hwdev: the pointer to hw device 221 * @mod: specific mod that the callback will handle 222 * @callback: callback function 223 * Return: 0 - success, negative - failure 224 */ 225 int hinic_register_pf_mbox_cb(struct hinic_hwdev *hwdev, 226 enum hinic_mod_type mod, 227 hinic_pf_mbox_cb callback) 228 { 229 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 230 231 if (mod >= HINIC_MOD_MAX) 232 return -EFAULT; 233 234 func_to_func->pf_mbox_cb[mod] = callback; 235 236 set_bit(HINIC_PF_MBOX_CB_REG, &func_to_func->pf_mbox_cb_state[mod]); 237 238 return 0; 239 } 240 241 /** 242 * hinic_register_vf_mbox_cb - register mbox callback for vf 243 * @hwdev: the pointer to hw device 244 * @mod: specific mod that the callback will handle 245 * @callback: callback function 246 * Return: 0 - success, negative - failure 247 */ 248 int hinic_register_vf_mbox_cb(struct hinic_hwdev *hwdev, 249 enum hinic_mod_type mod, 250 hinic_vf_mbox_cb callback) 251 { 252 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 253 254 if (mod >= HINIC_MOD_MAX) 255 return -EFAULT; 256 257 func_to_func->vf_mbox_cb[mod] = callback; 258 259 set_bit(HINIC_VF_MBOX_CB_REG, &func_to_func->vf_mbox_cb_state[mod]); 260 261 return 0; 262 } 263 264 /** 265 * hinic_unregister_pf_mbox_cb - unregister the mbox callback for pf 266 * @hwdev: the pointer to hw device 267 * @mod: specific mod that the callback will handle 268 */ 269 void hinic_unregister_pf_mbox_cb(struct hinic_hwdev *hwdev, 270 enum hinic_mod_type mod) 271 { 272 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 273 274 clear_bit(HINIC_PF_MBOX_CB_REG, &func_to_func->pf_mbox_cb_state[mod]); 275 276 while (test_bit(HINIC_PF_MBOX_CB_RUNNING, 277 &func_to_func->pf_mbox_cb_state[mod])) 278 usleep_range(900, 1000); 279 280 func_to_func->pf_mbox_cb[mod] = NULL; 281 } 282 283 /** 284 * hinic_unregister_vf_mbox_cb - unregister the mbox callback for vf 285 * @hwdev: the pointer to hw device 286 * @mod: specific mod that the callback will handle 287 */ 288 void hinic_unregister_vf_mbox_cb(struct hinic_hwdev *hwdev, 289 enum hinic_mod_type mod) 290 { 291 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 292 293 clear_bit(HINIC_VF_MBOX_CB_REG, &func_to_func->vf_mbox_cb_state[mod]); 294 295 while (test_bit(HINIC_VF_MBOX_CB_RUNNING, 296 &func_to_func->vf_mbox_cb_state[mod])) 297 usleep_range(900, 1000); 298 299 func_to_func->vf_mbox_cb[mod] = NULL; 300 } 301 302 static int recv_vf_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 303 struct hinic_recv_mbox *recv_mbox, 304 void *buf_out, u16 *out_size) 305 { 306 hinic_vf_mbox_cb cb; 307 int ret = 0; 308 309 if (recv_mbox->mod >= HINIC_MOD_MAX) { 310 dev_err(&func_to_func->hwif->pdev->dev, "Receive illegal mbox message, mod = %d\n", 311 recv_mbox->mod); 312 return -EINVAL; 313 } 314 315 set_bit(HINIC_VF_MBOX_CB_RUNNING, 316 &func_to_func->vf_mbox_cb_state[recv_mbox->mod]); 317 318 cb = func_to_func->vf_mbox_cb[recv_mbox->mod]; 319 if (cb && test_bit(HINIC_VF_MBOX_CB_REG, 320 &func_to_func->vf_mbox_cb_state[recv_mbox->mod])) { 321 cb(func_to_func->hwdev, recv_mbox->cmd, recv_mbox->mbox, 322 recv_mbox->mbox_len, buf_out, out_size); 323 } else { 324 dev_err(&func_to_func->hwif->pdev->dev, "VF mbox cb is not registered\n"); 325 ret = -EINVAL; 326 } 327 328 clear_bit(HINIC_VF_MBOX_CB_RUNNING, 329 &func_to_func->vf_mbox_cb_state[recv_mbox->mod]); 330 331 return ret; 332 } 333 334 static int 335 recv_pf_from_vf_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 336 struct hinic_recv_mbox *recv_mbox, 337 u16 src_func_idx, void *buf_out, 338 u16 *out_size) 339 { 340 hinic_pf_mbox_cb cb; 341 u16 vf_id = 0; 342 int ret; 343 344 if (recv_mbox->mod >= HINIC_MOD_MAX) { 345 dev_err(&func_to_func->hwif->pdev->dev, "Receive illegal mbox message, mod = %d\n", 346 recv_mbox->mod); 347 return -EINVAL; 348 } 349 350 set_bit(HINIC_PF_MBOX_CB_RUNNING, 351 &func_to_func->pf_mbox_cb_state[recv_mbox->mod]); 352 353 cb = func_to_func->pf_mbox_cb[recv_mbox->mod]; 354 if (cb && test_bit(HINIC_PF_MBOX_CB_REG, 355 &func_to_func->pf_mbox_cb_state[recv_mbox->mod])) { 356 vf_id = src_func_idx - 357 hinic_glb_pf_vf_offset(func_to_func->hwif); 358 ret = cb(func_to_func->hwdev, vf_id, recv_mbox->cmd, 359 recv_mbox->mbox, recv_mbox->mbox_len, 360 buf_out, out_size); 361 } else { 362 dev_err(&func_to_func->hwif->pdev->dev, "PF mbox mod(0x%x) cb is not registered\n", 363 recv_mbox->mod); 364 ret = -EINVAL; 365 } 366 367 clear_bit(HINIC_PF_MBOX_CB_RUNNING, 368 &func_to_func->pf_mbox_cb_state[recv_mbox->mod]); 369 370 return ret; 371 } 372 373 static bool check_mbox_seq_id_and_seg_len(struct hinic_recv_mbox *recv_mbox, 374 u8 seq_id, u8 seg_len) 375 { 376 if (seq_id > SEQ_ID_MAX_VAL || seg_len > MBOX_SEG_LEN || 377 (seq_id == SEQ_ID_MAX_VAL && seg_len > MBOX_LAST_SEG_MAX_LEN)) 378 return false; 379 380 if (seq_id == 0) { 381 recv_mbox->seq_id = seq_id; 382 } else { 383 if (seq_id != recv_mbox->seq_id + 1) 384 return false; 385 386 recv_mbox->seq_id = seq_id; 387 } 388 389 return true; 390 } 391 392 static void resp_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 393 struct hinic_recv_mbox *recv_mbox) 394 { 395 spin_lock(&func_to_func->mbox_lock); 396 if (recv_mbox->msg_info.msg_id == func_to_func->send_msg_id && 397 func_to_func->event_flag == EVENT_START) 398 complete(&recv_mbox->recv_done); 399 else 400 dev_err(&func_to_func->hwif->pdev->dev, 401 "Mbox response timeout, current send msg id(0x%x), recv msg id(0x%x), status(0x%x)\n", 402 func_to_func->send_msg_id, recv_mbox->msg_info.msg_id, 403 recv_mbox->msg_info.status); 404 spin_unlock(&func_to_func->mbox_lock); 405 } 406 407 static void recv_func_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 408 struct hinic_recv_mbox *recv_mbox, 409 u16 src_func_idx); 410 411 static void recv_func_mbox_work_handler(struct work_struct *work) 412 { 413 struct hinic_mbox_work *mbox_work = 414 container_of(work, struct hinic_mbox_work, work); 415 struct hinic_recv_mbox *recv_mbox; 416 417 recv_func_mbox_handler(mbox_work->func_to_func, mbox_work->recv_mbox, 418 mbox_work->src_func_idx); 419 420 recv_mbox = 421 &mbox_work->func_to_func->mbox_send[mbox_work->src_func_idx]; 422 423 atomic_dec(&recv_mbox->msg_cnt); 424 425 kfree(mbox_work); 426 } 427 428 static void recv_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 429 void *header, struct hinic_recv_mbox *recv_mbox) 430 { 431 void *mbox_body = MBOX_BODY_FROM_HDR(header); 432 struct hinic_recv_mbox *rcv_mbox_temp = NULL; 433 u64 mbox_header = *((u64 *)header); 434 struct hinic_mbox_work *mbox_work; 435 u8 seq_id, seg_len; 436 u16 src_func_idx; 437 int pos; 438 439 seq_id = HINIC_MBOX_HEADER_GET(mbox_header, SEQID); 440 seg_len = HINIC_MBOX_HEADER_GET(mbox_header, SEG_LEN); 441 src_func_idx = HINIC_MBOX_HEADER_GET(mbox_header, SRC_GLB_FUNC_IDX); 442 443 if (!check_mbox_seq_id_and_seg_len(recv_mbox, seq_id, seg_len)) { 444 dev_err(&func_to_func->hwif->pdev->dev, 445 "Mailbox sequence and segment check fail, src func id: 0x%x, front id: 0x%x, current id: 0x%x, seg len: 0x%x\n", 446 src_func_idx, recv_mbox->seq_id, seq_id, seg_len); 447 recv_mbox->seq_id = SEQ_ID_MAX_VAL; 448 return; 449 } 450 451 pos = seq_id * MBOX_SEG_LEN; 452 memcpy((u8 *)recv_mbox->mbox + pos, mbox_body, 453 HINIC_MBOX_HEADER_GET(mbox_header, SEG_LEN)); 454 455 if (!HINIC_MBOX_HEADER_GET(mbox_header, LAST)) 456 return; 457 458 recv_mbox->cmd = HINIC_MBOX_HEADER_GET(mbox_header, CMD); 459 recv_mbox->mod = HINIC_MBOX_HEADER_GET(mbox_header, MODULE); 460 recv_mbox->mbox_len = HINIC_MBOX_HEADER_GET(mbox_header, MSG_LEN); 461 recv_mbox->ack_type = HINIC_MBOX_HEADER_GET(mbox_header, NO_ACK); 462 recv_mbox->msg_info.msg_id = HINIC_MBOX_HEADER_GET(mbox_header, MSG_ID); 463 recv_mbox->msg_info.status = HINIC_MBOX_HEADER_GET(mbox_header, STATUS); 464 recv_mbox->seq_id = SEQ_ID_MAX_VAL; 465 466 if (HINIC_MBOX_HEADER_GET(mbox_header, DIRECTION) == 467 HINIC_HWIF_RESPONSE) { 468 resp_mbox_handler(func_to_func, recv_mbox); 469 return; 470 } 471 472 if (atomic_read(&recv_mbox->msg_cnt) > HINIC_MAX_MSG_CNT_TO_PROCESS) { 473 dev_warn(&func_to_func->hwif->pdev->dev, 474 "This function(%u) have %d message wait to process,can't add to work queue\n", 475 src_func_idx, atomic_read(&recv_mbox->msg_cnt)); 476 return; 477 } 478 479 rcv_mbox_temp = kmemdup(recv_mbox, sizeof(*rcv_mbox_temp), GFP_KERNEL); 480 if (!rcv_mbox_temp) 481 return; 482 483 rcv_mbox_temp->mbox = kmemdup(recv_mbox->mbox, MBOX_MAX_BUF_SZ, 484 GFP_KERNEL); 485 if (!rcv_mbox_temp->mbox) 486 goto err_alloc_rcv_mbox_msg; 487 488 rcv_mbox_temp->buf_out = kzalloc(MBOX_MAX_BUF_SZ, GFP_KERNEL); 489 if (!rcv_mbox_temp->buf_out) 490 goto err_alloc_rcv_mbox_buf; 491 492 mbox_work = kzalloc_obj(*mbox_work); 493 if (!mbox_work) 494 goto err_alloc_mbox_work; 495 496 mbox_work->func_to_func = func_to_func; 497 mbox_work->recv_mbox = rcv_mbox_temp; 498 mbox_work->src_func_idx = src_func_idx; 499 500 atomic_inc(&recv_mbox->msg_cnt); 501 INIT_WORK(&mbox_work->work, recv_func_mbox_work_handler); 502 queue_work(func_to_func->workq, &mbox_work->work); 503 504 return; 505 506 err_alloc_mbox_work: 507 kfree(rcv_mbox_temp->buf_out); 508 509 err_alloc_rcv_mbox_buf: 510 kfree(rcv_mbox_temp->mbox); 511 512 err_alloc_rcv_mbox_msg: 513 kfree(rcv_mbox_temp); 514 } 515 516 static int set_vf_mbox_random_id(struct hinic_hwdev *hwdev, u16 func_id) 517 { 518 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 519 struct hinic_set_random_id rand_info = {0}; 520 u16 out_size = sizeof(rand_info); 521 struct hinic_pfhwdev *pfhwdev; 522 int ret; 523 524 pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev); 525 526 rand_info.version = HINIC_CMD_VER_FUNC_ID; 527 rand_info.func_idx = func_id; 528 rand_info.vf_in_pf = func_id - hinic_glb_pf_vf_offset(hwdev->hwif); 529 rand_info.random_id = get_random_u32(); 530 531 func_to_func->vf_mbx_rand_id[func_id] = rand_info.random_id; 532 533 ret = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM, 534 HINIC_MGMT_CMD_SET_VF_RANDOM_ID, 535 &rand_info, sizeof(rand_info), 536 &rand_info, &out_size, HINIC_MGMT_MSG_SYNC); 537 if ((rand_info.status != HINIC_MGMT_CMD_UNSUPPORTED && 538 rand_info.status) || !out_size || ret) { 539 dev_err(&hwdev->hwif->pdev->dev, "Set VF random id failed, err: %d, status: 0x%x, out size: 0x%x\n", 540 ret, rand_info.status, out_size); 541 return -EIO; 542 } 543 544 if (rand_info.status == HINIC_MGMT_CMD_UNSUPPORTED) 545 return rand_info.status; 546 547 func_to_func->vf_mbx_old_rand_id[func_id] = 548 func_to_func->vf_mbx_rand_id[func_id]; 549 550 return 0; 551 } 552 553 static void update_random_id_work_handler(struct work_struct *work) 554 { 555 struct hinic_mbox_work *mbox_work = 556 container_of(work, struct hinic_mbox_work, work); 557 struct hinic_mbox_func_to_func *func_to_func; 558 u16 src = mbox_work->src_func_idx; 559 560 func_to_func = mbox_work->func_to_func; 561 562 if (set_vf_mbox_random_id(func_to_func->hwdev, src)) 563 dev_warn(&func_to_func->hwdev->hwif->pdev->dev, "Update VF id: 0x%x random id failed\n", 564 mbox_work->src_func_idx); 565 566 kfree(mbox_work); 567 } 568 569 static bool check_vf_mbox_random_id(struct hinic_mbox_func_to_func *func_to_func, 570 u8 *header) 571 { 572 struct hinic_hwdev *hwdev = func_to_func->hwdev; 573 struct hinic_mbox_work *mbox_work = NULL; 574 u64 mbox_header = *((u64 *)header); 575 u16 offset, src; 576 u32 random_id; 577 int vf_in_pf; 578 579 src = HINIC_MBOX_HEADER_GET(mbox_header, SRC_GLB_FUNC_IDX); 580 581 if (IS_PF_OR_PPF_SRC(src) || !func_to_func->support_vf_random) 582 return true; 583 584 if (!HINIC_IS_PPF(hwdev->hwif)) { 585 offset = hinic_glb_pf_vf_offset(hwdev->hwif); 586 vf_in_pf = src - offset; 587 588 if (vf_in_pf < 1 || vf_in_pf > hwdev->nic_cap.max_vf) { 589 dev_warn(&hwdev->hwif->pdev->dev, 590 "Receive vf id(0x%x) is invalid, vf id should be from 0x%x to 0x%x\n", 591 src, offset + 1, 592 hwdev->nic_cap.max_vf + offset); 593 return false; 594 } 595 } 596 597 random_id = be32_to_cpu(*(u32 *)(header + MBOX_SEG_LEN + 598 MBOX_HEADER_SZ)); 599 600 if (random_id == func_to_func->vf_mbx_rand_id[src] || 601 random_id == func_to_func->vf_mbx_old_rand_id[src]) 602 return true; 603 604 dev_warn(&hwdev->hwif->pdev->dev, 605 "The mailbox random id(0x%x) of func_id(0x%x) doesn't match with pf reservation(0x%x)\n", 606 random_id, src, func_to_func->vf_mbx_rand_id[src]); 607 608 mbox_work = kzalloc_obj(*mbox_work); 609 if (!mbox_work) 610 return false; 611 612 mbox_work->func_to_func = func_to_func; 613 mbox_work->src_func_idx = src; 614 615 INIT_WORK(&mbox_work->work, update_random_id_work_handler); 616 queue_work(func_to_func->workq, &mbox_work->work); 617 618 return false; 619 } 620 621 static void hinic_mbox_func_aeqe_handler(void *handle, void *header, u8 size) 622 { 623 struct hinic_mbox_func_to_func *func_to_func; 624 u64 mbox_header = *((u64 *)header); 625 struct hinic_recv_mbox *recv_mbox; 626 u64 src, dir; 627 628 func_to_func = ((struct hinic_hwdev *)handle)->func_to_func; 629 630 dir = HINIC_MBOX_HEADER_GET(mbox_header, DIRECTION); 631 src = HINIC_MBOX_HEADER_GET(mbox_header, SRC_GLB_FUNC_IDX); 632 633 if (src >= HINIC_MAX_FUNCTIONS) { 634 dev_err(&func_to_func->hwif->pdev->dev, 635 "Mailbox source function id:%u is invalid\n", (u32)src); 636 return; 637 } 638 639 if (!check_vf_mbox_random_id(func_to_func, header)) 640 return; 641 642 recv_mbox = (dir == HINIC_HWIF_DIRECT_SEND) ? 643 &func_to_func->mbox_send[src] : 644 &func_to_func->mbox_resp[src]; 645 646 recv_mbox_handler(func_to_func, (u64 *)header, recv_mbox); 647 } 648 649 static void hinic_mbox_self_aeqe_handler(void *handle, void *header, u8 size) 650 { 651 struct hinic_mbox_func_to_func *func_to_func; 652 struct hinic_send_mbox *send_mbox; 653 654 func_to_func = ((struct hinic_hwdev *)handle)->func_to_func; 655 send_mbox = &func_to_func->send_mbox; 656 657 complete(&send_mbox->send_done); 658 } 659 660 static void clear_mbox_status(struct hinic_send_mbox *mbox) 661 { 662 *mbox->wb_status = 0; 663 664 /* clear mailbox write back status */ 665 wmb(); 666 } 667 668 static void mbox_copy_header(struct hinic_hwdev *hwdev, 669 struct hinic_send_mbox *mbox, u64 *header) 670 { 671 u32 i, idx_max = MBOX_HEADER_SZ / sizeof(u32); 672 u32 *data = (u32 *)header; 673 674 for (i = 0; i < idx_max; i++) 675 __raw_writel(*(data + i), mbox->data + i * sizeof(u32)); 676 } 677 678 static void mbox_copy_send_data(struct hinic_hwdev *hwdev, 679 struct hinic_send_mbox *mbox, void *seg, 680 u16 seg_len) 681 { 682 u8 mbox_max_buf[MBOX_SEG_LEN] = {0}; 683 u32 data_len, chk_sz = sizeof(u32); 684 u32 *data = seg; 685 u32 i, idx_max; 686 687 /* The mbox message should be aligned in 4 bytes. */ 688 if (seg_len % chk_sz) { 689 memcpy(mbox_max_buf, seg, seg_len); 690 data = (u32 *)mbox_max_buf; 691 } 692 693 data_len = seg_len; 694 idx_max = ALIGN(data_len, chk_sz) / chk_sz; 695 696 for (i = 0; i < idx_max; i++) 697 __raw_writel(*(data + i), 698 mbox->data + MBOX_HEADER_SZ + i * sizeof(u32)); 699 } 700 701 static void write_mbox_msg_attr(struct hinic_mbox_func_to_func *func_to_func, 702 u16 dst_func, u16 dst_aeqn, u16 seg_len, 703 int poll) 704 { 705 u16 rsp_aeq = (dst_aeqn == 0) ? 0 : HINIC_MBOX_RSP_AEQN; 706 u32 mbox_int, mbox_ctrl; 707 708 mbox_int = HINIC_MBOX_INT_SET(dst_func, DST_FUNC) | 709 HINIC_MBOX_INT_SET(dst_aeqn, DST_AEQN) | 710 HINIC_MBOX_INT_SET(rsp_aeq, SRC_RESP_AEQN) | 711 HINIC_MBOX_INT_SET(NO_DMA_ATTRIBUTE_VAL, STAT_DMA) | 712 HINIC_MBOX_INT_SET(ALIGN(MBOX_SEG_LEN + MBOX_HEADER_SZ + 713 MBOX_INFO_SZ, MBOX_SEG_LEN_ALIGN) >> 2, 714 TX_SIZE) | 715 HINIC_MBOX_INT_SET(STRONG_ORDER, STAT_DMA_SO_RO) | 716 HINIC_MBOX_INT_SET(WRITE_BACK, WB_EN); 717 718 hinic_hwif_write_reg(func_to_func->hwif, 719 HINIC_FUNC_CSR_MAILBOX_INT_OFFSET_OFF, mbox_int); 720 721 wmb(); /* writing the mbox int attributes */ 722 mbox_ctrl = HINIC_MBOX_CTRL_SET(TX_NOT_DONE, TX_STATUS); 723 724 if (poll) 725 mbox_ctrl |= HINIC_MBOX_CTRL_SET(NOT_TRIGGER, TRIGGER_AEQE); 726 else 727 mbox_ctrl |= HINIC_MBOX_CTRL_SET(TRIGGER, TRIGGER_AEQE); 728 729 hinic_hwif_write_reg(func_to_func->hwif, 730 HINIC_FUNC_CSR_MAILBOX_CONTROL_OFF, mbox_ctrl); 731 } 732 733 static void dump_mox_reg(struct hinic_hwdev *hwdev) 734 { 735 u32 val; 736 737 val = hinic_hwif_read_reg(hwdev->hwif, 738 HINIC_FUNC_CSR_MAILBOX_CONTROL_OFF); 739 dev_err(&hwdev->hwif->pdev->dev, "Mailbox control reg: 0x%x\n", val); 740 741 val = hinic_hwif_read_reg(hwdev->hwif, 742 HINIC_FUNC_CSR_MAILBOX_INT_OFFSET_OFF); 743 dev_err(&hwdev->hwif->pdev->dev, "Mailbox interrupt offset: 0x%x\n", 744 val); 745 } 746 747 static u16 get_mbox_status(struct hinic_send_mbox *mbox) 748 { 749 /* write back is 16B, but only use first 4B */ 750 u64 wb_val = be64_to_cpu(*mbox->wb_status); 751 752 rmb(); /* verify reading before check */ 753 754 return (u16)(wb_val & MBOX_WB_STATUS_ERRCODE_MASK); 755 } 756 757 static int 758 wait_for_mbox_seg_completion(struct hinic_mbox_func_to_func *func_to_func, 759 int poll, u16 *wb_status) 760 { 761 struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox; 762 struct hinic_hwdev *hwdev = func_to_func->hwdev; 763 struct completion *done = &send_mbox->send_done; 764 u32 cnt = 0; 765 unsigned long jif; 766 767 if (poll) { 768 while (cnt < MBOX_MSG_POLLING_TIMEOUT) { 769 *wb_status = get_mbox_status(send_mbox); 770 if (MBOX_STATUS_FINISHED(*wb_status)) 771 break; 772 773 usleep_range(900, 1000); 774 cnt++; 775 } 776 777 if (cnt == MBOX_MSG_POLLING_TIMEOUT) { 778 dev_err(&hwdev->hwif->pdev->dev, "Send mailbox segment timeout, wb status: 0x%x\n", 779 *wb_status); 780 dump_mox_reg(hwdev); 781 return -ETIMEDOUT; 782 } 783 } else { 784 jif = msecs_to_jiffies(HINIC_MBOX_COMP_TIME); 785 if (!wait_for_completion_timeout(done, jif)) { 786 dev_err(&hwdev->hwif->pdev->dev, "Send mailbox segment timeout\n"); 787 dump_mox_reg(hwdev); 788 hinic_dump_aeq_info(hwdev); 789 return -ETIMEDOUT; 790 } 791 792 *wb_status = get_mbox_status(send_mbox); 793 } 794 795 return 0; 796 } 797 798 static int send_mbox_seg(struct hinic_mbox_func_to_func *func_to_func, 799 u64 header, u16 dst_func, void *seg, u16 seg_len, 800 int poll, void *msg_info) 801 { 802 struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox; 803 u16 seq_dir = HINIC_MBOX_HEADER_GET(header, DIRECTION); 804 struct hinic_hwdev *hwdev = func_to_func->hwdev; 805 struct completion *done = &send_mbox->send_done; 806 u8 num_aeqs = hwdev->hwif->attr.num_aeqs; 807 u16 dst_aeqn, wb_status = 0, errcode; 808 809 if (num_aeqs >= 4) 810 dst_aeqn = (seq_dir == HINIC_HWIF_DIRECT_SEND) ? 811 HINIC_MBOX_RECV_AEQN : HINIC_MBOX_RSP_AEQN; 812 else 813 dst_aeqn = 0; 814 815 if (!poll) 816 init_completion(done); 817 818 clear_mbox_status(send_mbox); 819 820 mbox_copy_header(hwdev, send_mbox, &header); 821 822 mbox_copy_send_data(hwdev, send_mbox, seg, seg_len); 823 824 write_mbox_msg_attr(func_to_func, dst_func, dst_aeqn, seg_len, poll); 825 826 wmb(); /* writing the mbox msg attributes */ 827 828 if (wait_for_mbox_seg_completion(func_to_func, poll, &wb_status)) 829 return -ETIMEDOUT; 830 831 if (!MBOX_STATUS_SUCCESS(wb_status)) { 832 dev_err(&hwdev->hwif->pdev->dev, "Send mailbox segment to function %d error, wb status: 0x%x\n", 833 dst_func, wb_status); 834 errcode = MBOX_STATUS_ERRCODE(wb_status); 835 return errcode ? errcode : -EFAULT; 836 } 837 838 return 0; 839 } 840 841 static int send_mbox_to_func(struct hinic_mbox_func_to_func *func_to_func, 842 enum hinic_mod_type mod, u16 cmd, void *msg, 843 u16 msg_len, u16 dst_func, 844 enum hinic_hwif_direction_type direction, 845 enum hinic_mbox_ack_type ack_type, 846 struct mbox_msg_info *msg_info) 847 { 848 struct hinic_hwdev *hwdev = func_to_func->hwdev; 849 u16 seg_len = MBOX_SEG_LEN; 850 u8 *msg_seg = (u8 *)msg; 851 u16 left = msg_len; 852 u32 seq_id = 0; 853 u64 header = 0; 854 int err = 0; 855 856 down(&func_to_func->msg_send_sem); 857 858 header = HINIC_MBOX_HEADER_SET(msg_len, MSG_LEN) | 859 HINIC_MBOX_HEADER_SET(mod, MODULE) | 860 HINIC_MBOX_HEADER_SET(seg_len, SEG_LEN) | 861 HINIC_MBOX_HEADER_SET(ack_type, NO_ACK) | 862 HINIC_MBOX_HEADER_SET(SEQ_ID_START_VAL, SEQID) | 863 HINIC_MBOX_HEADER_SET(NOT_LAST_SEG, LAST) | 864 HINIC_MBOX_HEADER_SET(direction, DIRECTION) | 865 HINIC_MBOX_HEADER_SET(cmd, CMD) | 866 /* The vf's offset to its associated pf */ 867 HINIC_MBOX_HEADER_SET(msg_info->msg_id, MSG_ID) | 868 HINIC_MBOX_HEADER_SET(msg_info->status, STATUS) | 869 HINIC_MBOX_HEADER_SET(hinic_global_func_id_hw(hwdev->hwif), 870 SRC_GLB_FUNC_IDX); 871 872 while (!(HINIC_MBOX_HEADER_GET(header, LAST))) { 873 if (left <= HINIC_MBOX_SEG_LEN) { 874 header &= ~MBOX_SEGLEN_MASK; 875 header |= HINIC_MBOX_HEADER_SET(left, SEG_LEN); 876 header |= HINIC_MBOX_HEADER_SET(LAST_SEG, LAST); 877 878 seg_len = left; 879 } 880 881 err = send_mbox_seg(func_to_func, header, dst_func, msg_seg, 882 seg_len, MBOX_SEND_MSG_INT, msg_info); 883 if (err) { 884 dev_err(&hwdev->hwif->pdev->dev, "Failed to send mbox seg, seq_id=0x%llx\n", 885 HINIC_MBOX_HEADER_GET(header, SEQID)); 886 goto err_send_mbox_seg; 887 } 888 889 left -= HINIC_MBOX_SEG_LEN; 890 msg_seg += HINIC_MBOX_SEG_LEN; 891 892 seq_id++; 893 header &= ~(HINIC_MBOX_HEADER_SET(HINIC_MBOX_HEADER_SEQID_MASK, 894 SEQID)); 895 header |= HINIC_MBOX_HEADER_SET(seq_id, SEQID); 896 } 897 898 err_send_mbox_seg: 899 up(&func_to_func->msg_send_sem); 900 901 return err; 902 } 903 904 static void 905 response_for_recv_func_mbox(struct hinic_mbox_func_to_func *func_to_func, 906 struct hinic_recv_mbox *recv_mbox, int err, 907 u16 out_size, u16 src_func_idx) 908 { 909 struct mbox_msg_info msg_info = {0}; 910 911 if (recv_mbox->ack_type == MBOX_ACK) { 912 msg_info.msg_id = recv_mbox->msg_info.msg_id; 913 if (err == HINIC_MBOX_PF_BUSY_ACTIVE_FW) 914 msg_info.status = HINIC_MBOX_PF_BUSY_ACTIVE_FW; 915 else if (err == HINIC_MBOX_VF_CMD_ERROR) 916 msg_info.status = HINIC_MBOX_VF_CMD_ERROR; 917 else if (err) 918 msg_info.status = HINIC_MBOX_PF_SEND_ERR; 919 920 /* if no data needs to response, set out_size to 1 */ 921 if (!out_size || err) 922 out_size = MBOX_MSG_NO_DATA_LEN; 923 924 send_mbox_to_func(func_to_func, recv_mbox->mod, recv_mbox->cmd, 925 recv_mbox->buf_out, out_size, src_func_idx, 926 HINIC_HWIF_RESPONSE, MBOX_ACK, 927 &msg_info); 928 } 929 } 930 931 static void recv_func_mbox_handler(struct hinic_mbox_func_to_func *func_to_func, 932 struct hinic_recv_mbox *recv_mbox, 933 u16 src_func_idx) 934 { 935 void *buf_out = recv_mbox->buf_out; 936 u16 out_size = MBOX_MAX_BUF_SZ; 937 int err = 0; 938 939 if (HINIC_IS_VF(func_to_func->hwif)) { 940 err = recv_vf_mbox_handler(func_to_func, recv_mbox, buf_out, 941 &out_size); 942 } else { 943 if (IS_PF_OR_PPF_SRC(src_func_idx)) 944 dev_warn(&func_to_func->hwif->pdev->dev, 945 "Unsupported pf2pf mbox msg\n"); 946 else 947 err = recv_pf_from_vf_mbox_handler(func_to_func, 948 recv_mbox, 949 src_func_idx, 950 buf_out, &out_size); 951 } 952 953 response_for_recv_func_mbox(func_to_func, recv_mbox, err, out_size, 954 src_func_idx); 955 kfree(recv_mbox->buf_out); 956 kfree(recv_mbox->mbox); 957 kfree(recv_mbox); 958 } 959 960 static void set_mbox_to_func_event(struct hinic_mbox_func_to_func *func_to_func, 961 enum mbox_event_state event_flag) 962 { 963 spin_lock(&func_to_func->mbox_lock); 964 func_to_func->event_flag = event_flag; 965 spin_unlock(&func_to_func->mbox_lock); 966 } 967 968 static int mbox_resp_info_handler(struct hinic_mbox_func_to_func *func_to_func, 969 struct hinic_recv_mbox *mbox_for_resp, 970 enum hinic_mod_type mod, u16 cmd, 971 void *buf_out, u16 *out_size) 972 { 973 int err; 974 975 if (mbox_for_resp->msg_info.status) { 976 err = mbox_for_resp->msg_info.status; 977 if (err != HINIC_MBOX_PF_BUSY_ACTIVE_FW) 978 dev_err(&func_to_func->hwif->pdev->dev, "Mbox response error(0x%x)\n", 979 mbox_for_resp->msg_info.status); 980 return err; 981 } 982 983 if (buf_out && out_size) { 984 if (*out_size < mbox_for_resp->mbox_len) { 985 dev_err(&func_to_func->hwif->pdev->dev, 986 "Invalid response mbox message length: %d for mod %d cmd %d, should less than: %d\n", 987 mbox_for_resp->mbox_len, mod, cmd, *out_size); 988 return -EFAULT; 989 } 990 991 if (mbox_for_resp->mbox_len) 992 memcpy(buf_out, mbox_for_resp->mbox, 993 mbox_for_resp->mbox_len); 994 995 *out_size = mbox_for_resp->mbox_len; 996 } 997 998 return 0; 999 } 1000 1001 int hinic_mbox_to_func(struct hinic_mbox_func_to_func *func_to_func, 1002 enum hinic_mod_type mod, u16 cmd, u16 dst_func, 1003 void *buf_in, u16 in_size, void *buf_out, 1004 u16 *out_size, u32 timeout) 1005 { 1006 struct hinic_recv_mbox *mbox_for_resp; 1007 struct mbox_msg_info msg_info = {0}; 1008 unsigned long timeo; 1009 int err; 1010 1011 mbox_for_resp = &func_to_func->mbox_resp[dst_func]; 1012 1013 down(&func_to_func->mbox_send_sem); 1014 1015 init_completion(&mbox_for_resp->recv_done); 1016 1017 msg_info.msg_id = MBOX_MSG_ID_INC(func_to_func); 1018 1019 set_mbox_to_func_event(func_to_func, EVENT_START); 1020 1021 err = send_mbox_to_func(func_to_func, mod, cmd, buf_in, in_size, 1022 dst_func, HINIC_HWIF_DIRECT_SEND, MBOX_ACK, 1023 &msg_info); 1024 if (err) { 1025 dev_err(&func_to_func->hwif->pdev->dev, "Send mailbox failed, msg_id: %d\n", 1026 msg_info.msg_id); 1027 set_mbox_to_func_event(func_to_func, EVENT_FAIL); 1028 goto err_send_mbox; 1029 } 1030 1031 timeo = msecs_to_jiffies(timeout ? timeout : HINIC_MBOX_COMP_TIME); 1032 if (!wait_for_completion_timeout(&mbox_for_resp->recv_done, timeo)) { 1033 set_mbox_to_func_event(func_to_func, EVENT_TIMEOUT); 1034 dev_err(&func_to_func->hwif->pdev->dev, 1035 "Send mbox msg timeout, msg_id: %d\n", msg_info.msg_id); 1036 hinic_dump_aeq_info(func_to_func->hwdev); 1037 err = -ETIMEDOUT; 1038 goto err_send_mbox; 1039 } 1040 1041 set_mbox_to_func_event(func_to_func, EVENT_END); 1042 1043 err = mbox_resp_info_handler(func_to_func, mbox_for_resp, mod, cmd, 1044 buf_out, out_size); 1045 1046 err_send_mbox: 1047 up(&func_to_func->mbox_send_sem); 1048 1049 return err; 1050 } 1051 1052 static int mbox_func_params_valid(struct hinic_mbox_func_to_func *func_to_func, 1053 void *buf_in, u16 in_size) 1054 { 1055 if (in_size > HINIC_MBOX_DATA_SIZE) { 1056 dev_err(&func_to_func->hwif->pdev->dev, 1057 "Mbox msg len(%d) exceed limit(%d)\n", 1058 in_size, HINIC_MBOX_DATA_SIZE); 1059 return -EINVAL; 1060 } 1061 1062 return 0; 1063 } 1064 1065 int hinic_mbox_to_pf(struct hinic_hwdev *hwdev, 1066 enum hinic_mod_type mod, u8 cmd, void *buf_in, 1067 u16 in_size, void *buf_out, u16 *out_size, u32 timeout) 1068 { 1069 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 1070 int err = mbox_func_params_valid(func_to_func, buf_in, in_size); 1071 1072 if (err) 1073 return err; 1074 1075 if (!HINIC_IS_VF(hwdev->hwif)) { 1076 dev_err(&hwdev->hwif->pdev->dev, "Params error, func_type: %d\n", 1077 HINIC_FUNC_TYPE(hwdev->hwif)); 1078 return -EINVAL; 1079 } 1080 1081 return hinic_mbox_to_func(func_to_func, mod, cmd, 1082 hinic_pf_id_of_vf_hw(hwdev->hwif), buf_in, 1083 in_size, buf_out, out_size, timeout); 1084 } 1085 1086 int hinic_mbox_to_vf(struct hinic_hwdev *hwdev, 1087 enum hinic_mod_type mod, u16 vf_id, u8 cmd, void *buf_in, 1088 u16 in_size, void *buf_out, u16 *out_size, u32 timeout) 1089 { 1090 struct hinic_mbox_func_to_func *func_to_func; 1091 u16 dst_func_idx; 1092 int err; 1093 1094 if (!hwdev) 1095 return -EINVAL; 1096 1097 func_to_func = hwdev->func_to_func; 1098 err = mbox_func_params_valid(func_to_func, buf_in, in_size); 1099 if (err) 1100 return err; 1101 1102 if (HINIC_IS_VF(hwdev->hwif)) { 1103 dev_err(&hwdev->hwif->pdev->dev, "Params error, func_type: %d\n", 1104 HINIC_FUNC_TYPE(hwdev->hwif)); 1105 return -EINVAL; 1106 } 1107 1108 if (!vf_id) { 1109 dev_err(&hwdev->hwif->pdev->dev, 1110 "VF id(%d) error!\n", vf_id); 1111 return -EINVAL; 1112 } 1113 1114 /* vf_offset_to_pf + vf_id is the vf's global function id of vf in 1115 * this pf 1116 */ 1117 dst_func_idx = hinic_glb_pf_vf_offset(hwdev->hwif) + vf_id; 1118 1119 return hinic_mbox_to_func(func_to_func, mod, cmd, dst_func_idx, buf_in, 1120 in_size, buf_out, out_size, timeout); 1121 } 1122 1123 static int init_mbox_info(struct hinic_recv_mbox *mbox_info) 1124 { 1125 int err; 1126 1127 mbox_info->seq_id = SEQ_ID_MAX_VAL; 1128 1129 mbox_info->mbox = kzalloc(MBOX_MAX_BUF_SZ, GFP_KERNEL); 1130 if (!mbox_info->mbox) 1131 return -ENOMEM; 1132 1133 mbox_info->buf_out = kzalloc(MBOX_MAX_BUF_SZ, GFP_KERNEL); 1134 if (!mbox_info->buf_out) { 1135 err = -ENOMEM; 1136 goto err_alloc_buf_out; 1137 } 1138 1139 atomic_set(&mbox_info->msg_cnt, 0); 1140 1141 return 0; 1142 1143 err_alloc_buf_out: 1144 kfree(mbox_info->mbox); 1145 1146 return err; 1147 } 1148 1149 static void clean_mbox_info(struct hinic_recv_mbox *mbox_info) 1150 { 1151 kfree(mbox_info->buf_out); 1152 kfree(mbox_info->mbox); 1153 } 1154 1155 static int alloc_mbox_info(struct hinic_hwdev *hwdev, 1156 struct hinic_recv_mbox *mbox_info) 1157 { 1158 u16 func_idx, i; 1159 int err; 1160 1161 for (func_idx = 0; func_idx < HINIC_MAX_FUNCTIONS; func_idx++) { 1162 err = init_mbox_info(&mbox_info[func_idx]); 1163 if (err) { 1164 dev_err(&hwdev->hwif->pdev->dev, "Failed to init function %d mbox info\n", 1165 func_idx); 1166 goto err_init_mbox_info; 1167 } 1168 } 1169 1170 return 0; 1171 1172 err_init_mbox_info: 1173 for (i = 0; i < func_idx; i++) 1174 clean_mbox_info(&mbox_info[i]); 1175 1176 return err; 1177 } 1178 1179 static void free_mbox_info(struct hinic_recv_mbox *mbox_info) 1180 { 1181 u16 func_idx; 1182 1183 for (func_idx = 0; func_idx < HINIC_MAX_FUNCTIONS; func_idx++) 1184 clean_mbox_info(&mbox_info[func_idx]); 1185 } 1186 1187 static void prepare_send_mbox(struct hinic_mbox_func_to_func *func_to_func) 1188 { 1189 struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox; 1190 1191 send_mbox->data = MBOX_AREA(func_to_func->hwif); 1192 } 1193 1194 static int alloc_mbox_wb_status(struct hinic_mbox_func_to_func *func_to_func) 1195 { 1196 struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox; 1197 struct hinic_hwdev *hwdev = func_to_func->hwdev; 1198 u32 addr_h, addr_l; 1199 1200 send_mbox->wb_vaddr = dma_alloc_coherent(&hwdev->hwif->pdev->dev, 1201 MBOX_WB_STATUS_LEN, 1202 &send_mbox->wb_paddr, 1203 GFP_KERNEL); 1204 if (!send_mbox->wb_vaddr) 1205 return -ENOMEM; 1206 1207 send_mbox->wb_status = send_mbox->wb_vaddr; 1208 1209 addr_h = upper_32_bits(send_mbox->wb_paddr); 1210 addr_l = lower_32_bits(send_mbox->wb_paddr); 1211 1212 hinic_hwif_write_reg(hwdev->hwif, HINIC_FUNC_CSR_MAILBOX_RESULT_H_OFF, 1213 addr_h); 1214 hinic_hwif_write_reg(hwdev->hwif, HINIC_FUNC_CSR_MAILBOX_RESULT_L_OFF, 1215 addr_l); 1216 1217 return 0; 1218 } 1219 1220 static void free_mbox_wb_status(struct hinic_mbox_func_to_func *func_to_func) 1221 { 1222 struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox; 1223 struct hinic_hwdev *hwdev = func_to_func->hwdev; 1224 1225 hinic_hwif_write_reg(hwdev->hwif, HINIC_FUNC_CSR_MAILBOX_RESULT_H_OFF, 1226 0); 1227 hinic_hwif_write_reg(hwdev->hwif, HINIC_FUNC_CSR_MAILBOX_RESULT_L_OFF, 1228 0); 1229 1230 dma_free_coherent(&hwdev->hwif->pdev->dev, MBOX_WB_STATUS_LEN, 1231 send_mbox->wb_vaddr, 1232 send_mbox->wb_paddr); 1233 } 1234 1235 bool hinic_mbox_check_cmd_valid(struct hinic_hwdev *hwdev, 1236 struct vf_cmd_check_handle *cmd_handle, 1237 u16 vf_id, u8 cmd, void *buf_in, 1238 u16 in_size, u8 size) 1239 { 1240 u16 src_idx = vf_id + hinic_glb_pf_vf_offset(hwdev->hwif); 1241 int i; 1242 1243 for (i = 0; i < size; i++) { 1244 if (cmd == cmd_handle[i].cmd) { 1245 if (cmd_handle[i].check_cmd) 1246 return cmd_handle[i].check_cmd(hwdev, src_idx, 1247 buf_in, in_size); 1248 else 1249 return true; 1250 } 1251 } 1252 1253 dev_err(&hwdev->hwif->pdev->dev, 1254 "PF Receive VF(%d) unsupported cmd(0x%x)\n", 1255 vf_id + hinic_glb_pf_vf_offset(hwdev->hwif), cmd); 1256 1257 return false; 1258 } 1259 1260 static bool hinic_cmdq_check_vf_ctxt(struct hinic_hwdev *hwdev, 1261 struct hinic_cmdq_ctxt *cmdq_ctxt) 1262 { 1263 struct hinic_cmdq_ctxt_info *ctxt_info = &cmdq_ctxt->ctxt_info; 1264 u64 curr_pg_pfn, wq_block_pfn; 1265 1266 if (cmdq_ctxt->ppf_idx != HINIC_HWIF_PPF_IDX(hwdev->hwif) || 1267 cmdq_ctxt->cmdq_type > HINIC_MAX_CMDQ_TYPES) 1268 return false; 1269 1270 curr_pg_pfn = HINIC_CMDQ_CTXT_PAGE_INFO_GET 1271 (ctxt_info->curr_wqe_page_pfn, CURR_WQE_PAGE_PFN); 1272 wq_block_pfn = HINIC_CMDQ_CTXT_BLOCK_INFO_GET 1273 (ctxt_info->wq_block_pfn, WQ_BLOCK_PFN); 1274 /* VF must use 0-level CLA */ 1275 if (curr_pg_pfn != wq_block_pfn) 1276 return false; 1277 1278 return true; 1279 } 1280 1281 static bool check_cmdq_ctxt(struct hinic_hwdev *hwdev, u16 func_idx, 1282 void *buf_in, u16 in_size) 1283 { 1284 if (!hinic_mbox_check_func_id_8B(hwdev, func_idx, buf_in, in_size)) 1285 return false; 1286 1287 return hinic_cmdq_check_vf_ctxt(hwdev, buf_in); 1288 } 1289 1290 #define HW_CTX_QPS_VALID(hw_ctxt) \ 1291 ((hw_ctxt)->rq_depth >= HINIC_QUEUE_MIN_DEPTH && \ 1292 (hw_ctxt)->rq_depth <= HINIC_QUEUE_MAX_DEPTH && \ 1293 (hw_ctxt)->sq_depth >= HINIC_QUEUE_MIN_DEPTH && \ 1294 (hw_ctxt)->sq_depth <= HINIC_QUEUE_MAX_DEPTH && \ 1295 (hw_ctxt)->rx_buf_sz_idx <= HINIC_MAX_RX_BUFFER_SIZE) 1296 1297 static bool hw_ctxt_qps_param_valid(struct hinic_cmd_hw_ioctxt *hw_ctxt) 1298 { 1299 if (HW_CTX_QPS_VALID(hw_ctxt)) 1300 return true; 1301 1302 if (!hw_ctxt->rq_depth && !hw_ctxt->sq_depth && 1303 !hw_ctxt->rx_buf_sz_idx) 1304 return true; 1305 1306 return false; 1307 } 1308 1309 static bool check_hwctxt(struct hinic_hwdev *hwdev, u16 func_idx, 1310 void *buf_in, u16 in_size) 1311 { 1312 struct hinic_cmd_hw_ioctxt *hw_ctxt = buf_in; 1313 1314 if (!hinic_mbox_check_func_id_8B(hwdev, func_idx, buf_in, in_size)) 1315 return false; 1316 1317 if (hw_ctxt->ppf_idx != HINIC_HWIF_PPF_IDX(hwdev->hwif)) 1318 return false; 1319 1320 if (hw_ctxt->set_cmdq_depth) { 1321 if (hw_ctxt->cmdq_depth >= HINIC_QUEUE_MIN_DEPTH && 1322 hw_ctxt->cmdq_depth <= HINIC_QUEUE_MAX_DEPTH) 1323 return true; 1324 1325 return false; 1326 } 1327 1328 return hw_ctxt_qps_param_valid(hw_ctxt); 1329 } 1330 1331 static bool check_set_wq_page_size(struct hinic_hwdev *hwdev, u16 func_idx, 1332 void *buf_in, u16 in_size) 1333 { 1334 struct hinic_wq_page_size *page_size_info = buf_in; 1335 1336 if (!hinic_mbox_check_func_id_8B(hwdev, func_idx, buf_in, in_size)) 1337 return false; 1338 1339 if (page_size_info->ppf_idx != HINIC_HWIF_PPF_IDX(hwdev->hwif)) 1340 return false; 1341 1342 if (((1U << page_size_info->page_size) * SZ_4K) != 1343 HINIC_DEFAULT_WQ_PAGE_SIZE) 1344 return false; 1345 1346 return true; 1347 } 1348 1349 static struct vf_cmd_check_handle hw_cmd_support_vf[] = { 1350 {HINIC_COMM_CMD_START_FLR, hinic_mbox_check_func_id_8B}, 1351 {HINIC_COMM_CMD_DMA_ATTR_SET, hinic_mbox_check_func_id_8B}, 1352 {HINIC_COMM_CMD_CMDQ_CTXT_SET, check_cmdq_ctxt}, 1353 {HINIC_COMM_CMD_CMDQ_CTXT_GET, check_cmdq_ctxt}, 1354 {HINIC_COMM_CMD_HWCTXT_SET, check_hwctxt}, 1355 {HINIC_COMM_CMD_HWCTXT_GET, check_hwctxt}, 1356 {HINIC_COMM_CMD_SQ_HI_CI_SET, hinic_mbox_check_func_id_8B}, 1357 {HINIC_COMM_CMD_RES_STATE_SET, hinic_mbox_check_func_id_8B}, 1358 {HINIC_COMM_CMD_IO_RES_CLEAR, hinic_mbox_check_func_id_8B}, 1359 {HINIC_COMM_CMD_CEQ_CTRL_REG_WR_BY_UP, hinic_mbox_check_func_id_8B}, 1360 {HINIC_COMM_CMD_MSI_CTRL_REG_WR_BY_UP, hinic_mbox_check_func_id_8B}, 1361 {HINIC_COMM_CMD_MSI_CTRL_REG_RD_BY_UP, hinic_mbox_check_func_id_8B}, 1362 {HINIC_COMM_CMD_L2NIC_RESET, hinic_mbox_check_func_id_8B}, 1363 {HINIC_COMM_CMD_PAGESIZE_SET, check_set_wq_page_size}, 1364 }; 1365 1366 static int comm_pf_mbox_handler(void *handle, u16 vf_id, u8 cmd, void *buf_in, 1367 u16 in_size, void *buf_out, u16 *out_size) 1368 { 1369 u8 size = ARRAY_SIZE(hw_cmd_support_vf); 1370 struct hinic_hwdev *hwdev = handle; 1371 struct hinic_pfhwdev *pfhwdev; 1372 int err = 0; 1373 1374 pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev); 1375 1376 if (!hinic_mbox_check_cmd_valid(handle, hw_cmd_support_vf, vf_id, cmd, 1377 buf_in, in_size, size)) { 1378 dev_err(&hwdev->hwif->pdev->dev, 1379 "PF Receive VF: %d common cmd: 0x%x or mbox len: 0x%x is invalid\n", 1380 vf_id + hinic_glb_pf_vf_offset(hwdev->hwif), cmd, 1381 in_size); 1382 return HINIC_MBOX_VF_CMD_ERROR; 1383 } 1384 1385 if (cmd == HINIC_COMM_CMD_START_FLR) { 1386 *out_size = 0; 1387 } else { 1388 err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM, 1389 cmd, buf_in, in_size, buf_out, out_size, 1390 HINIC_MGMT_MSG_SYNC); 1391 if (err && err != HINIC_MBOX_PF_BUSY_ACTIVE_FW) 1392 dev_err(&hwdev->hwif->pdev->dev, 1393 "PF mbox common callback handler err: %d\n", 1394 err); 1395 } 1396 1397 return err; 1398 } 1399 1400 int hinic_func_to_func_init(struct hinic_hwdev *hwdev) 1401 { 1402 struct hinic_mbox_func_to_func *func_to_func; 1403 struct hinic_pfhwdev *pfhwdev; 1404 int err; 1405 1406 pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev); 1407 func_to_func = kzalloc_obj(*func_to_func); 1408 if (!func_to_func) 1409 return -ENOMEM; 1410 1411 hwdev->func_to_func = func_to_func; 1412 func_to_func->hwdev = hwdev; 1413 func_to_func->hwif = hwdev->hwif; 1414 sema_init(&func_to_func->mbox_send_sem, 1); 1415 sema_init(&func_to_func->msg_send_sem, 1); 1416 spin_lock_init(&func_to_func->mbox_lock); 1417 func_to_func->workq = create_singlethread_workqueue(HINIC_MBOX_WQ_NAME); 1418 if (!func_to_func->workq) { 1419 dev_err(&hwdev->hwif->pdev->dev, "Failed to initialize MBOX workqueue\n"); 1420 err = -ENOMEM; 1421 goto err_create_mbox_workq; 1422 } 1423 1424 err = alloc_mbox_info(hwdev, func_to_func->mbox_send); 1425 if (err) { 1426 dev_err(&hwdev->hwif->pdev->dev, "Failed to alloc mem for mbox_active\n"); 1427 goto err_alloc_mbox_for_send; 1428 } 1429 1430 err = alloc_mbox_info(hwdev, func_to_func->mbox_resp); 1431 if (err) { 1432 dev_err(&hwdev->hwif->pdev->dev, "Failed to alloc mem for mbox_passive\n"); 1433 goto err_alloc_mbox_for_resp; 1434 } 1435 1436 err = alloc_mbox_wb_status(func_to_func); 1437 if (err) { 1438 dev_err(&hwdev->hwif->pdev->dev, "Failed to alloc mbox write back status\n"); 1439 goto err_alloc_wb_status; 1440 } 1441 1442 prepare_send_mbox(func_to_func); 1443 1444 hinic_aeq_register_hw_cb(&hwdev->aeqs, HINIC_MBX_FROM_FUNC, 1445 &pfhwdev->hwdev, hinic_mbox_func_aeqe_handler); 1446 hinic_aeq_register_hw_cb(&hwdev->aeqs, HINIC_MBX_SEND_RSLT, 1447 &pfhwdev->hwdev, hinic_mbox_self_aeqe_handler); 1448 1449 if (!HINIC_IS_VF(hwdev->hwif)) 1450 hinic_register_pf_mbox_cb(hwdev, HINIC_MOD_COMM, 1451 comm_pf_mbox_handler); 1452 1453 return 0; 1454 1455 err_alloc_wb_status: 1456 free_mbox_info(func_to_func->mbox_resp); 1457 1458 err_alloc_mbox_for_resp: 1459 free_mbox_info(func_to_func->mbox_send); 1460 1461 err_alloc_mbox_for_send: 1462 destroy_workqueue(func_to_func->workq); 1463 1464 err_create_mbox_workq: 1465 kfree(func_to_func); 1466 1467 return err; 1468 } 1469 1470 void hinic_func_to_func_free(struct hinic_hwdev *hwdev) 1471 { 1472 struct hinic_mbox_func_to_func *func_to_func = hwdev->func_to_func; 1473 1474 hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MBX_FROM_FUNC); 1475 hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MBX_SEND_RSLT); 1476 1477 hinic_unregister_pf_mbox_cb(hwdev, HINIC_MOD_COMM); 1478 /* destroy workqueue before free related mbox resources in case of 1479 * illegal resource access 1480 */ 1481 destroy_workqueue(func_to_func->workq); 1482 1483 free_mbox_wb_status(func_to_func); 1484 free_mbox_info(func_to_func->mbox_resp); 1485 free_mbox_info(func_to_func->mbox_send); 1486 1487 kfree(func_to_func); 1488 } 1489 1490 int hinic_vf_mbox_random_id_init(struct hinic_hwdev *hwdev) 1491 { 1492 u16 vf_offset; 1493 u8 vf_in_pf; 1494 int err = 0; 1495 1496 if (HINIC_IS_VF(hwdev->hwif)) 1497 return 0; 1498 1499 vf_offset = hinic_glb_pf_vf_offset(hwdev->hwif); 1500 1501 for (vf_in_pf = 1; vf_in_pf <= hwdev->nic_cap.max_vf; vf_in_pf++) { 1502 err = set_vf_mbox_random_id(hwdev, vf_offset + vf_in_pf); 1503 if (err) 1504 break; 1505 } 1506 1507 if (err == HINIC_MGMT_CMD_UNSUPPORTED) { 1508 hwdev->func_to_func->support_vf_random = false; 1509 err = 0; 1510 dev_warn(&hwdev->hwif->pdev->dev, "Mgmt is unsupported to set VF%d random id\n", 1511 vf_in_pf - 1); 1512 } else if (!err) { 1513 hwdev->func_to_func->support_vf_random = true; 1514 } 1515 1516 return err; 1517 } 1518