xref: /linux/arch/arm/mach-omap2/omap54xx.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*:
3  * Address mappings and base address for OMAP5 interconnects
4  * and peripherals.
5  *
6  * Copyright (C) 2012 Texas Instruments
7  *	Santosh Shilimkar <santosh.shilimkar@ti.com>
8  *	Sricharan <r.sricharan@ti.com>
9  */
10 #ifndef __ASM_SOC_OMAP54XX_H
11 #define __ASM_SOC_OMAP54XX_H
12 
13 /*
14  * Please place only base defines here and put the rest in device
15  * specific headers.
16  */
17 #define L4_54XX_BASE			0x4a000000
18 #define L4_WK_54XX_BASE			0x4ae00000
19 #define L4_PER_54XX_BASE		0x48000000
20 #define L3_54XX_BASE			0x44000000
21 #define OMAP54XX_32KSYNCT_BASE		0x4ae04000
22 #define OMAP54XX_CM_CORE_AON_BASE	0x4a004000
23 #define OMAP54XX_CM_CORE_BASE		0x4a008000
24 #define OMAP54XX_PRM_BASE		0x4ae06000
25 #define OMAP54XX_PRCM_MPU_BASE		0x48243000
26 #define OMAP54XX_SCM_BASE		0x4a002000
27 #define OMAP54XX_CTRL_BASE		0x4a002800
28 #define OMAP54XX_SAR_RAM_BASE		0x4ae26000
29 
30 /* DRA7 specific base addresses */
31 #define L3_MAIN_SN_DRA7XX_BASE		0x44000000
32 #define L4_PER1_DRA7XX_BASE		0x48000000
33 #define L4_CFG_MPU_DRA7XX_BASE		0x48210000
34 #define L4_PER2_DRA7XX_BASE		0x48400000
35 #define L4_PER3_DRA7XX_BASE		0x48800000
36 #define L4_CFG_DRA7XX_BASE		0x4A000000
37 #define L4_WKUP_DRA7XX_BASE		0x4ae00000
38 #define DRA7XX_CM_CORE_AON_BASE		0x4a005000
39 #define DRA7XX_CTRL_BASE		0x4a003400
40 #define DRA7XX_TAP_BASE			0x4ae0c000
41 
42 #endif /* __ASM_SOC_OMAP555554XX_H */
43