1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 /* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
24
25 #ifndef AMDGPU_AMDKFD_H_INCLUDED
26 #define AMDGPU_AMDKFD_H_INCLUDED
27
28 #include <linux/list.h>
29 #include <linux/types.h>
30 #include <linux/mm.h>
31 #include <linux/kthread.h>
32 #include <linux/workqueue.h>
33 #include <linux/mmu_notifier.h>
34 #include <linux/memremap.h>
35 #include <kgd_kfd_interface.h>
36 #include <drm/drm_client.h>
37 #include "amdgpu_sync.h"
38 #include "amdgpu_vm.h"
39 #include "amdgpu_xcp.h"
40 #include "kfd_topology.h"
41 extern uint64_t amdgpu_amdkfd_total_mem_size;
42
43 enum TLB_FLUSH_TYPE {
44 TLB_FLUSH_LEGACY = 0,
45 TLB_FLUSH_LIGHTWEIGHT,
46 TLB_FLUSH_HEAVYWEIGHT
47 };
48
49 struct amdgpu_device;
50 struct kfd_process_device;
51 struct amdgpu_reset_context;
52
53 enum kfd_mem_attachment_type {
54 KFD_MEM_ATT_SHARED, /* Share kgd_mem->bo or another attachment's */
55 KFD_MEM_ATT_USERPTR, /* SG bo to DMA map pages from a userptr bo */
56 KFD_MEM_ATT_DMABUF, /* DMAbuf to DMA map TTM BOs */
57 KFD_MEM_ATT_SG /* Tag to DMA map SG BOs */
58 };
59
60 struct kfd_mem_attachment {
61 struct list_head list;
62 enum kfd_mem_attachment_type type;
63 bool is_mapped;
64 struct amdgpu_bo_va *bo_va;
65 struct amdgpu_device *adev;
66 uint64_t va;
67 uint64_t pte_flags;
68 };
69
70 struct kgd_mem {
71 struct mutex lock;
72 struct amdgpu_bo *bo;
73 struct dma_buf *dmabuf;
74 struct amdgpu_hmm_range *range;
75 struct list_head attachments;
76 /* protected by amdkfd_process_info.lock */
77 struct list_head validate_list;
78 uint32_t domain;
79 unsigned int mapped_to_gpu_memory;
80 uint64_t va;
81
82 uint32_t alloc_flags;
83
84 uint32_t invalid;
85 struct amdkfd_process_info *process_info;
86
87 struct amdgpu_sync sync;
88
89 uint32_t gem_handle;
90 bool aql_queue;
91 bool is_imported;
92 };
93
94 /* KFD Memory Eviction */
95 struct amdgpu_amdkfd_fence {
96 struct dma_fence base;
97 struct mm_struct *mm;
98 spinlock_t lock;
99 char timeline_name[TASK_COMM_LEN];
100 struct svm_range_bo *svm_bo;
101 uint16_t context_id;
102 };
103
104 struct amdgpu_kfd_dev {
105 struct kfd_dev *dev;
106 int64_t vram_used[MAX_XCP];
107 uint64_t vram_used_aligned[MAX_XCP];
108 bool init_complete;
109 struct work_struct reset_work;
110
111 /* Client for KFD BO GEM handle allocations */
112 struct drm_client_dev client;
113
114 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping
115 * Must be last --ends in a flexible-array member.
116 */
117 struct dev_pagemap pgmap;
118 };
119
120 enum kgd_engine_type {
121 KGD_ENGINE_PFP = 1,
122 KGD_ENGINE_ME,
123 KGD_ENGINE_CE,
124 KGD_ENGINE_MEC1,
125 KGD_ENGINE_MEC2,
126 KGD_ENGINE_RLC,
127 KGD_ENGINE_SDMA1,
128 KGD_ENGINE_SDMA2,
129 KGD_ENGINE_MAX
130 };
131
132
133 struct amdkfd_process_info {
134 /* List head of all VMs that belong to a KFD process */
135 struct list_head vm_list_head;
136 /* List head for all KFD BOs that belong to a KFD process. */
137 struct list_head kfd_bo_list;
138 /* List of userptr BOs that are valid or invalid */
139 struct list_head userptr_valid_list;
140 struct list_head userptr_inval_list;
141 /* Lock to protect kfd_bo_list */
142 struct mutex lock;
143
144 /* Number of VMs */
145 unsigned int n_vms;
146 /* Eviction Fence */
147 struct amdgpu_amdkfd_fence *eviction_fence;
148
149 /* MMU-notifier related fields */
150 struct mutex notifier_lock;
151 uint32_t evicted_bos;
152 /* kfd context id */
153 u16 context_id;
154 struct delayed_work restore_userptr_work;
155 struct pid *pid;
156 bool block_mmu_notifications;
157 };
158
159 int amdgpu_amdkfd_init(void);
160 void amdgpu_amdkfd_fini(void);
161 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev);
162
163 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc);
164 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc);
165 void amdgpu_amdkfd_suspend_process(struct amdgpu_device *adev);
166 int amdgpu_amdkfd_resume_process(struct amdgpu_device *adev);
167 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
168 const void *ih_ring_entry);
169 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
170 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
171 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
172 int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev);
173 void amdgpu_amdkfd_unlock_kfd(struct amdgpu_device *adev);
174 int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
175 enum kgd_engine_type engine,
176 uint32_t vmid, uint64_t gpu_addr,
177 uint32_t *ib_cmd, uint32_t ib_len);
178 void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
179 bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
180
181 bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
182
183 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev,
184 struct amdgpu_reset_context *reset_context);
185
186 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
187
188 void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
189
190 int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
191 int queue_bit);
192
193 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
194 struct mm_struct *mm,
195 struct svm_range_bo *svm_bo,
196 u16 context_id);
197
198 int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
199 #if defined(CONFIG_DEBUG_FS)
200 int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
201 #endif
202 #if IS_ENABLED(CONFIG_HSA_AMD)
203 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
204 struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
205 void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo);
206 int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
207 unsigned long cur_seq, struct kgd_mem *mem);
208 int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
209 uint32_t domain,
210 struct dma_fence *fence);
211 #else
212 static inline
amdkfd_fence_check_mm(struct dma_fence * f,struct mm_struct * mm)213 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
214 {
215 return false;
216 }
217
218 static inline
to_amdgpu_amdkfd_fence(struct dma_fence * f)219 struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
220 {
221 return NULL;
222 }
223
224 static inline
amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo * bo)225 void amdgpu_amdkfd_remove_all_eviction_fences(struct amdgpu_bo *bo)
226 {
227 }
228
229 static inline
amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier * mni,unsigned long cur_seq,struct kgd_mem * mem)230 int amdgpu_amdkfd_evict_userptr(struct mmu_interval_notifier *mni,
231 unsigned long cur_seq, struct kgd_mem *mem)
232 {
233 return 0;
234 }
235 static inline
amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo * bo,uint32_t domain,struct dma_fence * fence)236 int amdgpu_amdkfd_bo_validate_and_fence(struct amdgpu_bo *bo,
237 uint32_t domain,
238 struct dma_fence *fence)
239 {
240 return 0;
241 }
242 #endif
243 /* Shared API */
244 int amdgpu_amdkfd_alloc_kernel_mem(struct amdgpu_device *adev, size_t size,
245 u32 domain, void **mem_obj, uint64_t *gpu_addr,
246 void **cpu_ptr, bool mqd_gfx9);
247 void amdgpu_amdkfd_free_kernel_mem(struct amdgpu_device *adev, void **mem_obj);
248 int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
249 void **mem_obj);
250 void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
251 int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
252 int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
253 uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,
254 enum kgd_engine_type type);
255 void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
256 struct kfd_local_mem_info *mem_info,
257 struct amdgpu_xcp *xcp);
258 uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);
259
260 uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);
261 int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,
262 struct amdgpu_device **dmabuf_adev,
263 uint64_t *bo_size, void *metadata_buffer,
264 size_t buffer_size, uint32_t *metadata_size,
265 uint32_t *flags, int8_t *xcp_id);
266 int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);
267 int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,
268 uint32_t *payload);
269 int amdgpu_amdkfd_unmap_hiq(struct amdgpu_device *adev, u32 doorbell_off,
270 u32 inst);
271 int amdgpu_amdkfd_start_sched(struct amdgpu_device *adev, uint32_t node_id);
272 int amdgpu_amdkfd_stop_sched(struct amdgpu_device *adev, uint32_t node_id);
273 int amdgpu_amdkfd_config_sq_perfmon(struct amdgpu_device *adev, uint32_t xcp_id,
274 bool core_override_enable, bool reg_override_enable, bool perfmon_override_enable);
275 bool amdgpu_amdkfd_compute_active(struct amdgpu_device *adev, uint32_t node_id);
276
277
278 /* Read user wptr from a specified user address space with page fault
279 * disabled. The memory must be pinned and mapped to the hardware when
280 * this is called in hqd_load functions, so it should never fault in
281 * the first place. This resolves a circular lock dependency involving
282 * four locks, including the DQM lock and mmap_lock.
283 */
284 #define read_user_wptr(mmptr, wptr, dst) \
285 ({ \
286 bool valid = false; \
287 if ((mmptr) && (wptr)) { \
288 pagefault_disable(); \
289 if ((mmptr) == current->mm) { \
290 valid = !get_user((dst), (wptr)); \
291 } else if (current->flags & PF_KTHREAD) { \
292 kthread_use_mm(mmptr); \
293 valid = !get_user((dst), (wptr)); \
294 kthread_unuse_mm(mmptr); \
295 } \
296 pagefault_enable(); \
297 } \
298 valid; \
299 })
300
301 /* GPUVM API */
302 #define drm_priv_to_vm(drm_priv) \
303 (&((struct amdgpu_fpriv *) \
304 ((struct drm_file *)(drm_priv))->driver_priv)->vm)
305
306 int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
307 struct amdgpu_vm *avm,
308 void **process_info,
309 struct dma_fence **ef);
310 uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);
311 size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev,
312 uint8_t xcp_id);
313 int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
314 struct amdgpu_device *adev, uint64_t va, uint64_t size,
315 void *drm_priv, struct kgd_mem **mem,
316 uint64_t *offset, uint32_t flags, bool criu_resume);
317 int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
318 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,
319 uint64_t *size);
320 int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev,
321 struct kgd_mem *mem, void *drm_priv);
322 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
323 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
324 int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
325 int amdgpu_amdkfd_gpuvm_sync_memory(
326 struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
327 int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,
328 void **kptr, uint64_t *size);
329 void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_mem *mem);
330
331 int amdgpu_amdkfd_map_gtt_bo_to_gart(struct amdgpu_bo *bo, struct amdgpu_bo **bo_gart);
332
333 int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
334 struct dma_fence __rcu **ef);
335 int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,
336 struct kfd_vm_fault_info *info);
337 int amdgpu_amdkfd_gpuvm_import_dmabuf_fd(struct amdgpu_device *adev, int fd,
338 uint64_t va, void *drm_priv,
339 struct kgd_mem **mem, uint64_t *size,
340 uint64_t *mmap_offset);
341 int amdgpu_amdkfd_gpuvm_export_dmabuf(struct kgd_mem *mem,
342 struct dma_buf **dmabuf);
343 void amdgpu_amdkfd_debug_mem_fence(struct amdgpu_device *adev);
344 int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,
345 struct tile_config *config);
346 void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev,
347 enum amdgpu_ras_block block, uint32_t reset);
348
349 void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device *adev,
350 enum amdgpu_ras_block block, uint16_t pasid,
351 pasid_notify pasid_fn, void *data, uint32_t reset);
352
353 bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
354 bool amdgpu_amdkfd_bo_mapped_to_dev(void *drm_priv, struct kgd_mem *mem);
355 void amdgpu_amdkfd_block_mmu_notifications(void *p);
356 int amdgpu_amdkfd_criu_resume(void *p);
357 int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
358 uint64_t size, u32 alloc_flag, int8_t xcp_id);
359 void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
360 uint64_t size, u32 alloc_flag, int8_t xcp_id);
361 void amdgpu_amdkfd_clear_kfd_mapping(struct amdgpu_device *adev);
362
363 u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device *adev, int xcp_id);
364
365 #define KFD_XCP_MEM_ID(adev, xcp_id) \
366 ((adev)->xcp_mgr && (xcp_id) >= 0 ?\
367 (adev)->xcp_mgr->xcp[(xcp_id)].mem_id : -1)
368
369 #define KFD_XCP_MEMORY_SIZE(adev, xcp_id) amdgpu_amdkfd_xcp_memory_size((adev), (xcp_id))
370
371
372 #if IS_ENABLED(CONFIG_HSA_AMD)
373 void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
374 void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
375 struct amdgpu_vm *vm);
376
377 /**
378 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released
379 *
380 * Allows KFD to release its resources associated with the GEM object.
381 */
382 void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);
383 void amdgpu_amdkfd_reserve_system_mem(uint64_t size);
384 #else
385 static inline
amdgpu_amdkfd_gpuvm_init_mem_limits(void)386 void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
387 {
388 }
389
390 static inline
amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device * adev,struct amdgpu_vm * vm)391 void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
392 struct amdgpu_vm *vm)
393 {
394 }
395
396 static inline
amdgpu_amdkfd_release_notify(struct amdgpu_bo * bo)397 void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo)
398 {
399 }
400 #endif
401
402 #if IS_ENABLED(CONFIG_HSA_AMD_SVM)
403 int kgd2kfd_init_zone_device(struct amdgpu_device *adev);
404 #else
405 static inline
kgd2kfd_init_zone_device(struct amdgpu_device * adev)406 int kgd2kfd_init_zone_device(struct amdgpu_device *adev)
407 {
408 return 0;
409 }
410 #endif
411
412 /* KGD2KFD callbacks */
413 int kgd2kfd_quiesce_mm(struct mm_struct *mm, uint32_t trigger);
414 int kgd2kfd_resume_mm(struct mm_struct *mm);
415 int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
416 u16 context_id, struct dma_fence *fence);
417 #if IS_ENABLED(CONFIG_HSA_AMD)
418 int kgd2kfd_init(void);
419 void kgd2kfd_exit(void);
420 struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);
421 bool kgd2kfd_device_init(struct kfd_dev *kfd,
422 const struct kgd2kfd_shared_resources *gpu_resources);
423 void kgd2kfd_device_exit(struct kfd_dev *kfd);
424 void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc);
425 int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc);
426 void kgd2kfd_suspend_process(struct kfd_dev *kfd);
427 int kgd2kfd_resume_process(struct kfd_dev *kfd);
428 int kgd2kfd_pre_reset(struct kfd_dev *kfd,
429 struct amdgpu_reset_context *reset_context);
430 int kgd2kfd_post_reset(struct kfd_dev *kfd);
431 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
432 void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
433 void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask);
434 int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd);
435 void kgd2kfd_unlock_kfd(struct kfd_dev *kfd);
436 int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id);
437 int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd);
438 int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id);
439 int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd);
440 bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id);
441 bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
442 bool retry_fault);
443 void kgd2kfd_lock_kfd(void);
444 void kgd2kfd_teardown_processes(struct amdgpu_device *adev);
445
446 #else
kgd2kfd_init(void)447 static inline int kgd2kfd_init(void)
448 {
449 return -ENOENT;
450 }
451
kgd2kfd_exit(void)452 static inline void kgd2kfd_exit(void)
453 {
454 }
455
456 static inline
kgd2kfd_probe(struct amdgpu_device * adev,bool vf)457 struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
458 {
459 return NULL;
460 }
461
462 static inline
kgd2kfd_device_init(struct kfd_dev * kfd,const struct kgd2kfd_shared_resources * gpu_resources)463 bool kgd2kfd_device_init(struct kfd_dev *kfd,
464 const struct kgd2kfd_shared_resources *gpu_resources)
465 {
466 return false;
467 }
468
kgd2kfd_device_exit(struct kfd_dev * kfd)469 static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
470 {
471 }
472
kgd2kfd_suspend(struct kfd_dev * kfd,bool suspend_proc)473 static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool suspend_proc)
474 {
475 }
476
kgd2kfd_resume(struct kfd_dev * kfd,bool resume_proc)477 static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool resume_proc)
478 {
479 return 0;
480 }
481
kgd2kfd_suspend_process(struct kfd_dev * kfd)482 static inline void kgd2kfd_suspend_process(struct kfd_dev *kfd)
483 {
484 }
485
kgd2kfd_resume_process(struct kfd_dev * kfd)486 static inline int kgd2kfd_resume_process(struct kfd_dev *kfd)
487 {
488 return 0;
489 }
490
kgd2kfd_pre_reset(struct kfd_dev * kfd,struct amdgpu_reset_context * reset_context)491 static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd,
492 struct amdgpu_reset_context *reset_context)
493 {
494 return 0;
495 }
496
kgd2kfd_post_reset(struct kfd_dev * kfd)497 static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
498 {
499 return 0;
500 }
501
502 static inline
kgd2kfd_interrupt(struct kfd_dev * kfd,const void * ih_ring_entry)503 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
504 {
505 }
506
507 static inline
kgd2kfd_set_sram_ecc_flag(struct kfd_dev * kfd)508 void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
509 {
510 }
511
512 static inline
kgd2kfd_smi_event_throttle(struct kfd_dev * kfd,uint64_t throttle_bitmask)513 void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint64_t throttle_bitmask)
514 {
515 }
516
kgd2kfd_check_and_lock_kfd(struct kfd_dev * kfd)517 static inline int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd)
518 {
519 return 0;
520 }
521
kgd2kfd_unlock_kfd(struct kfd_dev * kfd)522 static inline void kgd2kfd_unlock_kfd(struct kfd_dev *kfd)
523 {
524 }
525
kgd2kfd_start_sched(struct kfd_dev * kfd,uint32_t node_id)526 static inline int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id)
527 {
528 return 0;
529 }
530
kgd2kfd_start_sched_all_nodes(struct kfd_dev * kfd)531 static inline int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd)
532 {
533 return 0;
534 }
535
kgd2kfd_stop_sched(struct kfd_dev * kfd,uint32_t node_id)536 static inline int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id)
537 {
538 return 0;
539 }
540
kgd2kfd_stop_sched_all_nodes(struct kfd_dev * kfd)541 static inline int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd)
542 {
543 return 0;
544 }
545
kgd2kfd_compute_active(struct kfd_dev * kfd,uint32_t node_id)546 static inline bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id)
547 {
548 return false;
549 }
550
kgd2kfd_vmfault_fast_path(struct amdgpu_device * adev,struct amdgpu_iv_entry * entry,bool retry_fault)551 static inline bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
552 bool retry_fault)
553 {
554 return false;
555 }
556
kgd2kfd_lock_kfd(void)557 static inline void kgd2kfd_lock_kfd(void)
558 {
559 }
560
kgd2kfd_teardown_processes(struct amdgpu_device * adev)561 static inline void kgd2kfd_teardown_processes(struct amdgpu_device *adev)
562 {
563 }
564
565 #endif
566 #endif /* AMDGPU_AMDKFD_H_INCLUDED */
567