Searched defs:IsRV64 (Results 1 – 10 of 10) sorted by relevance
63 bool parseCPU(StringRef CPU, bool IsRV64) { in parseCPU()71 bool parseTuneCPU(StringRef TuneCPU, bool IsRV64) { in parseTuneCPU()92 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidCPUArchList()99 void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { in fillValidTuneCPUArchList()
119 bool IsRV64, std::set<StringRef> &EnabledFeatureNames, in printEnabledExtensions()
41 bool IsRV64 = TT.isArch64Bit(); in computeTargetABI() local122 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits) { in parseFeatureBits()
51 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in generateInstSeqImpl() local503 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in getIntMatCost() local
542 inline static unsigned getStackAdjBase(unsigned RlistVal, bool IsRV64) { in getStackAdjBase()591 int64_t StackAdjustment, bool IsRV64) { in getSpimm()
283 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in printStackAdj() local
167 bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64; in ConstructJob() local
1928 bool IsRV64 = TargetTriple.getArch() == llvm::Triple::riscv64; in findRISCVMultilibs() local
83 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in emitSCSPrologue() local143 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in emitSCSEpilogue() local
354 bool IsRV64; member