| /freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/ |
| H A D | Hexagon.cpp | 83 auto MakeCircOp = [this, E](unsigned IntID, bool IsLoad) { in EmitHexagonBuiltinExpr()
117 auto MakeBrevLd = [this, E](unsigned IntID, llvm::Type *DestTy) { in EmitHexagonBuiltinExpr()
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| H A D | ARM.cpp | 2471 llvm::Type *ResTy, unsigned IntID, in packTBLDVectorList()
3888 unsigned IntID; in EmitSVEPredicateCast() local
3930 unsigned IntID) { in EmitSVEGatherLoad()
3984 unsigned IntID) { in EmitSVEScatterStore()
4041 unsigned IntID) { in EmitSVEGatherPrefetch()
4074 unsigned IntID) { in EmitSVEStructLoad()
4089 unsigned IntID) { in EmitSVEStructStore()
4294 unsigned IntID) { in EmitSMELd1St1()
4327 unsigned IntID) { in EmitSMEReadWrite()
4339 unsigned IntID) { in EmitSMEZero()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/ |
| H A D | ARCRuntimeEntryPoints.h | 146 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptimizeSZextends.cpp | 49 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended()
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| H A D | HexagonISelLowering.cpp | 3905 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked in emitLoadLinked() local
3926 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked in emitStoreConditional() local
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| H A D | HexagonVectorCombine.cpp | 2570 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGObjC.cpp | 2203 static llvm::Function *getARCIntrinsic(llvm::Intrinsic::ID IntID, in getARCIntrinsic()
2215 llvm::Function *&fn, llvm::Intrinsic::ID IntID, in emitARCValueOperation()
2239 llvm::Intrinsic::ID IntID) { in emitARCLoadOperation()
2251 llvm::Intrinsic::ID IntID, in emitARCStoreOperation()
2274 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5744 SDValue IntID = in lowerVECTOR_SHUFFLE() local
10909 SDValue IntID = DAG.getTargetConstant(VlsegInts[NF - 2], DL, XLenVT); in LowerINTRINSIC_W_CHAIN() local
11006 SDValue IntID = DAG.getTargetConstant(VssegInts[NF - 2], DL, XLenVT); in LowerINTRINSIC_VOID() local
12444 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorLoadToRVV() local
12502 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorStoreToRVV() local
12559 unsigned IntID = IsUnmasked || IsExpandingLoad ? Intrinsic::riscv_vle in lowerMaskedLoad() local
12663 unsigned IntID = in lowerMaskedStore() local
13651 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vlse in lowerVPStridedLoad() local
13700 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vsse in lowerVPStridedStore() local
13792 unsigned IntID = in lowerMaskedGather() local
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| H A D | RISCVISelDAGToDAG.cpp | 100 SDValue IntID = in PreprocessISelDAG() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2623 Intrinsic::ID IntID = in computeKnownBitsForTargetNode() local
27849 Intrinsic::ID IntID = in ReplaceNodeResults() local
29585 Intrinsic::ID IntID; in LowerVECTOR_DEINTERLEAVE() local
29626 Intrinsic::ID IntID; in LowerVECTOR_INTERLEAVE() local
29668 SDValue IntID = HG->getIntID(); in LowerVECTOR_HISTOGRAM() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 5349 auto IntID = N->getConstantOperandVal(0); in Select() local
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| H A D | PPCISelLowering.cpp | 12769 Intrinsic::ID IntID; in emitLoadLinked() local
12804 Intrinsic::ID IntID; in emitStoreConditional() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4584 SDValue IntID = HG->getIntID(); in SplitVecOp_VECTOR_HISTOGRAM() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20046 Intrinsic::ID IntID = in computeKnownBitsForTargetNode() local
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