xref: /linux/arch/x86/kvm/ioapic.h (revision 59c3e0603d8614e0f5e17089182ca596cf3fc552)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_IO_APIC_H
3 #define __KVM_IO_APIC_H
4 
5 #include <linux/kvm_host.h>
6 #include <kvm/iodev.h>
7 #include "irq.h"
8 
9 #ifdef CONFIG_KVM_IOAPIC
10 
11 struct kvm;
12 struct kvm_vcpu;
13 
14 #define IOAPIC_NUM_PINS  KVM_IOAPIC_NUM_PINS
15 #define IOAPIC_VERSION_ID 0x11	/* IOAPIC version */
16 #define IOAPIC_EDGE_TRIG  0
17 #define IOAPIC_LEVEL_TRIG 1
18 
19 #define IOAPIC_DEFAULT_BASE_ADDRESS  0xfec00000
20 #define IOAPIC_MEM_LENGTH            0x100
21 
22 /* Direct registers. */
23 #define IOAPIC_REG_SELECT  0x00
24 #define IOAPIC_REG_WINDOW  0x10
25 
26 /* Indirect registers. */
27 #define IOAPIC_REG_APIC_ID 0x00	/* x86 IOAPIC only */
28 #define IOAPIC_REG_VERSION 0x01
29 #define IOAPIC_REG_ARB_ID  0x02	/* x86 IOAPIC only */
30 
31 /*ioapic delivery mode*/
32 #define	IOAPIC_FIXED			0x0
33 #define	IOAPIC_LOWEST_PRIORITY		0x1
34 #define	IOAPIC_PMI			0x2
35 #define	IOAPIC_NMI			0x4
36 #define	IOAPIC_INIT			0x5
37 #define	IOAPIC_EXTINT			0x7
38 
39 #define RTC_GSI 8
40 
41 struct rtc_status {
42 	int pending_eoi;
43 
44 	/* vcpu bitmap where IRQ has been sent */
45 	DECLARE_BITMAP(map, KVM_MAX_VCPU_IDS);
46 
47 	/*
48 	 * Vector sent to a given vcpu, only valid when
49 	 * the vcpu's bit in map is set
50 	 */
51 	u8 vectors[KVM_MAX_VCPU_IDS];
52 };
53 
54 union kvm_ioapic_redirect_entry {
55 	u64 bits;
56 	struct {
57 		u8 vector;
58 		u8 delivery_mode:3;
59 		u8 dest_mode:1;
60 		u8 delivery_status:1;
61 		u8 polarity:1;
62 		u8 remote_irr:1;
63 		u8 trig_mode:1;
64 		u8 mask:1;
65 		u8 reserve:7;
66 		u8 reserved[4];
67 		u8 dest_id;
68 	} fields;
69 };
70 
71 struct kvm_ioapic {
72 	u64 base_address;
73 	u32 ioregsel;
74 	u32 id;
75 	u32 irr;
76 	u32 pad;
77 	union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
78 	unsigned long irq_states[IOAPIC_NUM_PINS];
79 	struct kvm_io_device dev;
80 	struct kvm *kvm;
81 	spinlock_t lock;
82 	struct rtc_status rtc_status;
83 	struct delayed_work eoi_inject;
84 	u32 irq_eoi[IOAPIC_NUM_PINS];
85 	u32 irr_delivered;
86 
87 	/* reads protected by irq_srcu, writes by irq_lock */
88 	struct hlist_head mask_notifier_list;
89 };
90 
91 struct kvm_irq_mask_notifier {
92 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
93 	int irq;
94 	struct hlist_node link;
95 };
96 
97 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
98 				    struct kvm_irq_mask_notifier *kimn);
99 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
100 				      struct kvm_irq_mask_notifier *kimn);
101 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
102 			     bool mask);
103 
104 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
105 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
106 			int trigger_mode);
107 int kvm_ioapic_init(struct kvm *kvm);
108 void kvm_ioapic_destroy(struct kvm *kvm);
109 int kvm_ioapic_set_irq(struct kvm_kernel_irq_routing_entry *e, struct kvm *kvm,
110 		       int irq_source_id, int level, bool line_status);
111 
112 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
113 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
114 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
115 			   ulong *ioapic_handled_vectors);
116 #endif /* CONFIG_KVM_IOAPIC */
117 
118 static inline int ioapic_in_kernel(struct kvm *kvm)
119 {
120 	return irqchip_full(kvm);
121 }
122 
123 void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
124 			    ulong *ioapic_handled_vectors);
125 void kvm_scan_ioapic_irq(struct kvm_vcpu *vcpu, u32 dest_id, u16 dest_mode,
126 			 u8 vector, unsigned long *ioapic_handled_vectors);
127 #endif
128