xref: /linux/arch/arm64/kvm/vgic/vgic-its.c (revision 81576a9a27dfee37acc2f8a71c7326f233bbbeba)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * GICv3 ITS emulation
4  *
5  * Copyright (C) 2015,2016 ARM Ltd.
6  * Author: Andre Przywara <andre.przywara@arm.com>
7  */
8 
9 #include <linux/cpu.h>
10 #include <linux/kvm.h>
11 #include <linux/kvm_host.h>
12 #include <linux/interrupt.h>
13 #include <linux/list.h>
14 #include <linux/uaccess.h>
15 #include <linux/list_sort.h>
16 
17 #include <linux/irqchip/arm-gic-v3.h>
18 
19 #include <asm/kvm_emulate.h>
20 #include <asm/kvm_arm.h>
21 #include <asm/kvm_mmu.h>
22 
23 #include "vgic.h"
24 #include "vgic-mmio.h"
25 
26 static struct kvm_device_ops kvm_arm_vgic_its_ops;
27 
28 static int vgic_its_save_tables_v0(struct vgic_its *its);
29 static int vgic_its_restore_tables_v0(struct vgic_its *its);
30 static int vgic_its_commit_v0(struct vgic_its *its);
31 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
32 			     struct kvm_vcpu *filter_vcpu, bool needs_inv);
33 
34 #define vgic_its_read_entry_lock(i, g, valp, t)				\
35 	({								\
36 		int __sz = vgic_its_get_abi(i)->t##_esz;		\
37 		struct kvm *__k = (i)->dev->kvm;			\
38 		int __ret;						\
39 									\
40 		BUILD_BUG_ON(NR_ITS_ABIS == 1 &&			\
41 			     sizeof(*(valp)) != ABI_0_ESZ);		\
42 		if (NR_ITS_ABIS > 1 &&					\
43 		    KVM_BUG_ON(__sz != sizeof(*(valp)), __k))		\
44 			__ret = -EINVAL;				\
45 		else							\
46 			__ret = kvm_read_guest_lock(__k, (g),		\
47 						    valp, __sz);	\
48 		__ret;							\
49 	})
50 
51 #define vgic_its_write_entry_lock(i, g, val, t)				\
52 	({								\
53 		int __sz = vgic_its_get_abi(i)->t##_esz;		\
54 		struct kvm *__k = (i)->dev->kvm;			\
55 		typeof(val) __v = (val);				\
56 		int __ret;						\
57 									\
58 		BUILD_BUG_ON(NR_ITS_ABIS == 1 &&			\
59 			     sizeof(__v) != ABI_0_ESZ);			\
60 		if (NR_ITS_ABIS > 1 &&					\
61 		    KVM_BUG_ON(__sz != sizeof(__v), __k))		\
62 			__ret = -EINVAL;				\
63 		else							\
64 			__ret = vgic_write_guest_lock(__k, (g),		\
65 						      &__v, __sz);	\
66 		__ret;							\
67 	})
68 
69 /*
70  * Creates a new (reference to a) struct vgic_irq for a given LPI.
71  * If this LPI is already mapped on another ITS, we increase its refcount
72  * and return a pointer to the existing structure.
73  * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
74  * This function returns a pointer to the _unlocked_ structure.
75  */
vgic_add_lpi(struct kvm * kvm,u32 intid,struct kvm_vcpu * vcpu)76 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
77 				     struct kvm_vcpu *vcpu)
78 {
79 	struct vgic_dist *dist = &kvm->arch.vgic;
80 	struct vgic_irq *irq = vgic_get_irq(kvm, intid), *oldirq;
81 	unsigned long flags;
82 	int ret;
83 
84 	/* In this case there is no put, since we keep the reference. */
85 	if (irq)
86 		return irq;
87 
88 	irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT);
89 	if (!irq)
90 		return ERR_PTR(-ENOMEM);
91 
92 	ret = xa_reserve_irq(&dist->lpi_xa, intid, GFP_KERNEL_ACCOUNT);
93 	if (ret) {
94 		kfree(irq);
95 		return ERR_PTR(ret);
96 	}
97 
98 	INIT_LIST_HEAD(&irq->ap_list);
99 	raw_spin_lock_init(&irq->irq_lock);
100 
101 	irq->config = VGIC_CONFIG_EDGE;
102 	kref_init(&irq->refcount);
103 	irq->intid = intid;
104 	irq->target_vcpu = vcpu;
105 	irq->group = 1;
106 
107 	xa_lock_irqsave(&dist->lpi_xa, flags);
108 
109 	/*
110 	 * There could be a race with another vgic_add_lpi(), so we need to
111 	 * check that we don't add a second list entry with the same LPI.
112 	 */
113 	oldirq = xa_load(&dist->lpi_xa, intid);
114 	if (vgic_try_get_irq_kref(oldirq)) {
115 		/* Someone was faster with adding this LPI, lets use that. */
116 		kfree(irq);
117 		irq = oldirq;
118 
119 		goto out_unlock;
120 	}
121 
122 	ret = xa_err(__xa_store(&dist->lpi_xa, intid, irq, 0));
123 	if (ret) {
124 		xa_release(&dist->lpi_xa, intid);
125 		kfree(irq);
126 	}
127 
128 out_unlock:
129 	xa_unlock_irqrestore(&dist->lpi_xa, flags);
130 
131 	if (ret)
132 		return ERR_PTR(ret);
133 
134 	/*
135 	 * We "cache" the configuration table entries in our struct vgic_irq's.
136 	 * However we only have those structs for mapped IRQs, so we read in
137 	 * the respective config data from memory here upon mapping the LPI.
138 	 *
139 	 * Should any of these fail, behave as if we couldn't create the LPI
140 	 * by dropping the refcount and returning the error.
141 	 */
142 	ret = update_lpi_config(kvm, irq, NULL, false);
143 	if (ret) {
144 		vgic_put_irq(kvm, irq);
145 		return ERR_PTR(ret);
146 	}
147 
148 	ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
149 	if (ret) {
150 		vgic_put_irq(kvm, irq);
151 		return ERR_PTR(ret);
152 	}
153 
154 	return irq;
155 }
156 
157 struct its_device {
158 	struct list_head dev_list;
159 
160 	/* the head for the list of ITTEs */
161 	struct list_head itt_head;
162 	u32 num_eventid_bits;
163 	gpa_t itt_addr;
164 	u32 device_id;
165 };
166 
167 #define COLLECTION_NOT_MAPPED ((u32)~0)
168 
169 struct its_collection {
170 	struct list_head coll_list;
171 
172 	u32 collection_id;
173 	u32 target_addr;
174 };
175 
176 #define its_is_collection_mapped(coll) ((coll) && \
177 				((coll)->target_addr != COLLECTION_NOT_MAPPED))
178 
179 struct its_ite {
180 	struct list_head ite_list;
181 
182 	struct vgic_irq *irq;
183 	struct its_collection *collection;
184 	u32 event_id;
185 };
186 
187 /**
188  * struct vgic_its_abi - ITS abi ops and settings
189  * @cte_esz: collection table entry size
190  * @dte_esz: device table entry size
191  * @ite_esz: interrupt translation table entry size
192  * @save_tables: save the ITS tables into guest RAM
193  * @restore_tables: restore the ITS internal structs from tables
194  *  stored in guest RAM
195  * @commit: initialize the registers which expose the ABI settings,
196  *  especially the entry sizes
197  */
198 struct vgic_its_abi {
199 	int cte_esz;
200 	int dte_esz;
201 	int ite_esz;
202 	int (*save_tables)(struct vgic_its *its);
203 	int (*restore_tables)(struct vgic_its *its);
204 	int (*commit)(struct vgic_its *its);
205 };
206 
207 #define ABI_0_ESZ	8
208 #define ESZ_MAX		ABI_0_ESZ
209 
210 static const struct vgic_its_abi its_table_abi_versions[] = {
211 	[0] = {
212 	 .cte_esz = ABI_0_ESZ,
213 	 .dte_esz = ABI_0_ESZ,
214 	 .ite_esz = ABI_0_ESZ,
215 	 .save_tables = vgic_its_save_tables_v0,
216 	 .restore_tables = vgic_its_restore_tables_v0,
217 	 .commit = vgic_its_commit_v0,
218 	},
219 };
220 
221 #define NR_ITS_ABIS	ARRAY_SIZE(its_table_abi_versions)
222 
vgic_its_get_abi(struct vgic_its * its)223 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
224 {
225 	return &its_table_abi_versions[its->abi_rev];
226 }
227 
vgic_its_set_abi(struct vgic_its * its,u32 rev)228 static int vgic_its_set_abi(struct vgic_its *its, u32 rev)
229 {
230 	const struct vgic_its_abi *abi;
231 
232 	its->abi_rev = rev;
233 	abi = vgic_its_get_abi(its);
234 	return abi->commit(its);
235 }
236 
237 /*
238  * Find and returns a device in the device table for an ITS.
239  * Must be called with the its_lock mutex held.
240  */
find_its_device(struct vgic_its * its,u32 device_id)241 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
242 {
243 	struct its_device *device;
244 
245 	list_for_each_entry(device, &its->device_list, dev_list)
246 		if (device_id == device->device_id)
247 			return device;
248 
249 	return NULL;
250 }
251 
252 /*
253  * Find and returns an interrupt translation table entry (ITTE) for a given
254  * Device ID/Event ID pair on an ITS.
255  * Must be called with the its_lock mutex held.
256  */
find_ite(struct vgic_its * its,u32 device_id,u32 event_id)257 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
258 				  u32 event_id)
259 {
260 	struct its_device *device;
261 	struct its_ite *ite;
262 
263 	device = find_its_device(its, device_id);
264 	if (device == NULL)
265 		return NULL;
266 
267 	list_for_each_entry(ite, &device->itt_head, ite_list)
268 		if (ite->event_id == event_id)
269 			return ite;
270 
271 	return NULL;
272 }
273 
274 /* To be used as an iterator this macro misses the enclosing parentheses */
275 #define for_each_lpi_its(dev, ite, its) \
276 	list_for_each_entry(dev, &(its)->device_list, dev_list) \
277 		list_for_each_entry(ite, &(dev)->itt_head, ite_list)
278 
279 #define GIC_LPI_OFFSET 8192
280 
281 #define VITS_TYPER_IDBITS		16
282 #define VITS_MAX_EVENTID		(BIT(VITS_TYPER_IDBITS) - 1)
283 #define VITS_TYPER_DEVBITS		16
284 #define VITS_MAX_DEVID			(BIT(VITS_TYPER_DEVBITS) - 1)
285 #define VITS_DTE_MAX_DEVID_OFFSET	(BIT(14) - 1)
286 #define VITS_ITE_MAX_EVENTID_OFFSET	(BIT(16) - 1)
287 
288 /*
289  * Finds and returns a collection in the ITS collection table.
290  * Must be called with the its_lock mutex held.
291  */
find_collection(struct vgic_its * its,int coll_id)292 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
293 {
294 	struct its_collection *collection;
295 
296 	list_for_each_entry(collection, &its->collection_list, coll_list) {
297 		if (coll_id == collection->collection_id)
298 			return collection;
299 	}
300 
301 	return NULL;
302 }
303 
304 #define LPI_PROP_ENABLE_BIT(p)	((p) & LPI_PROP_ENABLED)
305 #define LPI_PROP_PRIORITY(p)	((p) & 0xfc)
306 
307 /*
308  * Reads the configuration data for a given LPI from guest memory and
309  * updates the fields in struct vgic_irq.
310  * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
311  * VCPU. Unconditionally applies if filter_vcpu is NULL.
312  */
update_lpi_config(struct kvm * kvm,struct vgic_irq * irq,struct kvm_vcpu * filter_vcpu,bool needs_inv)313 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
314 			     struct kvm_vcpu *filter_vcpu, bool needs_inv)
315 {
316 	u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
317 	u8 prop;
318 	int ret;
319 	unsigned long flags;
320 
321 	ret = kvm_read_guest_lock(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
322 				  &prop, 1);
323 
324 	if (ret)
325 		return ret;
326 
327 	raw_spin_lock_irqsave(&irq->irq_lock, flags);
328 
329 	if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
330 		irq->priority = LPI_PROP_PRIORITY(prop);
331 		irq->enabled = LPI_PROP_ENABLE_BIT(prop);
332 
333 		if (!irq->hw) {
334 			vgic_queue_irq_unlock(kvm, irq, flags);
335 			return 0;
336 		}
337 	}
338 
339 	raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
340 
341 	if (irq->hw)
342 		return its_prop_update_vlpi(irq->host_irq, prop, needs_inv);
343 
344 	return 0;
345 }
346 
update_affinity(struct vgic_irq * irq,struct kvm_vcpu * vcpu)347 static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu)
348 {
349 	int ret = 0;
350 	unsigned long flags;
351 
352 	raw_spin_lock_irqsave(&irq->irq_lock, flags);
353 	irq->target_vcpu = vcpu;
354 	raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
355 
356 	if (irq->hw) {
357 		struct its_vlpi_map map;
358 
359 		ret = its_get_vlpi(irq->host_irq, &map);
360 		if (ret)
361 			return ret;
362 
363 		if (map.vpe)
364 			atomic_dec(&map.vpe->vlpi_count);
365 		map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
366 		atomic_inc(&map.vpe->vlpi_count);
367 
368 		ret = its_map_vlpi(irq->host_irq, &map);
369 	}
370 
371 	return ret;
372 }
373 
collection_to_vcpu(struct kvm * kvm,struct its_collection * col)374 static struct kvm_vcpu *collection_to_vcpu(struct kvm *kvm,
375 					   struct its_collection *col)
376 {
377 	return kvm_get_vcpu_by_id(kvm, col->target_addr);
378 }
379 
380 /*
381  * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
382  * is targeting) to the VGIC's view, which deals with target VCPUs.
383  * Needs to be called whenever either the collection for a LPIs has
384  * changed or the collection itself got retargeted.
385  */
update_affinity_ite(struct kvm * kvm,struct its_ite * ite)386 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
387 {
388 	struct kvm_vcpu *vcpu;
389 
390 	if (!its_is_collection_mapped(ite->collection))
391 		return;
392 
393 	vcpu = collection_to_vcpu(kvm, ite->collection);
394 	update_affinity(ite->irq, vcpu);
395 }
396 
397 /*
398  * Updates the target VCPU for every LPI targeting this collection.
399  * Must be called with the its_lock mutex held.
400  */
update_affinity_collection(struct kvm * kvm,struct vgic_its * its,struct its_collection * coll)401 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
402 				       struct its_collection *coll)
403 {
404 	struct its_device *device;
405 	struct its_ite *ite;
406 
407 	for_each_lpi_its(device, ite, its) {
408 		if (ite->collection != coll)
409 			continue;
410 
411 		update_affinity_ite(kvm, ite);
412 	}
413 }
414 
max_lpis_propbaser(u64 propbaser)415 static u32 max_lpis_propbaser(u64 propbaser)
416 {
417 	int nr_idbits = (propbaser & 0x1f) + 1;
418 
419 	return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
420 }
421 
422 /*
423  * Sync the pending table pending bit of LPIs targeting @vcpu
424  * with our own data structures. This relies on the LPI being
425  * mapped before.
426  */
its_sync_lpi_pending_table(struct kvm_vcpu * vcpu)427 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
428 {
429 	gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
430 	struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
431 	unsigned long intid, flags;
432 	struct vgic_irq *irq;
433 	int last_byte_offset = -1;
434 	int ret = 0;
435 	u8 pendmask;
436 
437 	xa_for_each(&dist->lpi_xa, intid, irq) {
438 		int byte_offset, bit_nr;
439 
440 		byte_offset = intid / BITS_PER_BYTE;
441 		bit_nr = intid % BITS_PER_BYTE;
442 
443 		/*
444 		 * For contiguously allocated LPIs chances are we just read
445 		 * this very same byte in the last iteration. Reuse that.
446 		 */
447 		if (byte_offset != last_byte_offset) {
448 			ret = kvm_read_guest_lock(vcpu->kvm,
449 						  pendbase + byte_offset,
450 						  &pendmask, 1);
451 			if (ret)
452 				return ret;
453 
454 			last_byte_offset = byte_offset;
455 		}
456 
457 		irq = vgic_get_irq(vcpu->kvm, intid);
458 		if (!irq)
459 			continue;
460 
461 		raw_spin_lock_irqsave(&irq->irq_lock, flags);
462 		if (irq->target_vcpu == vcpu)
463 			irq->pending_latch = pendmask & (1U << bit_nr);
464 		vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
465 		vgic_put_irq(vcpu->kvm, irq);
466 	}
467 
468 	return ret;
469 }
470 
vgic_mmio_read_its_typer(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)471 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
472 					      struct vgic_its *its,
473 					      gpa_t addr, unsigned int len)
474 {
475 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
476 	u64 reg = GITS_TYPER_PLPIS;
477 
478 	/*
479 	 * We use linear CPU numbers for redistributor addressing,
480 	 * so GITS_TYPER.PTA is 0.
481 	 * Also we force all PROPBASER registers to be the same, so
482 	 * CommonLPIAff is 0 as well.
483 	 * To avoid memory waste in the guest, we keep the number of IDBits and
484 	 * DevBits low - as least for the time being.
485 	 */
486 	reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
487 	reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
488 	reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
489 
490 	return extract_bytes(reg, addr & 7, len);
491 }
492 
vgic_mmio_read_its_iidr(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)493 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
494 					     struct vgic_its *its,
495 					     gpa_t addr, unsigned int len)
496 {
497 	u32 val;
498 
499 	val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
500 	val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
501 	return val;
502 }
503 
vgic_mmio_uaccess_write_its_iidr(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)504 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
505 					    struct vgic_its *its,
506 					    gpa_t addr, unsigned int len,
507 					    unsigned long val)
508 {
509 	u32 rev = GITS_IIDR_REV(val);
510 
511 	if (rev >= NR_ITS_ABIS)
512 		return -EINVAL;
513 	return vgic_its_set_abi(its, rev);
514 }
515 
vgic_mmio_read_its_idregs(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)516 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
517 					       struct vgic_its *its,
518 					       gpa_t addr, unsigned int len)
519 {
520 	switch (addr & 0xffff) {
521 	case GITS_PIDR0:
522 		return 0x92;	/* part number, bits[7:0] */
523 	case GITS_PIDR1:
524 		return 0xb4;	/* part number, bits[11:8] */
525 	case GITS_PIDR2:
526 		return GIC_PIDR2_ARCH_GICv3 | 0x0b;
527 	case GITS_PIDR4:
528 		return 0x40;	/* This is a 64K software visible page */
529 	/* The following are the ID registers for (any) GIC. */
530 	case GITS_CIDR0:
531 		return 0x0d;
532 	case GITS_CIDR1:
533 		return 0xf0;
534 	case GITS_CIDR2:
535 		return 0x05;
536 	case GITS_CIDR3:
537 		return 0xb1;
538 	}
539 
540 	return 0;
541 }
542 
__vgic_doorbell_to_its(struct kvm * kvm,gpa_t db)543 static struct vgic_its *__vgic_doorbell_to_its(struct kvm *kvm, gpa_t db)
544 {
545 	struct kvm_io_device *kvm_io_dev;
546 	struct vgic_io_device *iodev;
547 
548 	kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, db);
549 	if (!kvm_io_dev)
550 		return ERR_PTR(-EINVAL);
551 
552 	if (kvm_io_dev->ops != &kvm_io_gic_ops)
553 		return ERR_PTR(-EINVAL);
554 
555 	iodev = container_of(kvm_io_dev, struct vgic_io_device, dev);
556 	if (iodev->iodev_type != IODEV_ITS)
557 		return ERR_PTR(-EINVAL);
558 
559 	return iodev->its;
560 }
561 
vgic_its_cache_key(u32 devid,u32 eventid)562 static unsigned long vgic_its_cache_key(u32 devid, u32 eventid)
563 {
564 	return (((unsigned long)devid) << VITS_TYPER_IDBITS) | eventid;
565 
566 }
567 
vgic_its_check_cache(struct kvm * kvm,phys_addr_t db,u32 devid,u32 eventid)568 static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db,
569 					     u32 devid, u32 eventid)
570 {
571 	unsigned long cache_key = vgic_its_cache_key(devid, eventid);
572 	struct vgic_its *its;
573 	struct vgic_irq *irq;
574 
575 	if (devid > VITS_MAX_DEVID || eventid > VITS_MAX_EVENTID)
576 		return NULL;
577 
578 	its = __vgic_doorbell_to_its(kvm, db);
579 	if (IS_ERR(its))
580 		return NULL;
581 
582 	rcu_read_lock();
583 
584 	irq = xa_load(&its->translation_cache, cache_key);
585 	if (!vgic_try_get_irq_kref(irq))
586 		irq = NULL;
587 
588 	rcu_read_unlock();
589 
590 	return irq;
591 }
592 
vgic_its_cache_translation(struct kvm * kvm,struct vgic_its * its,u32 devid,u32 eventid,struct vgic_irq * irq)593 static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
594 				       u32 devid, u32 eventid,
595 				       struct vgic_irq *irq)
596 {
597 	unsigned long cache_key = vgic_its_cache_key(devid, eventid);
598 	struct vgic_irq *old;
599 
600 	/* Do not cache a directly injected interrupt */
601 	if (irq->hw)
602 		return;
603 
604 	/*
605 	 * The irq refcount is guaranteed to be nonzero while holding the
606 	 * its_lock, as the ITE (and the reference it holds) cannot be freed.
607 	 */
608 	lockdep_assert_held(&its->its_lock);
609 	vgic_get_irq_kref(irq);
610 
611 	old = xa_store(&its->translation_cache, cache_key, irq, GFP_KERNEL_ACCOUNT);
612 
613 	/*
614 	 * Put the reference taken on @irq if the store fails. Intentionally do
615 	 * not return the error as the translation cache is best effort.
616 	 */
617 	if (xa_is_err(old)) {
618 		vgic_put_irq(kvm, irq);
619 		return;
620 	}
621 
622 	/*
623 	 * We could have raced with another CPU caching the same
624 	 * translation behind our back, ensure we don't leak a
625 	 * reference if that is the case.
626 	 */
627 	if (old)
628 		vgic_put_irq(kvm, old);
629 }
630 
vgic_its_invalidate_cache(struct vgic_its * its)631 static void vgic_its_invalidate_cache(struct vgic_its *its)
632 {
633 	struct kvm *kvm = its->dev->kvm;
634 	struct vgic_irq *irq;
635 	unsigned long idx;
636 
637 	xa_for_each(&its->translation_cache, idx, irq) {
638 		xa_erase(&its->translation_cache, idx);
639 		vgic_put_irq(kvm, irq);
640 	}
641 }
642 
vgic_its_invalidate_all_caches(struct kvm * kvm)643 void vgic_its_invalidate_all_caches(struct kvm *kvm)
644 {
645 	struct kvm_device *dev;
646 	struct vgic_its *its;
647 
648 	rcu_read_lock();
649 
650 	list_for_each_entry_rcu(dev, &kvm->devices, vm_node) {
651 		if (dev->ops != &kvm_arm_vgic_its_ops)
652 			continue;
653 
654 		its = dev->private;
655 		vgic_its_invalidate_cache(its);
656 	}
657 
658 	rcu_read_unlock();
659 }
660 
vgic_its_resolve_lpi(struct kvm * kvm,struct vgic_its * its,u32 devid,u32 eventid,struct vgic_irq ** irq)661 int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
662 			 u32 devid, u32 eventid, struct vgic_irq **irq)
663 {
664 	struct kvm_vcpu *vcpu;
665 	struct its_ite *ite;
666 
667 	if (!its->enabled)
668 		return -EBUSY;
669 
670 	ite = find_ite(its, devid, eventid);
671 	if (!ite || !its_is_collection_mapped(ite->collection))
672 		return E_ITS_INT_UNMAPPED_INTERRUPT;
673 
674 	vcpu = collection_to_vcpu(kvm, ite->collection);
675 	if (!vcpu)
676 		return E_ITS_INT_UNMAPPED_INTERRUPT;
677 
678 	if (!vgic_lpis_enabled(vcpu))
679 		return -EBUSY;
680 
681 	vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq);
682 
683 	*irq = ite->irq;
684 	return 0;
685 }
686 
vgic_msi_to_its(struct kvm * kvm,struct kvm_msi * msi)687 struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi)
688 {
689 	u64 address;
690 
691 	if (!vgic_has_its(kvm))
692 		return ERR_PTR(-ENODEV);
693 
694 	if (!(msi->flags & KVM_MSI_VALID_DEVID))
695 		return ERR_PTR(-EINVAL);
696 
697 	address = (u64)msi->address_hi << 32 | msi->address_lo;
698 
699 	return __vgic_doorbell_to_its(kvm, address);
700 }
701 
702 /*
703  * Find the target VCPU and the LPI number for a given devid/eventid pair
704  * and make this IRQ pending, possibly injecting it.
705  * Must be called with the its_lock mutex held.
706  * Returns 0 on success, a positive error value for any ITS mapping
707  * related errors and negative error values for generic errors.
708  */
vgic_its_trigger_msi(struct kvm * kvm,struct vgic_its * its,u32 devid,u32 eventid)709 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
710 				u32 devid, u32 eventid)
711 {
712 	struct vgic_irq *irq = NULL;
713 	unsigned long flags;
714 	int err;
715 
716 	err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq);
717 	if (err)
718 		return err;
719 
720 	if (irq->hw)
721 		return irq_set_irqchip_state(irq->host_irq,
722 					     IRQCHIP_STATE_PENDING, true);
723 
724 	raw_spin_lock_irqsave(&irq->irq_lock, flags);
725 	irq->pending_latch = true;
726 	vgic_queue_irq_unlock(kvm, irq, flags);
727 
728 	return 0;
729 }
730 
vgic_its_inject_cached_translation(struct kvm * kvm,struct kvm_msi * msi)731 int vgic_its_inject_cached_translation(struct kvm *kvm, struct kvm_msi *msi)
732 {
733 	struct vgic_irq *irq;
734 	unsigned long flags;
735 	phys_addr_t db;
736 
737 	db = (u64)msi->address_hi << 32 | msi->address_lo;
738 	irq = vgic_its_check_cache(kvm, db, msi->devid, msi->data);
739 	if (!irq)
740 		return -EWOULDBLOCK;
741 
742 	raw_spin_lock_irqsave(&irq->irq_lock, flags);
743 	irq->pending_latch = true;
744 	vgic_queue_irq_unlock(kvm, irq, flags);
745 	vgic_put_irq(kvm, irq);
746 
747 	return 0;
748 }
749 
750 /*
751  * Queries the KVM IO bus framework to get the ITS pointer from the given
752  * doorbell address.
753  * We then call vgic_its_trigger_msi() with the decoded data.
754  * According to the KVM_SIGNAL_MSI API description returns 1 on success.
755  */
vgic_its_inject_msi(struct kvm * kvm,struct kvm_msi * msi)756 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
757 {
758 	struct vgic_its *its;
759 	int ret;
760 
761 	if (!vgic_its_inject_cached_translation(kvm, msi))
762 		return 1;
763 
764 	its = vgic_msi_to_its(kvm, msi);
765 	if (IS_ERR(its))
766 		return PTR_ERR(its);
767 
768 	mutex_lock(&its->its_lock);
769 	ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data);
770 	mutex_unlock(&its->its_lock);
771 
772 	if (ret < 0)
773 		return ret;
774 
775 	/*
776 	 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
777 	 * if the guest has blocked the MSI. So we map any LPI mapping
778 	 * related error to that.
779 	 */
780 	if (ret)
781 		return 0;
782 	else
783 		return 1;
784 }
785 
786 /* Requires the its_lock to be held. */
its_free_ite(struct kvm * kvm,struct its_ite * ite)787 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
788 {
789 	list_del(&ite->ite_list);
790 
791 	/* This put matches the get in vgic_add_lpi. */
792 	if (ite->irq) {
793 		if (ite->irq->hw)
794 			WARN_ON(its_unmap_vlpi(ite->irq->host_irq));
795 
796 		vgic_put_irq(kvm, ite->irq);
797 	}
798 
799 	kfree(ite);
800 }
801 
its_cmd_mask_field(u64 * its_cmd,int word,int shift,int size)802 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
803 {
804 	return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
805 }
806 
807 #define its_cmd_get_command(cmd)	its_cmd_mask_field(cmd, 0,  0,  8)
808 #define its_cmd_get_deviceid(cmd)	its_cmd_mask_field(cmd, 0, 32, 32)
809 #define its_cmd_get_size(cmd)		(its_cmd_mask_field(cmd, 1,  0,  5) + 1)
810 #define its_cmd_get_id(cmd)		its_cmd_mask_field(cmd, 1,  0, 32)
811 #define its_cmd_get_physical_id(cmd)	its_cmd_mask_field(cmd, 1, 32, 32)
812 #define its_cmd_get_collection(cmd)	its_cmd_mask_field(cmd, 2,  0, 16)
813 #define its_cmd_get_ittaddr(cmd)	(its_cmd_mask_field(cmd, 2,  8, 44) << 8)
814 #define its_cmd_get_target_addr(cmd)	its_cmd_mask_field(cmd, 2, 16, 32)
815 #define its_cmd_get_validbit(cmd)	its_cmd_mask_field(cmd, 2, 63,  1)
816 
817 /*
818  * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
819  * Must be called with the its_lock mutex held.
820  */
vgic_its_cmd_handle_discard(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)821 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
822 				       u64 *its_cmd)
823 {
824 	u32 device_id = its_cmd_get_deviceid(its_cmd);
825 	u32 event_id = its_cmd_get_id(its_cmd);
826 	struct its_ite *ite;
827 
828 	ite = find_ite(its, device_id, event_id);
829 	if (ite && its_is_collection_mapped(ite->collection)) {
830 		struct its_device *device = find_its_device(its, device_id);
831 		int ite_esz = vgic_its_get_abi(its)->ite_esz;
832 		gpa_t gpa = device->itt_addr + ite->event_id * ite_esz;
833 		/*
834 		 * Though the spec talks about removing the pending state, we
835 		 * don't bother here since we clear the ITTE anyway and the
836 		 * pending state is a property of the ITTE struct.
837 		 */
838 		vgic_its_invalidate_cache(its);
839 
840 		its_free_ite(kvm, ite);
841 
842 		return vgic_its_write_entry_lock(its, gpa, 0ULL, ite);
843 	}
844 
845 	return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
846 }
847 
848 /*
849  * The MOVI command moves an ITTE to a different collection.
850  * Must be called with the its_lock mutex held.
851  */
vgic_its_cmd_handle_movi(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)852 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
853 				    u64 *its_cmd)
854 {
855 	u32 device_id = its_cmd_get_deviceid(its_cmd);
856 	u32 event_id = its_cmd_get_id(its_cmd);
857 	u32 coll_id = its_cmd_get_collection(its_cmd);
858 	struct kvm_vcpu *vcpu;
859 	struct its_ite *ite;
860 	struct its_collection *collection;
861 
862 	ite = find_ite(its, device_id, event_id);
863 	if (!ite)
864 		return E_ITS_MOVI_UNMAPPED_INTERRUPT;
865 
866 	if (!its_is_collection_mapped(ite->collection))
867 		return E_ITS_MOVI_UNMAPPED_COLLECTION;
868 
869 	collection = find_collection(its, coll_id);
870 	if (!its_is_collection_mapped(collection))
871 		return E_ITS_MOVI_UNMAPPED_COLLECTION;
872 
873 	ite->collection = collection;
874 	vcpu = collection_to_vcpu(kvm, collection);
875 
876 	vgic_its_invalidate_cache(its);
877 
878 	return update_affinity(ite->irq, vcpu);
879 }
880 
__is_visible_gfn_locked(struct vgic_its * its,gpa_t gpa)881 static bool __is_visible_gfn_locked(struct vgic_its *its, gpa_t gpa)
882 {
883 	gfn_t gfn = gpa >> PAGE_SHIFT;
884 	int idx;
885 	bool ret;
886 
887 	idx = srcu_read_lock(&its->dev->kvm->srcu);
888 	ret = kvm_is_visible_gfn(its->dev->kvm, gfn);
889 	srcu_read_unlock(&its->dev->kvm->srcu, idx);
890 	return ret;
891 }
892 
893 /*
894  * Check whether an ID can be stored into the corresponding guest table.
895  * For a direct table this is pretty easy, but gets a bit nasty for
896  * indirect tables. We check whether the resulting guest physical address
897  * is actually valid (covered by a memslot and guest accessible).
898  * For this we have to read the respective first level entry.
899  */
vgic_its_check_id(struct vgic_its * its,u64 baser,u32 id,gpa_t * eaddr)900 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id,
901 			      gpa_t *eaddr)
902 {
903 	int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
904 	u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
905 	phys_addr_t base = GITS_BASER_ADDR_48_to_52(baser);
906 	int esz = GITS_BASER_ENTRY_SIZE(baser);
907 	int index;
908 
909 	switch (type) {
910 	case GITS_BASER_TYPE_DEVICE:
911 		if (id > VITS_MAX_DEVID)
912 			return false;
913 		break;
914 	case GITS_BASER_TYPE_COLLECTION:
915 		/* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
916 		if (id >= BIT_ULL(16))
917 			return false;
918 		break;
919 	default:
920 		return false;
921 	}
922 
923 	if (!(baser & GITS_BASER_INDIRECT)) {
924 		phys_addr_t addr;
925 
926 		if (id >= (l1_tbl_size / esz))
927 			return false;
928 
929 		addr = base + id * esz;
930 
931 		if (eaddr)
932 			*eaddr = addr;
933 
934 		return __is_visible_gfn_locked(its, addr);
935 	}
936 
937 	/* calculate and check the index into the 1st level */
938 	index = id / (SZ_64K / esz);
939 	if (index >= (l1_tbl_size / sizeof(u64)))
940 		return false;
941 
942 	/* Each 1st level entry is represented by a 64-bit value. */
943 	if (kvm_read_guest_lock(its->dev->kvm,
944 			   base + index * sizeof(indirect_ptr),
945 			   &indirect_ptr, sizeof(indirect_ptr)))
946 		return false;
947 
948 	indirect_ptr = le64_to_cpu(indirect_ptr);
949 
950 	/* check the valid bit of the first level entry */
951 	if (!(indirect_ptr & BIT_ULL(63)))
952 		return false;
953 
954 	/* Mask the guest physical address and calculate the frame number. */
955 	indirect_ptr &= GENMASK_ULL(51, 16);
956 
957 	/* Find the address of the actual entry */
958 	index = id % (SZ_64K / esz);
959 	indirect_ptr += index * esz;
960 
961 	if (eaddr)
962 		*eaddr = indirect_ptr;
963 
964 	return __is_visible_gfn_locked(its, indirect_ptr);
965 }
966 
967 /*
968  * Check whether an event ID can be stored in the corresponding Interrupt
969  * Translation Table, which starts at device->itt_addr.
970  */
vgic_its_check_event_id(struct vgic_its * its,struct its_device * device,u32 event_id)971 static bool vgic_its_check_event_id(struct vgic_its *its, struct its_device *device,
972 		u32 event_id)
973 {
974 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
975 	int ite_esz = abi->ite_esz;
976 	gpa_t gpa;
977 
978 	/* max table size is: BIT_ULL(device->num_eventid_bits) * ite_esz */
979 	if (event_id >= BIT_ULL(device->num_eventid_bits))
980 		return false;
981 
982 	gpa = device->itt_addr + event_id * ite_esz;
983 	return __is_visible_gfn_locked(its, gpa);
984 }
985 
986 /*
987  * Add a new collection into the ITS collection table.
988  * Returns 0 on success, and a negative error value for generic errors.
989  */
vgic_its_alloc_collection(struct vgic_its * its,struct its_collection ** colp,u32 coll_id)990 static int vgic_its_alloc_collection(struct vgic_its *its,
991 				     struct its_collection **colp,
992 				     u32 coll_id)
993 {
994 	struct its_collection *collection;
995 
996 	collection = kzalloc(sizeof(*collection), GFP_KERNEL_ACCOUNT);
997 	if (!collection)
998 		return -ENOMEM;
999 
1000 	collection->collection_id = coll_id;
1001 	collection->target_addr = COLLECTION_NOT_MAPPED;
1002 
1003 	list_add_tail(&collection->coll_list, &its->collection_list);
1004 	*colp = collection;
1005 
1006 	return 0;
1007 }
1008 
vgic_its_free_collection(struct vgic_its * its,u32 coll_id)1009 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
1010 {
1011 	struct its_collection *collection;
1012 	struct its_device *device;
1013 	struct its_ite *ite;
1014 
1015 	/*
1016 	 * Clearing the mapping for that collection ID removes the
1017 	 * entry from the list. If there wasn't any before, we can
1018 	 * go home early.
1019 	 */
1020 	collection = find_collection(its, coll_id);
1021 	if (!collection)
1022 		return;
1023 
1024 	for_each_lpi_its(device, ite, its)
1025 		if (ite->collection &&
1026 		    ite->collection->collection_id == coll_id)
1027 			ite->collection = NULL;
1028 
1029 	list_del(&collection->coll_list);
1030 	kfree(collection);
1031 }
1032 
1033 /* Must be called with its_lock mutex held */
vgic_its_alloc_ite(struct its_device * device,struct its_collection * collection,u32 event_id)1034 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
1035 					  struct its_collection *collection,
1036 					  u32 event_id)
1037 {
1038 	struct its_ite *ite;
1039 
1040 	ite = kzalloc(sizeof(*ite), GFP_KERNEL_ACCOUNT);
1041 	if (!ite)
1042 		return ERR_PTR(-ENOMEM);
1043 
1044 	ite->event_id	= event_id;
1045 	ite->collection = collection;
1046 
1047 	list_add_tail(&ite->ite_list, &device->itt_head);
1048 	return ite;
1049 }
1050 
1051 /*
1052  * The MAPTI and MAPI commands map LPIs to ITTEs.
1053  * Must be called with its_lock mutex held.
1054  */
vgic_its_cmd_handle_mapi(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1055 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
1056 				    u64 *its_cmd)
1057 {
1058 	u32 device_id = its_cmd_get_deviceid(its_cmd);
1059 	u32 event_id = its_cmd_get_id(its_cmd);
1060 	u32 coll_id = its_cmd_get_collection(its_cmd);
1061 	struct its_ite *ite;
1062 	struct kvm_vcpu *vcpu = NULL;
1063 	struct its_device *device;
1064 	struct its_collection *collection, *new_coll = NULL;
1065 	struct vgic_irq *irq;
1066 	int lpi_nr;
1067 
1068 	device = find_its_device(its, device_id);
1069 	if (!device)
1070 		return E_ITS_MAPTI_UNMAPPED_DEVICE;
1071 
1072 	if (!vgic_its_check_event_id(its, device, event_id))
1073 		return E_ITS_MAPTI_ID_OOR;
1074 
1075 	if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
1076 		lpi_nr = its_cmd_get_physical_id(its_cmd);
1077 	else
1078 		lpi_nr = event_id;
1079 	if (lpi_nr < GIC_LPI_OFFSET ||
1080 	    lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
1081 		return E_ITS_MAPTI_PHYSICALID_OOR;
1082 
1083 	/* If there is an existing mapping, behavior is UNPREDICTABLE. */
1084 	if (find_ite(its, device_id, event_id))
1085 		return 0;
1086 
1087 	collection = find_collection(its, coll_id);
1088 	if (!collection) {
1089 		int ret;
1090 
1091 		if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL))
1092 			return E_ITS_MAPC_COLLECTION_OOR;
1093 
1094 		ret = vgic_its_alloc_collection(its, &collection, coll_id);
1095 		if (ret)
1096 			return ret;
1097 		new_coll = collection;
1098 	}
1099 
1100 	ite = vgic_its_alloc_ite(device, collection, event_id);
1101 	if (IS_ERR(ite)) {
1102 		if (new_coll)
1103 			vgic_its_free_collection(its, coll_id);
1104 		return PTR_ERR(ite);
1105 	}
1106 
1107 	if (its_is_collection_mapped(collection))
1108 		vcpu = collection_to_vcpu(kvm, collection);
1109 
1110 	irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
1111 	if (IS_ERR(irq)) {
1112 		if (new_coll)
1113 			vgic_its_free_collection(its, coll_id);
1114 		its_free_ite(kvm, ite);
1115 		return PTR_ERR(irq);
1116 	}
1117 	ite->irq = irq;
1118 
1119 	return 0;
1120 }
1121 
1122 /* Requires the its_lock to be held. */
vgic_its_free_device(struct kvm * kvm,struct vgic_its * its,struct its_device * device)1123 static void vgic_its_free_device(struct kvm *kvm, struct vgic_its *its,
1124 				 struct its_device *device)
1125 {
1126 	struct its_ite *ite, *temp;
1127 
1128 	/*
1129 	 * The spec says that unmapping a device with still valid
1130 	 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
1131 	 * since we cannot leave the memory unreferenced.
1132 	 */
1133 	list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
1134 		its_free_ite(kvm, ite);
1135 
1136 	vgic_its_invalidate_cache(its);
1137 
1138 	list_del(&device->dev_list);
1139 	kfree(device);
1140 }
1141 
1142 /* its lock must be held */
vgic_its_free_device_list(struct kvm * kvm,struct vgic_its * its)1143 static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its)
1144 {
1145 	struct its_device *cur, *temp;
1146 
1147 	list_for_each_entry_safe(cur, temp, &its->device_list, dev_list)
1148 		vgic_its_free_device(kvm, its, cur);
1149 }
1150 
1151 /* its lock must be held */
vgic_its_free_collection_list(struct kvm * kvm,struct vgic_its * its)1152 static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its)
1153 {
1154 	struct its_collection *cur, *temp;
1155 
1156 	list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list)
1157 		vgic_its_free_collection(its, cur->collection_id);
1158 }
1159 
1160 /* Must be called with its_lock mutex held */
vgic_its_alloc_device(struct vgic_its * its,u32 device_id,gpa_t itt_addr,u8 num_eventid_bits)1161 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
1162 						u32 device_id, gpa_t itt_addr,
1163 						u8 num_eventid_bits)
1164 {
1165 	struct its_device *device;
1166 
1167 	device = kzalloc(sizeof(*device), GFP_KERNEL_ACCOUNT);
1168 	if (!device)
1169 		return ERR_PTR(-ENOMEM);
1170 
1171 	device->device_id = device_id;
1172 	device->itt_addr = itt_addr;
1173 	device->num_eventid_bits = num_eventid_bits;
1174 	INIT_LIST_HEAD(&device->itt_head);
1175 
1176 	list_add_tail(&device->dev_list, &its->device_list);
1177 	return device;
1178 }
1179 
1180 /*
1181  * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
1182  * Must be called with the its_lock mutex held.
1183  */
vgic_its_cmd_handle_mapd(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1184 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
1185 				    u64 *its_cmd)
1186 {
1187 	u32 device_id = its_cmd_get_deviceid(its_cmd);
1188 	bool valid = its_cmd_get_validbit(its_cmd);
1189 	u8 num_eventid_bits = its_cmd_get_size(its_cmd);
1190 	gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
1191 	struct its_device *device;
1192 	gpa_t gpa;
1193 
1194 	if (!vgic_its_check_id(its, its->baser_device_table, device_id, &gpa))
1195 		return E_ITS_MAPD_DEVICE_OOR;
1196 
1197 	if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
1198 		return E_ITS_MAPD_ITTSIZE_OOR;
1199 
1200 	device = find_its_device(its, device_id);
1201 
1202 	/*
1203 	 * The spec says that calling MAPD on an already mapped device
1204 	 * invalidates all cached data for this device. We implement this
1205 	 * by removing the mapping and re-establishing it.
1206 	 */
1207 	if (device)
1208 		vgic_its_free_device(kvm, its, device);
1209 
1210 	/*
1211 	 * The spec does not say whether unmapping a not-mapped device
1212 	 * is an error, so we are done in any case.
1213 	 */
1214 	if (!valid)
1215 		return vgic_its_write_entry_lock(its, gpa, 0ULL, dte);
1216 
1217 	device = vgic_its_alloc_device(its, device_id, itt_addr,
1218 				       num_eventid_bits);
1219 
1220 	return PTR_ERR_OR_ZERO(device);
1221 }
1222 
1223 /*
1224  * The MAPC command maps collection IDs to redistributors.
1225  * Must be called with the its_lock mutex held.
1226  */
vgic_its_cmd_handle_mapc(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1227 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
1228 				    u64 *its_cmd)
1229 {
1230 	u16 coll_id;
1231 	struct its_collection *collection;
1232 	bool valid;
1233 
1234 	valid = its_cmd_get_validbit(its_cmd);
1235 	coll_id = its_cmd_get_collection(its_cmd);
1236 
1237 	if (!valid) {
1238 		vgic_its_free_collection(its, coll_id);
1239 		vgic_its_invalidate_cache(its);
1240 	} else {
1241 		struct kvm_vcpu *vcpu;
1242 
1243 		vcpu = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd));
1244 		if (!vcpu)
1245 			return E_ITS_MAPC_PROCNUM_OOR;
1246 
1247 		collection = find_collection(its, coll_id);
1248 
1249 		if (!collection) {
1250 			int ret;
1251 
1252 			if (!vgic_its_check_id(its, its->baser_coll_table,
1253 						coll_id, NULL))
1254 				return E_ITS_MAPC_COLLECTION_OOR;
1255 
1256 			ret = vgic_its_alloc_collection(its, &collection,
1257 							coll_id);
1258 			if (ret)
1259 				return ret;
1260 			collection->target_addr = vcpu->vcpu_id;
1261 		} else {
1262 			collection->target_addr = vcpu->vcpu_id;
1263 			update_affinity_collection(kvm, its, collection);
1264 		}
1265 	}
1266 
1267 	return 0;
1268 }
1269 
1270 /*
1271  * The CLEAR command removes the pending state for a particular LPI.
1272  * Must be called with the its_lock mutex held.
1273  */
vgic_its_cmd_handle_clear(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1274 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1275 				     u64 *its_cmd)
1276 {
1277 	u32 device_id = its_cmd_get_deviceid(its_cmd);
1278 	u32 event_id = its_cmd_get_id(its_cmd);
1279 	struct its_ite *ite;
1280 
1281 
1282 	ite = find_ite(its, device_id, event_id);
1283 	if (!ite)
1284 		return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1285 
1286 	ite->irq->pending_latch = false;
1287 
1288 	if (ite->irq->hw)
1289 		return irq_set_irqchip_state(ite->irq->host_irq,
1290 					     IRQCHIP_STATE_PENDING, false);
1291 
1292 	return 0;
1293 }
1294 
vgic_its_inv_lpi(struct kvm * kvm,struct vgic_irq * irq)1295 int vgic_its_inv_lpi(struct kvm *kvm, struct vgic_irq *irq)
1296 {
1297 	return update_lpi_config(kvm, irq, NULL, true);
1298 }
1299 
1300 /*
1301  * The INV command syncs the configuration bits from the memory table.
1302  * Must be called with the its_lock mutex held.
1303  */
vgic_its_cmd_handle_inv(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1304 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1305 				   u64 *its_cmd)
1306 {
1307 	u32 device_id = its_cmd_get_deviceid(its_cmd);
1308 	u32 event_id = its_cmd_get_id(its_cmd);
1309 	struct its_ite *ite;
1310 
1311 
1312 	ite = find_ite(its, device_id, event_id);
1313 	if (!ite)
1314 		return E_ITS_INV_UNMAPPED_INTERRUPT;
1315 
1316 	return vgic_its_inv_lpi(kvm, ite->irq);
1317 }
1318 
1319 /**
1320  * vgic_its_invall - invalidate all LPIs targeting a given vcpu
1321  * @vcpu: the vcpu for which the RD is targeted by an invalidation
1322  *
1323  * Contrary to the INVALL command, this targets a RD instead of a
1324  * collection, and we don't need to hold the its_lock, since no ITS is
1325  * involved here.
1326  */
vgic_its_invall(struct kvm_vcpu * vcpu)1327 int vgic_its_invall(struct kvm_vcpu *vcpu)
1328 {
1329 	struct kvm *kvm = vcpu->kvm;
1330 	struct vgic_dist *dist = &kvm->arch.vgic;
1331 	struct vgic_irq *irq;
1332 	unsigned long intid;
1333 
1334 	xa_for_each(&dist->lpi_xa, intid, irq) {
1335 		irq = vgic_get_irq(kvm, intid);
1336 		if (!irq)
1337 			continue;
1338 
1339 		update_lpi_config(kvm, irq, vcpu, false);
1340 		vgic_put_irq(kvm, irq);
1341 	}
1342 
1343 	if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm)
1344 		its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe);
1345 
1346 	return 0;
1347 }
1348 
1349 /*
1350  * The INVALL command requests flushing of all IRQ data in this collection.
1351  * Find the VCPU mapped to that collection, then iterate over the VM's list
1352  * of mapped LPIs and update the configuration for each IRQ which targets
1353  * the specified vcpu. The configuration will be read from the in-memory
1354  * configuration table.
1355  * Must be called with the its_lock mutex held.
1356  */
vgic_its_cmd_handle_invall(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1357 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1358 				      u64 *its_cmd)
1359 {
1360 	u32 coll_id = its_cmd_get_collection(its_cmd);
1361 	struct its_collection *collection;
1362 	struct kvm_vcpu *vcpu;
1363 
1364 	collection = find_collection(its, coll_id);
1365 	if (!its_is_collection_mapped(collection))
1366 		return E_ITS_INVALL_UNMAPPED_COLLECTION;
1367 
1368 	vcpu = collection_to_vcpu(kvm, collection);
1369 	vgic_its_invall(vcpu);
1370 
1371 	return 0;
1372 }
1373 
1374 /*
1375  * The MOVALL command moves the pending state of all IRQs targeting one
1376  * redistributor to another. We don't hold the pending state in the VCPUs,
1377  * but in the IRQs instead, so there is really not much to do for us here.
1378  * However the spec says that no IRQ must target the old redistributor
1379  * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1380  * This command affects all LPIs in the system that target that redistributor.
1381  */
vgic_its_cmd_handle_movall(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1382 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1383 				      u64 *its_cmd)
1384 {
1385 	struct vgic_dist *dist = &kvm->arch.vgic;
1386 	struct kvm_vcpu *vcpu1, *vcpu2;
1387 	struct vgic_irq *irq;
1388 	unsigned long intid;
1389 
1390 	/* We advertise GITS_TYPER.PTA==0, making the address the vcpu ID */
1391 	vcpu1 = kvm_get_vcpu_by_id(kvm, its_cmd_get_target_addr(its_cmd));
1392 	vcpu2 = kvm_get_vcpu_by_id(kvm, its_cmd_mask_field(its_cmd, 3, 16, 32));
1393 
1394 	if (!vcpu1 || !vcpu2)
1395 		return E_ITS_MOVALL_PROCNUM_OOR;
1396 
1397 	if (vcpu1 == vcpu2)
1398 		return 0;
1399 
1400 	xa_for_each(&dist->lpi_xa, intid, irq) {
1401 		irq = vgic_get_irq(kvm, intid);
1402 		if (!irq)
1403 			continue;
1404 
1405 		update_affinity(irq, vcpu2);
1406 
1407 		vgic_put_irq(kvm, irq);
1408 	}
1409 
1410 	vgic_its_invalidate_cache(its);
1411 
1412 	return 0;
1413 }
1414 
1415 /*
1416  * The INT command injects the LPI associated with that DevID/EvID pair.
1417  * Must be called with the its_lock mutex held.
1418  */
vgic_its_cmd_handle_int(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1419 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1420 				   u64 *its_cmd)
1421 {
1422 	u32 msi_data = its_cmd_get_id(its_cmd);
1423 	u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1424 
1425 	return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1426 }
1427 
1428 /*
1429  * This function is called with the its_cmd lock held, but the ITS data
1430  * structure lock dropped.
1431  */
vgic_its_handle_command(struct kvm * kvm,struct vgic_its * its,u64 * its_cmd)1432 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1433 				   u64 *its_cmd)
1434 {
1435 	int ret = -ENODEV;
1436 
1437 	mutex_lock(&its->its_lock);
1438 	switch (its_cmd_get_command(its_cmd)) {
1439 	case GITS_CMD_MAPD:
1440 		ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1441 		break;
1442 	case GITS_CMD_MAPC:
1443 		ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1444 		break;
1445 	case GITS_CMD_MAPI:
1446 		ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1447 		break;
1448 	case GITS_CMD_MAPTI:
1449 		ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1450 		break;
1451 	case GITS_CMD_MOVI:
1452 		ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1453 		break;
1454 	case GITS_CMD_DISCARD:
1455 		ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1456 		break;
1457 	case GITS_CMD_CLEAR:
1458 		ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1459 		break;
1460 	case GITS_CMD_MOVALL:
1461 		ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1462 		break;
1463 	case GITS_CMD_INT:
1464 		ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1465 		break;
1466 	case GITS_CMD_INV:
1467 		ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1468 		break;
1469 	case GITS_CMD_INVALL:
1470 		ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1471 		break;
1472 	case GITS_CMD_SYNC:
1473 		/* we ignore this command: we are in sync all of the time */
1474 		ret = 0;
1475 		break;
1476 	}
1477 	mutex_unlock(&its->its_lock);
1478 
1479 	return ret;
1480 }
1481 
vgic_sanitise_its_baser(u64 reg)1482 static u64 vgic_sanitise_its_baser(u64 reg)
1483 {
1484 	reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1485 				  GITS_BASER_SHAREABILITY_SHIFT,
1486 				  vgic_sanitise_shareability);
1487 	reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1488 				  GITS_BASER_INNER_CACHEABILITY_SHIFT,
1489 				  vgic_sanitise_inner_cacheability);
1490 	reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1491 				  GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1492 				  vgic_sanitise_outer_cacheability);
1493 
1494 	/* We support only one (ITS) page size: 64K */
1495 	reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1496 
1497 	return reg;
1498 }
1499 
vgic_sanitise_its_cbaser(u64 reg)1500 static u64 vgic_sanitise_its_cbaser(u64 reg)
1501 {
1502 	reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1503 				  GITS_CBASER_SHAREABILITY_SHIFT,
1504 				  vgic_sanitise_shareability);
1505 	reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1506 				  GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1507 				  vgic_sanitise_inner_cacheability);
1508 	reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1509 				  GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1510 				  vgic_sanitise_outer_cacheability);
1511 
1512 	/* Sanitise the physical address to be 64k aligned. */
1513 	reg &= ~GENMASK_ULL(15, 12);
1514 
1515 	return reg;
1516 }
1517 
vgic_mmio_read_its_cbaser(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)1518 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1519 					       struct vgic_its *its,
1520 					       gpa_t addr, unsigned int len)
1521 {
1522 	return extract_bytes(its->cbaser, addr & 7, len);
1523 }
1524 
vgic_mmio_write_its_cbaser(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1525 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1526 				       gpa_t addr, unsigned int len,
1527 				       unsigned long val)
1528 {
1529 	/* When GITS_CTLR.Enable is 1, this register is RO. */
1530 	if (its->enabled)
1531 		return;
1532 
1533 	mutex_lock(&its->cmd_lock);
1534 	its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1535 	its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1536 	its->creadr = 0;
1537 	/*
1538 	 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1539 	 * it to CREADR to make sure we start with an empty command buffer.
1540 	 */
1541 	its->cwriter = its->creadr;
1542 	mutex_unlock(&its->cmd_lock);
1543 }
1544 
1545 #define ITS_CMD_BUFFER_SIZE(baser)	((((baser) & 0xff) + 1) << 12)
1546 #define ITS_CMD_SIZE			32
1547 #define ITS_CMD_OFFSET(reg)		((reg) & GENMASK(19, 5))
1548 
1549 /* Must be called with the cmd_lock held. */
vgic_its_process_commands(struct kvm * kvm,struct vgic_its * its)1550 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1551 {
1552 	gpa_t cbaser;
1553 	u64 cmd_buf[4];
1554 
1555 	/* Commands are only processed when the ITS is enabled. */
1556 	if (!its->enabled)
1557 		return;
1558 
1559 	cbaser = GITS_CBASER_ADDRESS(its->cbaser);
1560 
1561 	while (its->cwriter != its->creadr) {
1562 		int ret = kvm_read_guest_lock(kvm, cbaser + its->creadr,
1563 					      cmd_buf, ITS_CMD_SIZE);
1564 		/*
1565 		 * If kvm_read_guest() fails, this could be due to the guest
1566 		 * programming a bogus value in CBASER or something else going
1567 		 * wrong from which we cannot easily recover.
1568 		 * According to section 6.3.2 in the GICv3 spec we can just
1569 		 * ignore that command then.
1570 		 */
1571 		if (!ret)
1572 			vgic_its_handle_command(kvm, its, cmd_buf);
1573 
1574 		its->creadr += ITS_CMD_SIZE;
1575 		if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1576 			its->creadr = 0;
1577 	}
1578 }
1579 
1580 /*
1581  * By writing to CWRITER the guest announces new commands to be processed.
1582  * To avoid any races in the first place, we take the its_cmd lock, which
1583  * protects our ring buffer variables, so that there is only one user
1584  * per ITS handling commands at a given time.
1585  */
vgic_mmio_write_its_cwriter(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1586 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1587 					gpa_t addr, unsigned int len,
1588 					unsigned long val)
1589 {
1590 	u64 reg;
1591 
1592 	if (!its)
1593 		return;
1594 
1595 	mutex_lock(&its->cmd_lock);
1596 
1597 	reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1598 	reg = ITS_CMD_OFFSET(reg);
1599 	if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1600 		mutex_unlock(&its->cmd_lock);
1601 		return;
1602 	}
1603 	its->cwriter = reg;
1604 
1605 	vgic_its_process_commands(kvm, its);
1606 
1607 	mutex_unlock(&its->cmd_lock);
1608 }
1609 
vgic_mmio_read_its_cwriter(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)1610 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1611 						struct vgic_its *its,
1612 						gpa_t addr, unsigned int len)
1613 {
1614 	return extract_bytes(its->cwriter, addr & 0x7, len);
1615 }
1616 
vgic_mmio_read_its_creadr(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)1617 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1618 					       struct vgic_its *its,
1619 					       gpa_t addr, unsigned int len)
1620 {
1621 	return extract_bytes(its->creadr, addr & 0x7, len);
1622 }
1623 
vgic_mmio_uaccess_write_its_creadr(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1624 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1625 					      struct vgic_its *its,
1626 					      gpa_t addr, unsigned int len,
1627 					      unsigned long val)
1628 {
1629 	u32 cmd_offset;
1630 	int ret = 0;
1631 
1632 	mutex_lock(&its->cmd_lock);
1633 
1634 	if (its->enabled) {
1635 		ret = -EBUSY;
1636 		goto out;
1637 	}
1638 
1639 	cmd_offset = ITS_CMD_OFFSET(val);
1640 	if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1641 		ret = -EINVAL;
1642 		goto out;
1643 	}
1644 
1645 	its->creadr = cmd_offset;
1646 out:
1647 	mutex_unlock(&its->cmd_lock);
1648 	return ret;
1649 }
1650 
1651 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
vgic_mmio_read_its_baser(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len)1652 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1653 					      struct vgic_its *its,
1654 					      gpa_t addr, unsigned int len)
1655 {
1656 	u64 reg;
1657 
1658 	switch (BASER_INDEX(addr)) {
1659 	case 0:
1660 		reg = its->baser_device_table;
1661 		break;
1662 	case 1:
1663 		reg = its->baser_coll_table;
1664 		break;
1665 	default:
1666 		reg = 0;
1667 		break;
1668 	}
1669 
1670 	return extract_bytes(reg, addr & 7, len);
1671 }
1672 
1673 #define GITS_BASER_RO_MASK	(GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
vgic_mmio_write_its_baser(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1674 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1675 				      struct vgic_its *its,
1676 				      gpa_t addr, unsigned int len,
1677 				      unsigned long val)
1678 {
1679 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1680 	u64 entry_size, table_type;
1681 	u64 reg, *regptr, clearbits = 0;
1682 
1683 	/* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1684 	if (its->enabled)
1685 		return;
1686 
1687 	switch (BASER_INDEX(addr)) {
1688 	case 0:
1689 		regptr = &its->baser_device_table;
1690 		entry_size = abi->dte_esz;
1691 		table_type = GITS_BASER_TYPE_DEVICE;
1692 		break;
1693 	case 1:
1694 		regptr = &its->baser_coll_table;
1695 		entry_size = abi->cte_esz;
1696 		table_type = GITS_BASER_TYPE_COLLECTION;
1697 		clearbits = GITS_BASER_INDIRECT;
1698 		break;
1699 	default:
1700 		return;
1701 	}
1702 
1703 	reg = update_64bit_reg(*regptr, addr & 7, len, val);
1704 	reg &= ~GITS_BASER_RO_MASK;
1705 	reg &= ~clearbits;
1706 
1707 	reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1708 	reg |= table_type << GITS_BASER_TYPE_SHIFT;
1709 	reg = vgic_sanitise_its_baser(reg);
1710 
1711 	*regptr = reg;
1712 
1713 	if (!(reg & GITS_BASER_VALID)) {
1714 		/* Take the its_lock to prevent a race with a save/restore */
1715 		mutex_lock(&its->its_lock);
1716 		switch (table_type) {
1717 		case GITS_BASER_TYPE_DEVICE:
1718 			vgic_its_free_device_list(kvm, its);
1719 			break;
1720 		case GITS_BASER_TYPE_COLLECTION:
1721 			vgic_its_free_collection_list(kvm, its);
1722 			break;
1723 		}
1724 		mutex_unlock(&its->its_lock);
1725 	}
1726 }
1727 
vgic_mmio_read_its_ctlr(struct kvm * vcpu,struct vgic_its * its,gpa_t addr,unsigned int len)1728 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1729 					     struct vgic_its *its,
1730 					     gpa_t addr, unsigned int len)
1731 {
1732 	u32 reg = 0;
1733 
1734 	mutex_lock(&its->cmd_lock);
1735 	if (its->creadr == its->cwriter)
1736 		reg |= GITS_CTLR_QUIESCENT;
1737 	if (its->enabled)
1738 		reg |= GITS_CTLR_ENABLE;
1739 	mutex_unlock(&its->cmd_lock);
1740 
1741 	return reg;
1742 }
1743 
vgic_mmio_write_its_ctlr(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1744 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1745 				     gpa_t addr, unsigned int len,
1746 				     unsigned long val)
1747 {
1748 	mutex_lock(&its->cmd_lock);
1749 
1750 	/*
1751 	 * It is UNPREDICTABLE to enable the ITS if any of the CBASER or
1752 	 * device/collection BASER are invalid
1753 	 */
1754 	if (!its->enabled && (val & GITS_CTLR_ENABLE) &&
1755 		(!(its->baser_device_table & GITS_BASER_VALID) ||
1756 		 !(its->baser_coll_table & GITS_BASER_VALID) ||
1757 		 !(its->cbaser & GITS_CBASER_VALID)))
1758 		goto out;
1759 
1760 	its->enabled = !!(val & GITS_CTLR_ENABLE);
1761 	if (!its->enabled)
1762 		vgic_its_invalidate_cache(its);
1763 
1764 	/*
1765 	 * Try to process any pending commands. This function bails out early
1766 	 * if the ITS is disabled or no commands have been queued.
1767 	 */
1768 	vgic_its_process_commands(kvm, its);
1769 
1770 out:
1771 	mutex_unlock(&its->cmd_lock);
1772 }
1773 
1774 #define REGISTER_ITS_DESC(off, rd, wr, length, acc)		\
1775 {								\
1776 	.reg_offset = off,					\
1777 	.len = length,						\
1778 	.access_flags = acc,					\
1779 	.its_read = rd,						\
1780 	.its_write = wr,					\
1781 }
1782 
1783 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1784 {								\
1785 	.reg_offset = off,					\
1786 	.len = length,						\
1787 	.access_flags = acc,					\
1788 	.its_read = rd,						\
1789 	.its_write = wr,					\
1790 	.uaccess_its_write = uwr,				\
1791 }
1792 
its_mmio_write_wi(struct kvm * kvm,struct vgic_its * its,gpa_t addr,unsigned int len,unsigned long val)1793 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1794 			      gpa_t addr, unsigned int len, unsigned long val)
1795 {
1796 	/* Ignore */
1797 }
1798 
1799 static struct vgic_register_region its_registers[] = {
1800 	REGISTER_ITS_DESC(GITS_CTLR,
1801 		vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1802 		VGIC_ACCESS_32bit),
1803 	REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1804 		vgic_mmio_read_its_iidr, its_mmio_write_wi,
1805 		vgic_mmio_uaccess_write_its_iidr, 4,
1806 		VGIC_ACCESS_32bit),
1807 	REGISTER_ITS_DESC(GITS_TYPER,
1808 		vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1809 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1810 	REGISTER_ITS_DESC(GITS_CBASER,
1811 		vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1812 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1813 	REGISTER_ITS_DESC(GITS_CWRITER,
1814 		vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1815 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1816 	REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1817 		vgic_mmio_read_its_creadr, its_mmio_write_wi,
1818 		vgic_mmio_uaccess_write_its_creadr, 8,
1819 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1820 	REGISTER_ITS_DESC(GITS_BASER,
1821 		vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1822 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1823 	REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1824 		vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1825 		VGIC_ACCESS_32bit),
1826 };
1827 
1828 /* This is called on setting the LPI enable bit in the redistributor. */
vgic_enable_lpis(struct kvm_vcpu * vcpu)1829 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1830 {
1831 	if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1832 		its_sync_lpi_pending_table(vcpu);
1833 }
1834 
vgic_register_its_iodev(struct kvm * kvm,struct vgic_its * its,u64 addr)1835 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its,
1836 				   u64 addr)
1837 {
1838 	struct vgic_io_device *iodev = &its->iodev;
1839 	int ret;
1840 
1841 	mutex_lock(&kvm->slots_lock);
1842 	if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1843 		ret = -EBUSY;
1844 		goto out;
1845 	}
1846 
1847 	its->vgic_its_base = addr;
1848 	iodev->regions = its_registers;
1849 	iodev->nr_regions = ARRAY_SIZE(its_registers);
1850 	kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1851 
1852 	iodev->base_addr = its->vgic_its_base;
1853 	iodev->iodev_type = IODEV_ITS;
1854 	iodev->its = its;
1855 	ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1856 				      KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1857 out:
1858 	mutex_unlock(&kvm->slots_lock);
1859 
1860 	return ret;
1861 }
1862 
1863 #define INITIAL_BASER_VALUE						  \
1864 	(GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb)		| \
1865 	 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner)		| \
1866 	 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)		| \
1867 	 GITS_BASER_PAGE_SIZE_64K)
1868 
1869 #define INITIAL_PROPBASER_VALUE						  \
1870 	(GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb)		| \
1871 	 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner)	| \
1872 	 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1873 
vgic_its_create(struct kvm_device * dev,u32 type)1874 static int vgic_its_create(struct kvm_device *dev, u32 type)
1875 {
1876 	int ret;
1877 	struct vgic_its *its;
1878 
1879 	if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1880 		return -ENODEV;
1881 
1882 	its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL_ACCOUNT);
1883 	if (!its)
1884 		return -ENOMEM;
1885 
1886 	mutex_lock(&dev->kvm->arch.config_lock);
1887 
1888 	if (vgic_initialized(dev->kvm)) {
1889 		ret = vgic_v4_init(dev->kvm);
1890 		if (ret < 0) {
1891 			mutex_unlock(&dev->kvm->arch.config_lock);
1892 			kfree(its);
1893 			return ret;
1894 		}
1895 	}
1896 
1897 	mutex_init(&its->its_lock);
1898 	mutex_init(&its->cmd_lock);
1899 
1900 	/* Yep, even more trickery for lock ordering... */
1901 #ifdef CONFIG_LOCKDEP
1902 	mutex_lock(&its->cmd_lock);
1903 	mutex_lock(&its->its_lock);
1904 	mutex_unlock(&its->its_lock);
1905 	mutex_unlock(&its->cmd_lock);
1906 #endif
1907 
1908 	its->vgic_its_base = VGIC_ADDR_UNDEF;
1909 
1910 	INIT_LIST_HEAD(&its->device_list);
1911 	INIT_LIST_HEAD(&its->collection_list);
1912 	xa_init(&its->translation_cache);
1913 
1914 	dev->kvm->arch.vgic.msis_require_devid = true;
1915 	dev->kvm->arch.vgic.has_its = true;
1916 	its->enabled = false;
1917 	its->dev = dev;
1918 
1919 	its->baser_device_table = INITIAL_BASER_VALUE			|
1920 		((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1921 	its->baser_coll_table = INITIAL_BASER_VALUE |
1922 		((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1923 	dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1924 
1925 	dev->private = its;
1926 
1927 	ret = vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1928 
1929 	mutex_unlock(&dev->kvm->arch.config_lock);
1930 
1931 	return ret;
1932 }
1933 
vgic_its_destroy(struct kvm_device * kvm_dev)1934 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1935 {
1936 	struct kvm *kvm = kvm_dev->kvm;
1937 	struct vgic_its *its = kvm_dev->private;
1938 
1939 	mutex_lock(&its->its_lock);
1940 
1941 	vgic_its_free_device_list(kvm, its);
1942 	vgic_its_free_collection_list(kvm, its);
1943 	vgic_its_invalidate_cache(its);
1944 	xa_destroy(&its->translation_cache);
1945 
1946 	mutex_unlock(&its->its_lock);
1947 	kfree(its);
1948 	kfree(kvm_dev);/* alloc by kvm_ioctl_create_device, free by .destroy */
1949 }
1950 
vgic_its_has_attr_regs(struct kvm_device * dev,struct kvm_device_attr * attr)1951 static int vgic_its_has_attr_regs(struct kvm_device *dev,
1952 				  struct kvm_device_attr *attr)
1953 {
1954 	const struct vgic_register_region *region;
1955 	gpa_t offset = attr->attr;
1956 	int align;
1957 
1958 	align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1959 
1960 	if (offset & align)
1961 		return -EINVAL;
1962 
1963 	region = vgic_find_mmio_region(its_registers,
1964 				       ARRAY_SIZE(its_registers),
1965 				       offset);
1966 	if (!region)
1967 		return -ENXIO;
1968 
1969 	return 0;
1970 }
1971 
vgic_its_attr_regs_access(struct kvm_device * dev,struct kvm_device_attr * attr,u64 * reg,bool is_write)1972 static int vgic_its_attr_regs_access(struct kvm_device *dev,
1973 				     struct kvm_device_attr *attr,
1974 				     u64 *reg, bool is_write)
1975 {
1976 	const struct vgic_register_region *region;
1977 	struct vgic_its *its;
1978 	gpa_t addr, offset;
1979 	unsigned int len;
1980 	int align, ret = 0;
1981 
1982 	its = dev->private;
1983 	offset = attr->attr;
1984 
1985 	/*
1986 	 * Although the spec supports upper/lower 32-bit accesses to
1987 	 * 64-bit ITS registers, the userspace ABI requires 64-bit
1988 	 * accesses to all 64-bit wide registers. We therefore only
1989 	 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1990 	 * registers
1991 	 */
1992 	if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1993 		align = 0x3;
1994 	else
1995 		align = 0x7;
1996 
1997 	if (offset & align)
1998 		return -EINVAL;
1999 
2000 	mutex_lock(&dev->kvm->lock);
2001 
2002 	if (!lock_all_vcpus(dev->kvm)) {
2003 		mutex_unlock(&dev->kvm->lock);
2004 		return -EBUSY;
2005 	}
2006 
2007 	mutex_lock(&dev->kvm->arch.config_lock);
2008 
2009 	if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
2010 		ret = -ENXIO;
2011 		goto out;
2012 	}
2013 
2014 	region = vgic_find_mmio_region(its_registers,
2015 				       ARRAY_SIZE(its_registers),
2016 				       offset);
2017 	if (!region) {
2018 		ret = -ENXIO;
2019 		goto out;
2020 	}
2021 
2022 	addr = its->vgic_its_base + offset;
2023 
2024 	len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
2025 
2026 	if (is_write) {
2027 		if (region->uaccess_its_write)
2028 			ret = region->uaccess_its_write(dev->kvm, its, addr,
2029 							len, *reg);
2030 		else
2031 			region->its_write(dev->kvm, its, addr, len, *reg);
2032 	} else {
2033 		*reg = region->its_read(dev->kvm, its, addr, len);
2034 	}
2035 out:
2036 	mutex_unlock(&dev->kvm->arch.config_lock);
2037 	unlock_all_vcpus(dev->kvm);
2038 	mutex_unlock(&dev->kvm->lock);
2039 	return ret;
2040 }
2041 
compute_next_devid_offset(struct list_head * h,struct its_device * dev)2042 static u32 compute_next_devid_offset(struct list_head *h,
2043 				     struct its_device *dev)
2044 {
2045 	struct its_device *next;
2046 	u32 next_offset;
2047 
2048 	if (list_is_last(&dev->dev_list, h))
2049 		return 0;
2050 	next = list_next_entry(dev, dev_list);
2051 	next_offset = next->device_id - dev->device_id;
2052 
2053 	return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
2054 }
2055 
compute_next_eventid_offset(struct list_head * h,struct its_ite * ite)2056 static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
2057 {
2058 	struct its_ite *next;
2059 	u32 next_offset;
2060 
2061 	if (list_is_last(&ite->ite_list, h))
2062 		return 0;
2063 	next = list_next_entry(ite, ite_list);
2064 	next_offset = next->event_id - ite->event_id;
2065 
2066 	return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET);
2067 }
2068 
2069 /**
2070  * typedef entry_fn_t - Callback called on a table entry restore path
2071  * @its: its handle
2072  * @id: id of the entry
2073  * @entry: pointer to the entry
2074  * @opaque: pointer to an opaque data
2075  *
2076  * Return: < 0 on error, 0 if last element was identified, id offset to next
2077  * element otherwise
2078  */
2079 typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
2080 			  void *opaque);
2081 
2082 /**
2083  * scan_its_table - Scan a contiguous table in guest RAM and applies a function
2084  * to each entry
2085  *
2086  * @its: its handle
2087  * @base: base gpa of the table
2088  * @size: size of the table in bytes
2089  * @esz: entry size in bytes
2090  * @start_id: the ID of the first entry in the table
2091  * (non zero for 2d level tables)
2092  * @fn: function to apply on each entry
2093  * @opaque: pointer to opaque data
2094  *
2095  * Return: < 0 on error, 0 if last element was identified, 1 otherwise
2096  * (the last element may not be found on second level tables)
2097  */
scan_its_table(struct vgic_its * its,gpa_t base,int size,u32 esz,int start_id,entry_fn_t fn,void * opaque)2098 static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz,
2099 			  int start_id, entry_fn_t fn, void *opaque)
2100 {
2101 	struct kvm *kvm = its->dev->kvm;
2102 	unsigned long len = size;
2103 	int id = start_id;
2104 	gpa_t gpa = base;
2105 	char entry[ESZ_MAX];
2106 	int ret;
2107 
2108 	memset(entry, 0, esz);
2109 
2110 	while (true) {
2111 		int next_offset;
2112 		size_t byte_offset;
2113 
2114 		ret = kvm_read_guest_lock(kvm, gpa, entry, esz);
2115 		if (ret)
2116 			return ret;
2117 
2118 		next_offset = fn(its, id, entry, opaque);
2119 		if (next_offset <= 0)
2120 			return next_offset;
2121 
2122 		byte_offset = next_offset * esz;
2123 		if (byte_offset >= len)
2124 			break;
2125 
2126 		id += next_offset;
2127 		gpa += byte_offset;
2128 		len -= byte_offset;
2129 	}
2130 	return 1;
2131 }
2132 
2133 /*
2134  * vgic_its_save_ite - Save an interrupt translation entry at @gpa
2135  */
vgic_its_save_ite(struct vgic_its * its,struct its_device * dev,struct its_ite * ite,gpa_t gpa)2136 static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
2137 			      struct its_ite *ite, gpa_t gpa)
2138 {
2139 	u32 next_offset;
2140 	u64 val;
2141 
2142 	next_offset = compute_next_eventid_offset(&dev->itt_head, ite);
2143 	val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) |
2144 	       ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) |
2145 		ite->collection->collection_id;
2146 	val = cpu_to_le64(val);
2147 
2148 	return vgic_its_write_entry_lock(its, gpa, val, ite);
2149 }
2150 
2151 /**
2152  * vgic_its_restore_ite - restore an interrupt translation entry
2153  *
2154  * @its: its handle
2155  * @event_id: id used for indexing
2156  * @ptr: pointer to the ITE entry
2157  * @opaque: pointer to the its_device
2158  */
vgic_its_restore_ite(struct vgic_its * its,u32 event_id,void * ptr,void * opaque)2159 static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id,
2160 				void *ptr, void *opaque)
2161 {
2162 	struct its_device *dev = opaque;
2163 	struct its_collection *collection;
2164 	struct kvm *kvm = its->dev->kvm;
2165 	struct kvm_vcpu *vcpu = NULL;
2166 	u64 val;
2167 	u64 *p = (u64 *)ptr;
2168 	struct vgic_irq *irq;
2169 	u32 coll_id, lpi_id;
2170 	struct its_ite *ite;
2171 	u32 offset;
2172 
2173 	val = *p;
2174 
2175 	val = le64_to_cpu(val);
2176 
2177 	coll_id = val & KVM_ITS_ITE_ICID_MASK;
2178 	lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT;
2179 
2180 	if (!lpi_id)
2181 		return 1; /* invalid entry, no choice but to scan next entry */
2182 
2183 	if (lpi_id < VGIC_MIN_LPI)
2184 		return -EINVAL;
2185 
2186 	offset = val >> KVM_ITS_ITE_NEXT_SHIFT;
2187 	if (event_id + offset >= BIT_ULL(dev->num_eventid_bits))
2188 		return -EINVAL;
2189 
2190 	collection = find_collection(its, coll_id);
2191 	if (!collection)
2192 		return -EINVAL;
2193 
2194 	if (!vgic_its_check_event_id(its, dev, event_id))
2195 		return -EINVAL;
2196 
2197 	ite = vgic_its_alloc_ite(dev, collection, event_id);
2198 	if (IS_ERR(ite))
2199 		return PTR_ERR(ite);
2200 
2201 	if (its_is_collection_mapped(collection))
2202 		vcpu = kvm_get_vcpu_by_id(kvm, collection->target_addr);
2203 
2204 	irq = vgic_add_lpi(kvm, lpi_id, vcpu);
2205 	if (IS_ERR(irq)) {
2206 		its_free_ite(kvm, ite);
2207 		return PTR_ERR(irq);
2208 	}
2209 	ite->irq = irq;
2210 
2211 	return offset;
2212 }
2213 
vgic_its_ite_cmp(void * priv,const struct list_head * a,const struct list_head * b)2214 static int vgic_its_ite_cmp(void *priv, const struct list_head *a,
2215 			    const struct list_head *b)
2216 {
2217 	struct its_ite *itea = container_of(a, struct its_ite, ite_list);
2218 	struct its_ite *iteb = container_of(b, struct its_ite, ite_list);
2219 
2220 	if (itea->event_id < iteb->event_id)
2221 		return -1;
2222 	else
2223 		return 1;
2224 }
2225 
vgic_its_save_itt(struct vgic_its * its,struct its_device * device)2226 static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
2227 {
2228 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2229 	gpa_t base = device->itt_addr;
2230 	struct its_ite *ite;
2231 	int ret;
2232 	int ite_esz = abi->ite_esz;
2233 
2234 	list_sort(NULL, &device->itt_head, vgic_its_ite_cmp);
2235 
2236 	list_for_each_entry(ite, &device->itt_head, ite_list) {
2237 		gpa_t gpa = base + ite->event_id * ite_esz;
2238 
2239 		/*
2240 		 * If an LPI carries the HW bit, this means that this
2241 		 * interrupt is controlled by GICv4, and we do not
2242 		 * have direct access to that state without GICv4.1.
2243 		 * Let's simply fail the save operation...
2244 		 */
2245 		if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1)
2246 			return -EACCES;
2247 
2248 		ret = vgic_its_save_ite(its, device, ite, gpa);
2249 		if (ret)
2250 			return ret;
2251 	}
2252 	return 0;
2253 }
2254 
2255 /**
2256  * vgic_its_restore_itt - restore the ITT of a device
2257  *
2258  * @its: its handle
2259  * @dev: device handle
2260  *
2261  * Return 0 on success, < 0 on error
2262  */
vgic_its_restore_itt(struct vgic_its * its,struct its_device * dev)2263 static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
2264 {
2265 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2266 	gpa_t base = dev->itt_addr;
2267 	int ret;
2268 	int ite_esz = abi->ite_esz;
2269 	size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz;
2270 
2271 	ret = scan_its_table(its, base, max_size, ite_esz, 0,
2272 			     vgic_its_restore_ite, dev);
2273 
2274 	/* scan_its_table returns +1 if all ITEs are invalid */
2275 	if (ret > 0)
2276 		ret = 0;
2277 
2278 	return ret;
2279 }
2280 
2281 /**
2282  * vgic_its_save_dte - Save a device table entry at a given GPA
2283  *
2284  * @its: ITS handle
2285  * @dev: ITS device
2286  * @ptr: GPA
2287  */
vgic_its_save_dte(struct vgic_its * its,struct its_device * dev,gpa_t ptr)2288 static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
2289 			     gpa_t ptr)
2290 {
2291 	u64 val, itt_addr_field;
2292 	u32 next_offset;
2293 
2294 	itt_addr_field = dev->itt_addr >> 8;
2295 	next_offset = compute_next_devid_offset(&its->device_list, dev);
2296 	val = (1ULL << KVM_ITS_DTE_VALID_SHIFT |
2297 	       ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) |
2298 	       (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) |
2299 		(dev->num_eventid_bits - 1));
2300 	val = cpu_to_le64(val);
2301 
2302 	return vgic_its_write_entry_lock(its, ptr, val, dte);
2303 }
2304 
2305 /**
2306  * vgic_its_restore_dte - restore a device table entry
2307  *
2308  * @its: its handle
2309  * @id: device id the DTE corresponds to
2310  * @ptr: kernel VA where the 8 byte DTE is located
2311  * @opaque: unused
2312  *
2313  * Return: < 0 on error, 0 if the dte is the last one, id offset to the
2314  * next dte otherwise
2315  */
vgic_its_restore_dte(struct vgic_its * its,u32 id,void * ptr,void * opaque)2316 static int vgic_its_restore_dte(struct vgic_its *its, u32 id,
2317 				void *ptr, void *opaque)
2318 {
2319 	struct its_device *dev;
2320 	u64 baser = its->baser_device_table;
2321 	gpa_t itt_addr;
2322 	u8 num_eventid_bits;
2323 	u64 entry = *(u64 *)ptr;
2324 	bool valid;
2325 	u32 offset;
2326 	int ret;
2327 
2328 	entry = le64_to_cpu(entry);
2329 
2330 	valid = entry >> KVM_ITS_DTE_VALID_SHIFT;
2331 	num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1;
2332 	itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK)
2333 			>> KVM_ITS_DTE_ITTADDR_SHIFT) << 8;
2334 
2335 	if (!valid)
2336 		return 1;
2337 
2338 	/* dte entry is valid */
2339 	offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT;
2340 
2341 	if (!vgic_its_check_id(its, baser, id, NULL))
2342 		return -EINVAL;
2343 
2344 	dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits);
2345 	if (IS_ERR(dev))
2346 		return PTR_ERR(dev);
2347 
2348 	ret = vgic_its_restore_itt(its, dev);
2349 	if (ret) {
2350 		vgic_its_free_device(its->dev->kvm, its, dev);
2351 		return ret;
2352 	}
2353 
2354 	return offset;
2355 }
2356 
vgic_its_device_cmp(void * priv,const struct list_head * a,const struct list_head * b)2357 static int vgic_its_device_cmp(void *priv, const struct list_head *a,
2358 			       const struct list_head *b)
2359 {
2360 	struct its_device *deva = container_of(a, struct its_device, dev_list);
2361 	struct its_device *devb = container_of(b, struct its_device, dev_list);
2362 
2363 	if (deva->device_id < devb->device_id)
2364 		return -1;
2365 	else
2366 		return 1;
2367 }
2368 
2369 /*
2370  * vgic_its_save_device_tables - Save the device table and all ITT
2371  * into guest RAM
2372  *
2373  * L1/L2 handling is hidden by vgic_its_check_id() helper which directly
2374  * returns the GPA of the device entry
2375  */
vgic_its_save_device_tables(struct vgic_its * its)2376 static int vgic_its_save_device_tables(struct vgic_its *its)
2377 {
2378 	u64 baser = its->baser_device_table;
2379 	struct its_device *dev;
2380 
2381 	if (!(baser & GITS_BASER_VALID))
2382 		return 0;
2383 
2384 	list_sort(NULL, &its->device_list, vgic_its_device_cmp);
2385 
2386 	list_for_each_entry(dev, &its->device_list, dev_list) {
2387 		int ret;
2388 		gpa_t eaddr;
2389 
2390 		if (!vgic_its_check_id(its, baser,
2391 				       dev->device_id, &eaddr))
2392 			return -EINVAL;
2393 
2394 		ret = vgic_its_save_itt(its, dev);
2395 		if (ret)
2396 			return ret;
2397 
2398 		ret = vgic_its_save_dte(its, dev, eaddr);
2399 		if (ret)
2400 			return ret;
2401 	}
2402 	return 0;
2403 }
2404 
2405 /**
2406  * handle_l1_dte - callback used for L1 device table entries (2 stage case)
2407  *
2408  * @its: its handle
2409  * @id: index of the entry in the L1 table
2410  * @addr: kernel VA
2411  * @opaque: unused
2412  *
2413  * L1 table entries are scanned by steps of 1 entry
2414  * Return < 0 if error, 0 if last dte was found when scanning the L2
2415  * table, +1 otherwise (meaning next L1 entry must be scanned)
2416  */
handle_l1_dte(struct vgic_its * its,u32 id,void * addr,void * opaque)2417 static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr,
2418 			 void *opaque)
2419 {
2420 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2421 	int l2_start_id = id * (SZ_64K / abi->dte_esz);
2422 	u64 entry = *(u64 *)addr;
2423 	int dte_esz = abi->dte_esz;
2424 	gpa_t gpa;
2425 	int ret;
2426 
2427 	entry = le64_to_cpu(entry);
2428 
2429 	if (!(entry & KVM_ITS_L1E_VALID_MASK))
2430 		return 1;
2431 
2432 	gpa = entry & KVM_ITS_L1E_ADDR_MASK;
2433 
2434 	ret = scan_its_table(its, gpa, SZ_64K, dte_esz,
2435 			     l2_start_id, vgic_its_restore_dte, NULL);
2436 
2437 	return ret;
2438 }
2439 
2440 /*
2441  * vgic_its_restore_device_tables - Restore the device table and all ITT
2442  * from guest RAM to internal data structs
2443  */
vgic_its_restore_device_tables(struct vgic_its * its)2444 static int vgic_its_restore_device_tables(struct vgic_its *its)
2445 {
2446 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2447 	u64 baser = its->baser_device_table;
2448 	int l1_esz, ret;
2449 	int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2450 	gpa_t l1_gpa;
2451 
2452 	if (!(baser & GITS_BASER_VALID))
2453 		return 0;
2454 
2455 	l1_gpa = GITS_BASER_ADDR_48_to_52(baser);
2456 
2457 	if (baser & GITS_BASER_INDIRECT) {
2458 		l1_esz = GITS_LVL1_ENTRY_SIZE;
2459 		ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
2460 				     handle_l1_dte, NULL);
2461 	} else {
2462 		l1_esz = abi->dte_esz;
2463 		ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
2464 				     vgic_its_restore_dte, NULL);
2465 	}
2466 
2467 	/* scan_its_table returns +1 if all entries are invalid */
2468 	if (ret > 0)
2469 		ret = 0;
2470 
2471 	if (ret < 0)
2472 		vgic_its_free_device_list(its->dev->kvm, its);
2473 
2474 	return ret;
2475 }
2476 
vgic_its_save_cte(struct vgic_its * its,struct its_collection * collection,gpa_t gpa)2477 static int vgic_its_save_cte(struct vgic_its *its,
2478 			     struct its_collection *collection,
2479 			     gpa_t gpa)
2480 {
2481 	u64 val;
2482 
2483 	val = (1ULL << KVM_ITS_CTE_VALID_SHIFT |
2484 	       ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) |
2485 	       collection->collection_id);
2486 	val = cpu_to_le64(val);
2487 
2488 	return vgic_its_write_entry_lock(its, gpa, val, cte);
2489 }
2490 
2491 /*
2492  * Restore a collection entry into the ITS collection table.
2493  * Return +1 on success, 0 if the entry was invalid (which should be
2494  * interpreted as end-of-table), and a negative error value for generic errors.
2495  */
vgic_its_restore_cte(struct vgic_its * its,gpa_t gpa)2496 static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa)
2497 {
2498 	struct its_collection *collection;
2499 	struct kvm *kvm = its->dev->kvm;
2500 	u32 target_addr, coll_id;
2501 	u64 val;
2502 	int ret;
2503 
2504 	ret = vgic_its_read_entry_lock(its, gpa, &val, cte);
2505 	if (ret)
2506 		return ret;
2507 	val = le64_to_cpu(val);
2508 	if (!(val & KVM_ITS_CTE_VALID_MASK))
2509 		return 0;
2510 
2511 	target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT);
2512 	coll_id = val & KVM_ITS_CTE_ICID_MASK;
2513 
2514 	if (target_addr != COLLECTION_NOT_MAPPED &&
2515 	    !kvm_get_vcpu_by_id(kvm, target_addr))
2516 		return -EINVAL;
2517 
2518 	collection = find_collection(its, coll_id);
2519 	if (collection)
2520 		return -EEXIST;
2521 
2522 	if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL))
2523 		return -EINVAL;
2524 
2525 	ret = vgic_its_alloc_collection(its, &collection, coll_id);
2526 	if (ret)
2527 		return ret;
2528 	collection->target_addr = target_addr;
2529 	return 1;
2530 }
2531 
2532 /*
2533  * vgic_its_save_collection_table - Save the collection table into
2534  * guest RAM
2535  */
vgic_its_save_collection_table(struct vgic_its * its)2536 static int vgic_its_save_collection_table(struct vgic_its *its)
2537 {
2538 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2539 	u64 baser = its->baser_coll_table;
2540 	gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser);
2541 	struct its_collection *collection;
2542 	size_t max_size, filled = 0;
2543 	int ret, cte_esz = abi->cte_esz;
2544 
2545 	if (!(baser & GITS_BASER_VALID))
2546 		return 0;
2547 
2548 	max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2549 
2550 	list_for_each_entry(collection, &its->collection_list, coll_list) {
2551 		ret = vgic_its_save_cte(its, collection, gpa);
2552 		if (ret)
2553 			return ret;
2554 		gpa += cte_esz;
2555 		filled += cte_esz;
2556 	}
2557 
2558 	if (filled == max_size)
2559 		return 0;
2560 
2561 	/*
2562 	 * table is not fully filled, add a last dummy element
2563 	 * with valid bit unset
2564 	 */
2565 	return vgic_its_write_entry_lock(its, gpa, 0ULL, cte);
2566 }
2567 
2568 /*
2569  * vgic_its_restore_collection_table - reads the collection table
2570  * in guest memory and restores the ITS internal state. Requires the
2571  * BASER registers to be restored before.
2572  */
vgic_its_restore_collection_table(struct vgic_its * its)2573 static int vgic_its_restore_collection_table(struct vgic_its *its)
2574 {
2575 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2576 	u64 baser = its->baser_coll_table;
2577 	int cte_esz = abi->cte_esz;
2578 	size_t max_size, read = 0;
2579 	gpa_t gpa;
2580 	int ret;
2581 
2582 	if (!(baser & GITS_BASER_VALID))
2583 		return 0;
2584 
2585 	gpa = GITS_BASER_ADDR_48_to_52(baser);
2586 
2587 	max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2588 
2589 	while (read < max_size) {
2590 		ret = vgic_its_restore_cte(its, gpa);
2591 		if (ret <= 0)
2592 			break;
2593 		gpa += cte_esz;
2594 		read += cte_esz;
2595 	}
2596 
2597 	if (ret > 0)
2598 		return 0;
2599 
2600 	if (ret < 0)
2601 		vgic_its_free_collection_list(its->dev->kvm, its);
2602 
2603 	return ret;
2604 }
2605 
2606 /*
2607  * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
2608  * according to v0 ABI
2609  */
vgic_its_save_tables_v0(struct vgic_its * its)2610 static int vgic_its_save_tables_v0(struct vgic_its *its)
2611 {
2612 	int ret;
2613 
2614 	ret = vgic_its_save_device_tables(its);
2615 	if (ret)
2616 		return ret;
2617 
2618 	return vgic_its_save_collection_table(its);
2619 }
2620 
2621 /*
2622  * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
2623  * to internal data structs according to V0 ABI
2624  *
2625  */
vgic_its_restore_tables_v0(struct vgic_its * its)2626 static int vgic_its_restore_tables_v0(struct vgic_its *its)
2627 {
2628 	int ret;
2629 
2630 	ret = vgic_its_restore_collection_table(its);
2631 	if (ret)
2632 		return ret;
2633 
2634 	ret = vgic_its_restore_device_tables(its);
2635 	if (ret)
2636 		vgic_its_free_collection_list(its->dev->kvm, its);
2637 	return ret;
2638 }
2639 
vgic_its_commit_v0(struct vgic_its * its)2640 static int vgic_its_commit_v0(struct vgic_its *its)
2641 {
2642 	const struct vgic_its_abi *abi;
2643 
2644 	abi = vgic_its_get_abi(its);
2645 	its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2646 	its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2647 
2648 	its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
2649 					<< GITS_BASER_ENTRY_SIZE_SHIFT);
2650 
2651 	its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
2652 					<< GITS_BASER_ENTRY_SIZE_SHIFT);
2653 	return 0;
2654 }
2655 
vgic_its_reset(struct kvm * kvm,struct vgic_its * its)2656 static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its)
2657 {
2658 	/* We need to keep the ABI specific field values */
2659 	its->baser_coll_table &= ~GITS_BASER_VALID;
2660 	its->baser_device_table &= ~GITS_BASER_VALID;
2661 	its->cbaser = 0;
2662 	its->creadr = 0;
2663 	its->cwriter = 0;
2664 	its->enabled = 0;
2665 	vgic_its_free_device_list(kvm, its);
2666 	vgic_its_free_collection_list(kvm, its);
2667 }
2668 
vgic_its_has_attr(struct kvm_device * dev,struct kvm_device_attr * attr)2669 static int vgic_its_has_attr(struct kvm_device *dev,
2670 			     struct kvm_device_attr *attr)
2671 {
2672 	switch (attr->group) {
2673 	case KVM_DEV_ARM_VGIC_GRP_ADDR:
2674 		switch (attr->attr) {
2675 		case KVM_VGIC_ITS_ADDR_TYPE:
2676 			return 0;
2677 		}
2678 		break;
2679 	case KVM_DEV_ARM_VGIC_GRP_CTRL:
2680 		switch (attr->attr) {
2681 		case KVM_DEV_ARM_VGIC_CTRL_INIT:
2682 			return 0;
2683 		case KVM_DEV_ARM_ITS_CTRL_RESET:
2684 			return 0;
2685 		case KVM_DEV_ARM_ITS_SAVE_TABLES:
2686 			return 0;
2687 		case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2688 			return 0;
2689 		}
2690 		break;
2691 	case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
2692 		return vgic_its_has_attr_regs(dev, attr);
2693 	}
2694 	return -ENXIO;
2695 }
2696 
vgic_its_ctrl(struct kvm * kvm,struct vgic_its * its,u64 attr)2697 static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr)
2698 {
2699 	const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2700 	int ret = 0;
2701 
2702 	if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */
2703 		return 0;
2704 
2705 	mutex_lock(&kvm->lock);
2706 
2707 	if (!lock_all_vcpus(kvm)) {
2708 		mutex_unlock(&kvm->lock);
2709 		return -EBUSY;
2710 	}
2711 
2712 	mutex_lock(&kvm->arch.config_lock);
2713 	mutex_lock(&its->its_lock);
2714 
2715 	switch (attr) {
2716 	case KVM_DEV_ARM_ITS_CTRL_RESET:
2717 		vgic_its_reset(kvm, its);
2718 		break;
2719 	case KVM_DEV_ARM_ITS_SAVE_TABLES:
2720 		ret = abi->save_tables(its);
2721 		break;
2722 	case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2723 		ret = abi->restore_tables(its);
2724 		break;
2725 	}
2726 
2727 	mutex_unlock(&its->its_lock);
2728 	mutex_unlock(&kvm->arch.config_lock);
2729 	unlock_all_vcpus(kvm);
2730 	mutex_unlock(&kvm->lock);
2731 	return ret;
2732 }
2733 
2734 /*
2735  * kvm_arch_allow_write_without_running_vcpu - allow writing guest memory
2736  * without the running VCPU when dirty ring is enabled.
2737  *
2738  * The running VCPU is required to track dirty guest pages when dirty ring
2739  * is enabled. Otherwise, the backup bitmap should be used to track the
2740  * dirty guest pages. When vgic/its tables are being saved, the backup
2741  * bitmap is used to track the dirty guest pages due to the missed running
2742  * VCPU in the period.
2743  */
kvm_arch_allow_write_without_running_vcpu(struct kvm * kvm)2744 bool kvm_arch_allow_write_without_running_vcpu(struct kvm *kvm)
2745 {
2746 	struct vgic_dist *dist = &kvm->arch.vgic;
2747 
2748 	return dist->table_write_in_progress;
2749 }
2750 
vgic_its_set_attr(struct kvm_device * dev,struct kvm_device_attr * attr)2751 static int vgic_its_set_attr(struct kvm_device *dev,
2752 			     struct kvm_device_attr *attr)
2753 {
2754 	struct vgic_its *its = dev->private;
2755 	int ret;
2756 
2757 	switch (attr->group) {
2758 	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2759 		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2760 		unsigned long type = (unsigned long)attr->attr;
2761 		u64 addr;
2762 
2763 		if (type != KVM_VGIC_ITS_ADDR_TYPE)
2764 			return -ENODEV;
2765 
2766 		if (copy_from_user(&addr, uaddr, sizeof(addr)))
2767 			return -EFAULT;
2768 
2769 		ret = vgic_check_iorange(dev->kvm, its->vgic_its_base,
2770 					 addr, SZ_64K, KVM_VGIC_V3_ITS_SIZE);
2771 		if (ret)
2772 			return ret;
2773 
2774 		return vgic_register_its_iodev(dev->kvm, its, addr);
2775 	}
2776 	case KVM_DEV_ARM_VGIC_GRP_CTRL:
2777 		return vgic_its_ctrl(dev->kvm, its, attr->attr);
2778 	case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2779 		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2780 		u64 reg;
2781 
2782 		if (get_user(reg, uaddr))
2783 			return -EFAULT;
2784 
2785 		return vgic_its_attr_regs_access(dev, attr, &reg, true);
2786 	}
2787 	}
2788 	return -ENXIO;
2789 }
2790 
vgic_its_get_attr(struct kvm_device * dev,struct kvm_device_attr * attr)2791 static int vgic_its_get_attr(struct kvm_device *dev,
2792 			     struct kvm_device_attr *attr)
2793 {
2794 	switch (attr->group) {
2795 	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2796 		struct vgic_its *its = dev->private;
2797 		u64 addr = its->vgic_its_base;
2798 		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2799 		unsigned long type = (unsigned long)attr->attr;
2800 
2801 		if (type != KVM_VGIC_ITS_ADDR_TYPE)
2802 			return -ENODEV;
2803 
2804 		if (copy_to_user(uaddr, &addr, sizeof(addr)))
2805 			return -EFAULT;
2806 		break;
2807 	}
2808 	case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2809 		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2810 		u64 reg;
2811 		int ret;
2812 
2813 		ret = vgic_its_attr_regs_access(dev, attr, &reg, false);
2814 		if (ret)
2815 			return ret;
2816 		return put_user(reg, uaddr);
2817 	}
2818 	default:
2819 		return -ENXIO;
2820 	}
2821 
2822 	return 0;
2823 }
2824 
2825 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
2826 	.name = "kvm-arm-vgic-its",
2827 	.create = vgic_its_create,
2828 	.destroy = vgic_its_destroy,
2829 	.set_attr = vgic_its_set_attr,
2830 	.get_attr = vgic_its_get_attr,
2831 	.has_attr = vgic_its_has_attr,
2832 };
2833 
kvm_vgic_register_its_device(void)2834 int kvm_vgic_register_its_device(void)
2835 {
2836 	return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
2837 				       KVM_DEV_TYPE_ARM_VGIC_ITS);
2838 }
2839