1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ 2 /* 3 * Copyright 2024-2025 NXP 4 */ 5 6 #ifndef __IMX94_CLOCK_H 7 #define __IMX94_CLOCK_H 8 9 #define IMX94_CLK_EXT 0 10 #define IMX94_CLK_32K 1 11 #define IMX94_CLK_24M 2 12 #define IMX94_CLK_FRO 3 13 #define IMX94_CLK_SYSPLL1_VCO 4 14 #define IMX94_CLK_SYSPLL1_PFD0_UNGATED 5 15 #define IMX94_CLK_SYSPLL1_PFD0 6 16 #define IMX94_CLK_SYSPLL1_PFD0_DIV2 7 17 #define IMX94_CLK_SYSPLL1_PFD1_UNGATED 8 18 #define IMX94_CLK_SYSPLL1_PFD1 9 19 #define IMX94_CLK_SYSPLL1_PFD1_DIV2 10 20 #define IMX94_CLK_SYSPLL1_PFD2_UNGATED 11 21 #define IMX94_CLK_SYSPLL1_PFD2 12 22 #define IMX94_CLK_SYSPLL1_PFD2_DIV2 13 23 #define IMX94_CLK_AUDIOPLL1_VCO 14 24 #define IMX94_CLK_AUDIOPLL1 15 25 #define IMX94_CLK_AUDIOPLL2_VCO 16 26 #define IMX94_CLK_AUDIOPLL2 17 27 #define IMX94_CLK_RESERVED18 18 28 #define IMX94_CLK_RESERVED19 19 29 #define IMX94_CLK_RESERVED20 20 30 #define IMX94_CLK_RESERVED21 21 31 #define IMX94_CLK_RESERVED22 22 32 #define IMX94_CLK_RESERVED23 23 33 #define IMX94_CLK_ENCPLL_VCO 24 34 #define IMX94_CLK_ENCPLL_PFD0_UNGATED 25 35 #define IMX94_CLK_ENCPLL_PFD0 26 36 #define IMX94_CLK_ENCPLL_PFD1_UNGATED 27 37 #define IMX94_CLK_ENCPLL_PFD1 28 38 #define IMX94_CLK_ARMPLL_VCO 29 39 #define IMX94_CLK_ARMPLL_PFD0_UNGATED 30 40 #define IMX94_CLK_ARMPLL_PFD0 31 41 #define IMX94_CLK_ARMPLL_PFD1_UNGATED 32 42 #define IMX94_CLK_ARMPLL_PFD1 33 43 #define IMX94_CLK_ARMPLL_PFD2_UNGATED 34 44 #define IMX94_CLK_ARMPLL_PFD2 35 45 #define IMX94_CLK_ARMPLL_PFD3_UNGATED 36 46 #define IMX94_CLK_ARMPLL_PFD3 37 47 #define IMX94_CLK_DRAMPLL_VCO 38 48 #define IMX94_CLK_DRAMPLL 39 49 #define IMX94_CLK_HSIOPLL_VCO 40 50 #define IMX94_CLK_HSIOPLL 41 51 #define IMX94_CLK_LDBPLL_VCO 42 52 #define IMX94_CLK_LDBPLL 43 53 #define IMX94_CLK_EXT1 44 54 #define IMX94_CLK_EXT2 45 55 #define IMX94_CLK_ADC 46 56 #define IMX94_CLK_BUSAON 47 57 #define IMX94_CLK_CAN1 48 58 #define IMX94_CLK_GLITCHFILTER 49 59 #define IMX94_CLK_GPT1 50 60 #define IMX94_CLK_I3C1SLOW 51 61 #define IMX94_CLK_LPI2C1 52 62 #define IMX94_CLK_LPI2C2 53 63 #define IMX94_CLK_LPSPI1 54 64 #define IMX94_CLK_LPSPI2 55 65 #define IMX94_CLK_LPTMR1 56 66 #define IMX94_CLK_LPUART1 57 67 #define IMX94_CLK_LPUART2 58 68 #define IMX94_CLK_M33 59 69 #define IMX94_CLK_M33SYSTICK 60 70 #define IMX94_CLK_PDM 61 71 #define IMX94_CLK_SAI1 62 72 #define IMX94_CLK_TPM2 63 73 #define IMX94_CLK_A55 64 74 #define IMX94_CLK_A55MTRBUS 65 75 #define IMX94_CLK_A55PERIPH 66 76 #define IMX94_CLK_DRAMALT 67 77 #define IMX94_CLK_DRAMAPB 68 78 #define IMX94_CLK_DISPAPB 69 79 #define IMX94_CLK_DISPAXI 70 80 #define IMX94_CLK_DISPPIX 71 81 #define IMX94_CLK_HSIOACSCAN480M 72 82 #define IMX94_CLK_HSIOACSCAN80M 73 83 #define IMX94_CLK_HSIO 74 84 #define IMX94_CLK_HSIOPCIEAUX 75 85 #define IMX94_CLK_HSIOPCIETEST160M 76 86 #define IMX94_CLK_HSIOPCIETEST400M 77 87 #define IMX94_CLK_HSIOPCIETEST500M 78 88 #define IMX94_CLK_HSIOPCIETEST50M 79 89 #define IMX94_CLK_HSIOUSBTEST60M 80 90 #define IMX94_CLK_BUSM70 81 91 #define IMX94_CLK_M70 82 92 #define IMX94_CLK_M70SYSTICK 83 93 #define IMX94_CLK_BUSM71 84 94 #define IMX94_CLK_M71 85 95 #define IMX94_CLK_M71SYSTICK 86 96 #define IMX94_CLK_BUSNETCMIX 87 97 #define IMX94_CLK_ECAT 88 98 #define IMX94_CLK_ENET 89 99 #define IMX94_CLK_ENETPHYTEST200M 90 100 #define IMX94_CLK_ENETPHYTEST500M 91 101 #define IMX94_CLK_ENETPHYTEST667M 92 102 #define IMX94_CLK_ENETREF 93 103 #define IMX94_CLK_ENETTIMER1 94 104 #define IMX94_CLK_ENETTIMER2 95 105 #define IMX94_CLK_ENETTIMER3 96 106 #define IMX94_CLK_FLEXIO3 97 107 #define IMX94_CLK_FLEXIO4 98 108 #define IMX94_CLK_M33SYNC 99 109 #define IMX94_CLK_M33SYNCSYSTICK 100 110 #define IMX94_CLK_MAC0 101 111 #define IMX94_CLK_MAC1 102 112 #define IMX94_CLK_MAC2 103 113 #define IMX94_CLK_MAC3 104 114 #define IMX94_CLK_MAC4 105 115 #define IMX94_CLK_MAC5 106 116 #define IMX94_CLK_NOCAPB 107 117 #define IMX94_CLK_NOC 108 118 #define IMX94_CLK_NPUAPB 109 119 #define IMX94_CLK_NPU 110 120 #define IMX94_CLK_CCMCKO1 111 121 #define IMX94_CLK_CCMCKO2 112 122 #define IMX94_CLK_CCMCKO3 113 123 #define IMX94_CLK_CCMCKO4 114 124 #define IMX94_CLK_BISS 115 125 #define IMX94_CLK_BUSWAKEUP 116 126 #define IMX94_CLK_CAN2 117 127 #define IMX94_CLK_CAN3 118 128 #define IMX94_CLK_CAN4 119 129 #define IMX94_CLK_CAN5 120 130 #define IMX94_CLK_ENDAT21 121 131 #define IMX94_CLK_ENDAT22 122 132 #define IMX94_CLK_ENDAT31FAST 123 133 #define IMX94_CLK_ENDAT31SLOW 124 134 #define IMX94_CLK_FLEXIO1 125 135 #define IMX94_CLK_FLEXIO2 126 136 #define IMX94_CLK_GPT2 127 137 #define IMX94_CLK_GPT3 128 138 #define IMX94_CLK_GPT4 129 139 #define IMX94_CLK_HIPERFACE1 130 140 #define IMX94_CLK_HIPERFACE1SYNC 131 141 #define IMX94_CLK_HIPERFACE2 132 142 #define IMX94_CLK_HIPERFACE2SYNC 133 143 #define IMX94_CLK_I3C2SLOW 134 144 #define IMX94_CLK_LPI2C3 135 145 #define IMX94_CLK_LPI2C4 136 146 #define IMX94_CLK_LPI2C5 137 147 #define IMX94_CLK_LPI2C6 138 148 #define IMX94_CLK_LPI2C7 139 149 #define IMX94_CLK_LPI2C8 140 150 #define IMX94_CLK_LPSPI3 141 151 #define IMX94_CLK_LPSPI4 142 152 #define IMX94_CLK_LPSPI5 143 153 #define IMX94_CLK_LPSPI6 144 154 #define IMX94_CLK_LPSPI7 145 155 #define IMX94_CLK_LPSPI8 146 156 #define IMX94_CLK_LPTMR2 147 157 #define IMX94_CLK_LPUART10 148 158 #define IMX94_CLK_LPUART11 149 159 #define IMX94_CLK_LPUART12 150 160 #define IMX94_CLK_LPUART3 151 161 #define IMX94_CLK_LPUART4 152 162 #define IMX94_CLK_LPUART5 153 163 #define IMX94_CLK_LPUART6 154 164 #define IMX94_CLK_LPUART7 155 165 #define IMX94_CLK_LPUART8 156 166 #define IMX94_CLK_LPUART9 157 167 #define IMX94_CLK_SAI2 158 168 #define IMX94_CLK_SAI3 159 169 #define IMX94_CLK_SAI4 160 170 #define IMX94_CLK_SWOTRACE 161 171 #define IMX94_CLK_TPM4 162 172 #define IMX94_CLK_TPM5 163 173 #define IMX94_CLK_TPM6 164 174 #define IMX94_CLK_USBPHYBURUNIN 165 175 #define IMX94_CLK_USDHC1 166 176 #define IMX94_CLK_USDHC2 167 177 #define IMX94_CLK_USDHC3 168 178 #define IMX94_CLK_V2XPK 169 179 #define IMX94_CLK_WAKEUPAXI 170 180 #define IMX94_CLK_XSPISLVROOT 171 181 #define IMX94_CLK_XSPI1 172 182 #define IMX94_CLK_XSPI2 173 183 #define IMX94_CLK_SEL_EXT 174 184 #define IMX94_CLK_SEL_A55C0 175 185 #define IMX94_CLK_SEL_A55C1 176 186 #define IMX94_CLK_SEL_A55C2 177 187 #define IMX94_CLK_SEL_A55C3 178 188 #define IMX94_CLK_SEL_A55P 179 189 #define IMX94_CLK_SEL_DRAM 180 190 #define IMX94_CLK_SEL_TEMPSENSE 181 191 #define IMX94_CLK_NPU_CGC 182 192 193 #endif /* __IMX94_CLOCK_H */ 194