1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Freescale Semiconductor, Inc. 4 */ 5 6 #ifndef __LINUX_IMX7_IOMUXC_GPR_H 7 #define __LINUX_IMX7_IOMUXC_GPR_H 8 9 #define IOMUXC_GPR0 0x00 10 #define IOMUXC_GPR1 0x04 11 #define IOMUXC_GPR2 0x08 12 #define IOMUXC_GPR3 0x0c 13 #define IOMUXC_GPR4 0x10 14 #define IOMUXC_GPR5 0x14 15 #define IOMUXC_GPR6 0x18 16 #define IOMUXC_GPR7 0x1c 17 #define IOMUXC_GPR8 0x20 18 #define IOMUXC_GPR9 0x24 19 #define IOMUXC_GPR10 0x28 20 #define IOMUXC_GPR11 0x2c 21 #define IOMUXC_GPR12 0x30 22 #define IOMUXC_GPR13 0x34 23 #define IOMUXC_GPR14 0x38 24 #define IOMUXC_GPR15 0x3c 25 #define IOMUXC_GPR16 0x40 26 #define IOMUXC_GPR17 0x44 27 #define IOMUXC_GPR18 0x48 28 #define IOMUXC_GPR19 0x4c 29 #define IOMUXC_GPR20 0x50 30 #define IOMUXC_GPR21 0x54 31 #define IOMUXC_GPR22 0x58 32 33 /* For imx7d iomux gpr register field define */ 34 #define IMX7D_GPR1_IRQ_MASK (0x1 << 12) 35 #define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK (0x1 << 13) 36 #define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK (0x1 << 14) 37 #define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13) 38 #define IMX7D_GPR1_ENET1_CLK_DIR_MASK (0x1 << 17) 39 #define IMX7D_GPR1_ENET2_CLK_DIR_MASK (0x1 << 18) 40 #define IMX7D_GPR1_ENET_CLK_DIR_MASK (0x3 << 17) 41 42 #define IMX7D_GPR5_CSI_MUX_CONTROL_MIPI (0x1 << 4) 43 44 #define IMX7D_GPR12_PCIE_PHY_REFCLK_SEL BIT(5) 45 46 #define IMX7D_GPR22_PCIE_PHY_PLL_LOCKED BIT(31) 47 48 #endif /* __LINUX_IMX7_IOMUXC_GPR_H */ 49