1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * This file is part of AD5686 DAC driver 4 * 5 * Copyright 2018 Analog Devices Inc. 6 */ 7 8 #ifndef __DRIVERS_IIO_DAC_AD5686_H__ 9 #define __DRIVERS_IIO_DAC_AD5686_H__ 10 11 #include <linux/bits.h> 12 #include <linux/mutex.h> 13 #include <linux/types.h> 14 15 #include <linux/iio/iio.h> 16 17 #define AD5310_CMD(x) ((x) << 12) 18 19 #define AD5683_DATA(x) ((x) << 4) 20 21 #define AD5686_ADDR(x) ((x) << 16) 22 #define AD5686_CMD(x) ((x) << 20) 23 24 #define AD5686_ADDR_DAC(chan) (0x1 << (chan)) 25 #define AD5686_ADDR_ALL_DAC 0xF 26 27 #define AD5686_CMD_NOOP 0x0 28 #define AD5686_CMD_WRITE_INPUT_N 0x1 29 #define AD5686_CMD_UPDATE_DAC_N 0x2 30 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3 31 #define AD5686_CMD_POWERDOWN_DAC 0x4 32 #define AD5686_CMD_LDAC_MASK 0x5 33 #define AD5686_CMD_RESET 0x6 34 #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7 35 #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8 36 #define AD5686_CMD_READBACK_ENABLE 0x9 37 38 #define AD5686_CMD_CONTROL_REG 0x4 39 #define AD5686_CMD_READBACK_ENABLE_V2 0x5 40 41 #define AD5310_REF_BIT_MSK BIT(8) 42 #define AD5310_PD_MSK GENMASK(10, 9) 43 44 #define AD5683_REF_BIT_MSK BIT(12) 45 #define AD5683_PD_MSK GENMASK(14, 13) 46 47 #define AD5686_REF_BIT_MSK BIT(0) 48 #define AD5686_PD_MSK GENMASK(1, 0) 49 50 #define AD5686_PD_MODE_1K_TO_GND 0x1 51 #define AD5686_PD_MODE_100K_TO_GND 0x2 52 #define AD5686_PD_MODE_THREE_STATE 0x3 53 54 #define AD5686_PD_MSK_PWR_UP 0x0 55 #define AD5686_PD_MSK_PWR_DOWN 0x3 56 57 enum ad5686_regmap_type { 58 AD5310_REGMAP, 59 AD5683_REGMAP, 60 AD5686_REGMAP, 61 }; 62 63 struct ad5686_state; 64 65 /** 66 * struct ad5686_bus_ops - bus specific read/write operations 67 * @read: read a register value at the given address 68 * @write: write a command, address and value to the device 69 */ 70 struct ad5686_bus_ops { 71 int (*read)(struct ad5686_state *st, u8 addr); 72 int (*write)(struct ad5686_state *st, u8 cmd, u8 addr, u16 val); 73 }; 74 75 /** 76 * struct ad5686_chip_info - chip specific information 77 * @int_vref_mv: the internal reference voltage 78 * @num_channels: number of channels 79 * @channel: channel specification 80 * @regmap_type: register map layout variant 81 */ 82 struct ad5686_chip_info { 83 u16 int_vref_mv; 84 unsigned int num_channels; 85 const struct iio_chan_spec *channels; 86 enum ad5686_regmap_type regmap_type; 87 }; 88 89 /* single-channel instances */ 90 extern const struct ad5686_chip_info ad5310r_chip_info; 91 extern const struct ad5686_chip_info ad5311r_chip_info; 92 extern const struct ad5686_chip_info ad5681r_chip_info; 93 extern const struct ad5686_chip_info ad5682r_chip_info; 94 extern const struct ad5686_chip_info ad5683_chip_info; 95 extern const struct ad5686_chip_info ad5683r_chip_info; 96 97 /* dual-channel instances */ 98 extern const struct ad5686_chip_info ad5337r_chip_info; 99 extern const struct ad5686_chip_info ad5338r_chip_info; 100 101 /* quad-channel instances */ 102 extern const struct ad5686_chip_info ad5684_chip_info; 103 extern const struct ad5686_chip_info ad5684r_chip_info; 104 extern const struct ad5686_chip_info ad5685r_chip_info; 105 extern const struct ad5686_chip_info ad5686_chip_info; 106 extern const struct ad5686_chip_info ad5686r_chip_info; 107 108 /* 8-channel instances */ 109 extern const struct ad5686_chip_info ad5672r_chip_info; 110 extern const struct ad5686_chip_info ad5676_chip_info; 111 extern const struct ad5686_chip_info ad5676r_chip_info; 112 113 /* 16-channel instances */ 114 extern const struct ad5686_chip_info ad5674r_chip_info; 115 extern const struct ad5686_chip_info ad5679r_chip_info; 116 117 /** 118 * struct ad5686_state - driver instance specific data 119 * @dev: device instance 120 * @chip_info: chip model specific constants, available modes etc 121 * @ops: bus specific operations 122 * @vref_mv: actual reference voltage used 123 * @pwr_down_mask: power down mask 124 * @pwr_down_mode: current power down mode 125 * @use_internal_vref: set to true if the internal reference voltage is used 126 * @lock: lock to protect access to state fields, which includes 127 * the data buffer during regmap ops 128 * @data: transfer buffers 129 */ 130 struct ad5686_state { 131 struct device *dev; 132 const struct ad5686_chip_info *chip_info; 133 const struct ad5686_bus_ops *ops; 134 unsigned short vref_mv; 135 unsigned int pwr_down_mask; 136 unsigned int pwr_down_mode; 137 bool use_internal_vref; 138 struct mutex lock; 139 140 /* 141 * DMA (thus cache coherency maintenance) may require the 142 * transfer buffers to live in their own cache lines. 143 */ 144 145 union { 146 __be32 d32; 147 __be16 d16; 148 u8 d8[4]; 149 } data[3] __aligned(IIO_DMA_MINALIGN); 150 }; 151 152 153 int ad5686_probe(struct device *dev, 154 const struct ad5686_chip_info *chip_info, 155 const char *name, const struct ad5686_bus_ops *ops); 156 157 static inline int ad5686_write(struct ad5686_state *st, u8 cmd, u8 addr, u16 val) 158 { 159 return st->ops->write(st, cmd, addr, val); 160 } 161 162 static inline int ad5686_read(struct ad5686_state *st, u8 addr) 163 { 164 return st->ops->read(st, addr); 165 } 166 167 #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */ 168