1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Texas Instruments ICSSG Ethernet driver
3 *
4 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
5 *
6 */
7
8 #ifndef __NET_TI_ICSSG_PRUETH_H
9 #define __NET_TI_ICSSG_PRUETH_H
10
11 #include <linux/etherdevice.h>
12 #include <linux/genalloc.h>
13 #include <linux/if_vlan.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/net_tstamp.h>
20 #include <linux/of.h>
21 #include <linux/of_irq.h>
22 #include <linux/of_mdio.h>
23 #include <linux/of_net.h>
24 #include <linux/of_platform.h>
25 #include <linux/phy.h>
26 #include <linux/remoteproc/pruss.h>
27 #include <linux/pruss_driver.h>
28 #include <linux/ptp_clock_kernel.h>
29 #include <linux/remoteproc.h>
30
31 #include <linux/dma-mapping.h>
32 #include <linux/dma/ti-cppi5.h>
33 #include <linux/dma/k3-udma-glue.h>
34
35 #include <net/devlink.h>
36
37 #include "icssg_config.h"
38 #include "icss_iep.h"
39 #include "icssg_switch_map.h"
40
41 #define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
42 #define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN)
43 #define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN)
44
45 #define ICSS_SLICE0 0
46 #define ICSS_SLICE1 1
47
48 #define ICSS_FW_PRU 0
49 #define ICSS_FW_RTU 1
50
51 #define ICSSG_MAX_RFLOWS 8 /* per slice */
52
53 #define ICSSG_NUM_PA_STATS 4
54 #define ICSSG_NUM_MIIG_STATS 60
55 /* Number of ICSSG related stats */
56 #define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS)
57 #define ICSSG_NUM_STANDARD_STATS 31
58 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS)
59
60 #define IEP_DEFAULT_CYCLE_TIME_NS 1000000 /* 1 ms */
61
62 #define PRUETH_UNDIRECTED_PKT_DST_TAG 0
63 #define PRUETH_UNDIRECTED_PKT_TAG_INS BIT(30)
64
65 /* Firmware status codes */
66 #define ICSS_HS_FW_READY 0x55555555
67 #define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */
68
69 /* Firmware command codes */
70 #define ICSS_HS_CMD_BUSY 0x40000000
71 #define ICSS_HS_CMD_DONE 0x80000000
72 #define ICSS_HS_CMD_CANCEL 0x10000000
73
74 /* Firmware commands */
75 #define ICSS_CMD_SPAD 0x20
76 #define ICSS_CMD_RXTX 0x10
77 #define ICSS_CMD_ADD_FDB 0x1
78 #define ICSS_CMD_DEL_FDB 0x2
79 #define ICSS_CMD_SET_RUN 0x4
80 #define ICSS_CMD_GET_FDB_SLOT 0x5
81 #define ICSS_CMD_ENABLE_VLAN 0x5
82 #define ICSS_CMD_DISABLE_VLAN 0x6
83 #define ICSS_CMD_ADD_FILTER 0x7
84 #define ICSS_CMD_ADD_MAC 0x8
85
86 /* In switch mode there are 3 real ports i.e. 3 mac addrs.
87 * however Linux sees only the host side port. The other 2 ports
88 * are the switch ports.
89 * In emac mode there are 2 real ports i.e. 2 mac addrs.
90 * Linux sees both the ports.
91 */
92 enum prueth_port {
93 PRUETH_PORT_HOST = 0, /* host side port */
94 PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */
95 PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */
96 PRUETH_PORT_INVALID, /* Invalid prueth port */
97 };
98
99 enum prueth_mac {
100 PRUETH_MAC0 = 0,
101 PRUETH_MAC1,
102 PRUETH_NUM_MACS,
103 PRUETH_MAC_INVALID,
104 };
105
106 struct prueth_tx_chn {
107 struct device *dma_dev;
108 struct napi_struct napi_tx;
109 struct k3_cppi_desc_pool *desc_pool;
110 struct k3_udma_glue_tx_channel *tx_chn;
111 struct prueth_emac *emac;
112 u32 id;
113 u32 descs_num;
114 unsigned int irq;
115 char name[32];
116 struct hrtimer tx_hrtimer;
117 unsigned long tx_pace_timeout_ns;
118 };
119
120 struct prueth_rx_chn {
121 struct device *dev;
122 struct device *dma_dev;
123 struct k3_cppi_desc_pool *desc_pool;
124 struct k3_udma_glue_rx_channel *rx_chn;
125 u32 descs_num;
126 unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */
127 char name[32];
128 };
129
130 /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)
131 * and lower three are lower priority channels or threads.
132 */
133 #define PRUETH_MAX_TX_QUEUES 4
134
135 #define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */
136
137 /* Minimum coalesce time in usecs for both Tx and Rx */
138 #define ICSSG_MIN_COALESCE_USECS 20
139
140 /* data for each emac port */
141 struct prueth_emac {
142 bool is_sr1;
143 struct prueth *prueth;
144 struct net_device *ndev;
145 u8 mac_addr[6];
146 struct napi_struct napi_rx;
147 u32 msg_enable;
148
149 int link;
150 int speed;
151 int duplex;
152
153 const char *phy_id;
154 struct device_node *phy_node;
155 phy_interface_t phy_if;
156 enum prueth_port port_id;
157 struct icss_iep *iep;
158 unsigned int rx_ts_enabled : 1;
159 unsigned int tx_ts_enabled : 1;
160 unsigned int half_duplex : 1;
161
162 /* DMA related */
163 struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
164 struct completion tdown_complete;
165 atomic_t tdown_cnt;
166 struct prueth_rx_chn rx_chns;
167 int rx_flow_id_base;
168 int tx_ch_num;
169
170 /* SR1.0 Management channel */
171 struct prueth_rx_chn rx_mgm_chn;
172 int rx_mgm_flow_id_base;
173
174 spinlock_t lock; /* serialize access */
175
176 /* TX HW Timestamping */
177 /* TX TS cookie will be index to the tx_ts_skb array */
178 struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS];
179 atomic_t tx_ts_pending;
180 int tx_ts_irq;
181
182 u8 cmd_seq;
183 /* shutdown related */
184 __le32 cmd_data[4];
185 struct completion cmd_complete;
186 /* Mutex to serialize access to firmware command interface */
187 struct mutex cmd_lock;
188 struct work_struct rx_mode_work;
189 struct workqueue_struct *cmd_wq;
190
191 struct pruss_mem_region dram;
192
193 bool offload_fwd_mark;
194 int port_vlan;
195
196 struct delayed_work stats_work;
197 u64 stats[ICSSG_NUM_MIIG_STATS];
198 u64 pa_stats[ICSSG_NUM_PA_STATS];
199
200 /* RX IRQ Coalescing Related */
201 struct hrtimer rx_hrtimer;
202 unsigned long rx_pace_timeout_ns;
203 };
204
205 /**
206 * struct prueth_pdata - PRUeth platform data
207 * @fdqring_mode: Free desc queue mode
208 * @quirk_10m_link_issue: 10M link detect errata
209 * @switch_mode: switch firmware support
210 */
211 struct prueth_pdata {
212 enum k3_ring_mode fdqring_mode;
213 u32 quirk_10m_link_issue:1;
214 u32 switch_mode:1;
215 };
216
217 struct icssg_firmwares {
218 char *pru;
219 char *rtu;
220 char *txpru;
221 };
222
223 /**
224 * struct prueth - PRUeth structure
225 * @dev: device
226 * @pruss: pruss handle
227 * @pru: rproc instances of PRUs
228 * @rtu: rproc instances of RTUs
229 * @txpru: rproc instances of TX_PRUs
230 * @shram: PRUSS shared RAM region
231 * @sram_pool: MSMC RAM pool for buffers
232 * @msmcram: MSMC RAM region
233 * @eth_node: DT node for the port
234 * @emac: private EMAC data structure
235 * @registered_netdevs: list of registered netdevs
236 * @miig_rt: regmap to mii_g_rt block
237 * @mii_rt: regmap to mii_rt block
238 * @pa_stats: regmap to pa_stats block
239 * @pru_id: ID for each of the PRUs
240 * @pdev: pointer to ICSSG platform device
241 * @pdata: pointer to platform data for ICSSG driver
242 * @icssg_hwcmdseq: seq counter or HWQ messages
243 * @emacs_initialized: num of EMACs/ext ports that are up/running
244 * @iep0: pointer to IEP0 device
245 * @iep1: pointer to IEP1 device
246 * @vlan_tbl: VLAN-FID table pointer
247 * @hw_bridge_dev: pointer to HW bridge net device
248 * @hsr_dev: pointer to the HSR net device
249 * @br_members: bitmask of bridge member ports
250 * @hsr_members: bitmask of hsr member ports
251 * @prueth_netdevice_nb: netdevice notifier block
252 * @prueth_switchdev_nb: switchdev notifier block
253 * @prueth_switchdev_bl_nb: switchdev blocking notifier block
254 * @is_switch_mode: flag to indicate if device is in Switch mode
255 * @is_hsr_offload_mode: flag to indicate if device is in hsr offload mode
256 * @is_switchmode_supported: indicates platform support for switch mode
257 * @switch_id: ID for mapping switch ports to bridge
258 * @default_vlan: Default VLAN for host
259 */
260 struct prueth {
261 struct device *dev;
262 struct pruss *pruss;
263 struct rproc *pru[PRUSS_NUM_PRUS];
264 struct rproc *rtu[PRUSS_NUM_PRUS];
265 struct rproc *txpru[PRUSS_NUM_PRUS];
266 struct pruss_mem_region shram;
267 struct gen_pool *sram_pool;
268 struct pruss_mem_region msmcram;
269
270 struct device_node *eth_node[PRUETH_NUM_MACS];
271 struct prueth_emac *emac[PRUETH_NUM_MACS];
272 struct net_device *registered_netdevs[PRUETH_NUM_MACS];
273 struct regmap *miig_rt;
274 struct regmap *mii_rt;
275 struct regmap *pa_stats;
276
277 enum pruss_pru_id pru_id[PRUSS_NUM_PRUS];
278 struct platform_device *pdev;
279 struct prueth_pdata pdata;
280 u8 icssg_hwcmdseq;
281 int emacs_initialized;
282 struct icss_iep *iep0;
283 struct icss_iep *iep1;
284 struct prueth_vlan_tbl *vlan_tbl;
285
286 struct net_device *hw_bridge_dev;
287 struct net_device *hsr_dev;
288 u8 br_members;
289 u8 hsr_members;
290 struct notifier_block prueth_netdevice_nb;
291 struct notifier_block prueth_switchdev_nb;
292 struct notifier_block prueth_switchdev_bl_nb;
293 bool is_switch_mode;
294 bool is_hsr_offload_mode;
295 bool is_switchmode_supported;
296 unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN];
297 int default_vlan;
298 /** @vtbl_lock: Lock for vtbl in shared memory */
299 spinlock_t vtbl_lock;
300 };
301
302 struct emac_tx_ts_response {
303 u32 reserved[2];
304 u32 cookie;
305 u32 lo_ts;
306 u32 hi_ts;
307 };
308
309 struct emac_tx_ts_response_sr1 {
310 __le32 lo_ts;
311 __le32 hi_ts;
312 __le32 reserved;
313 __le32 cookie;
314 };
315
316 /* get PRUSS SLICE number from prueth_emac */
prueth_emac_slice(struct prueth_emac * emac)317 static inline int prueth_emac_slice(struct prueth_emac *emac)
318 {
319 switch (emac->port_id) {
320 case PRUETH_PORT_MII0:
321 return ICSS_SLICE0;
322 case PRUETH_PORT_MII1:
323 return ICSS_SLICE1;
324 default:
325 return -EINVAL;
326 }
327 }
328
329 extern const struct ethtool_ops icssg_ethtool_ops;
330 extern const struct dev_pm_ops prueth_dev_pm_ops;
331
icssg_read_time(const void __iomem * addr)332 static inline u64 icssg_read_time(const void __iomem *addr)
333 {
334 u32 low, high;
335
336 do {
337 high = readl(addr + 4);
338 low = readl(addr);
339 } while (high != readl(addr + 4));
340
341 return low + ((u64)high << 32);
342 }
343
344 /* Classifier helpers */
345 void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
346 void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);
347 void icssg_class_disable(struct regmap *miig_rt, int slice);
348 void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti,
349 bool is_sr1);
350 void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice);
351 void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice,
352 struct net_device *ndev);
353 void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
354
355 /* config helpers */
356 void icssg_config_ipg(struct prueth_emac *emac);
357 int icssg_config(struct prueth *prueth, struct prueth_emac *emac,
358 int slice);
359 int icssg_set_port_state(struct prueth_emac *emac,
360 enum icssg_port_state_cmd state);
361 void icssg_config_set_speed(struct prueth_emac *emac);
362 void icssg_config_half_duplex(struct prueth_emac *emac);
363 void icssg_init_emac_mode(struct prueth *prueth);
364 void icssg_init_fw_offload_mode(struct prueth *prueth);
365
366 /* Buffer queue helpers */
367 int icssg_queue_pop(struct prueth *prueth, u8 queue);
368 void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
369 u32 icssg_queue_level(struct prueth *prueth, int queue);
370
371 int icssg_send_fdb_msg(struct prueth_emac *emac, struct mgmt_cmd *cmd,
372 struct mgmt_cmd_rsp *rsp);
373 int icssg_fdb_add_del(struct prueth_emac *emac, const unsigned char *addr,
374 u8 vid, u8 fid_c2, bool add);
375 int icssg_fdb_lookup(struct prueth_emac *emac, const unsigned char *addr,
376 u8 vid);
377 void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask,
378 u8 untag_mask, bool add);
379 u16 icssg_get_pvid(struct prueth_emac *emac);
380 void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port);
381 int emac_fdb_flow_id_updated(struct prueth_emac *emac);
382 #define prueth_napi_to_tx_chn(pnapi) \
383 container_of(pnapi, struct prueth_tx_chn, napi_tx)
384
385 void icssg_stats_work_handler(struct work_struct *work);
386 void emac_update_hardware_stats(struct prueth_emac *emac);
387 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name);
388
389 /* Common functions */
390 void prueth_cleanup_rx_chns(struct prueth_emac *emac,
391 struct prueth_rx_chn *rx_chn,
392 int max_rflows);
393 void prueth_cleanup_tx_chns(struct prueth_emac *emac);
394 void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num);
395 void prueth_xmit_free(struct prueth_tx_chn *tx_chn,
396 struct cppi5_host_desc_t *desc);
397 int emac_tx_complete_packets(struct prueth_emac *emac, int chn,
398 int budget, bool *tdown);
399 int prueth_ndev_add_tx_napi(struct prueth_emac *emac);
400 int prueth_init_tx_chns(struct prueth_emac *emac);
401 int prueth_init_rx_chns(struct prueth_emac *emac,
402 struct prueth_rx_chn *rx_chn,
403 char *name, u32 max_rflows,
404 u32 max_desc_num);
405 int prueth_dma_rx_push(struct prueth_emac *emac,
406 struct sk_buff *skb,
407 struct prueth_rx_chn *rx_chn);
408 void emac_rx_timestamp(struct prueth_emac *emac,
409 struct sk_buff *skb, u32 *psdata);
410 enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev);
411 irqreturn_t prueth_rx_irq(int irq, void *dev_id);
412 void prueth_cleanup_tx_ts(struct prueth_emac *emac);
413 int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget);
414 int prueth_prepare_rx_chan(struct prueth_emac *emac,
415 struct prueth_rx_chn *chn,
416 int buf_size);
417 void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num,
418 bool free_skb);
419 void prueth_reset_rx_chan(struct prueth_rx_chn *chn,
420 int num_flows, bool disable);
421 void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue);
422 int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd);
423 void icssg_ndo_get_stats64(struct net_device *ndev,
424 struct rtnl_link_stats64 *stats);
425 int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name,
426 size_t len);
427 int prueth_node_port(struct device_node *eth_node);
428 int prueth_node_mac(struct device_node *eth_node);
429 void prueth_netdev_exit(struct prueth *prueth,
430 struct device_node *eth_node);
431 int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1);
432 void prueth_put_cores(struct prueth *prueth, int slice);
433
434 /* Revision specific helper */
435 u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns);
436
437 #endif /* __NET_TI_ICSSG_PRUETH_H */
438