Searched defs:HiHalf (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 466 SDValue HiHalf(SDValue V, SelectionDAG &DAG) const { in HiHalf() function
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H A D | HexagonISelDAGToDAGHVX.cpp | 653 HiHalf = 0x40000000, enumerator
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 7810 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1).add(SrcReg0Sub1); in splitScalar64BitUnaryOp() local 7917 MachineInstr *HiHalf = in splitScalarSMulU64() local 7983 MachineInstr *HiHalf = in splitScalarSMulPseudo() local 8055 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1) in splitScalar64BitBinaryOp() local
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H A D | SILoadStoreOptimizer.cpp | 1970 MachineInstr *HiHalf = in computeBase() local
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H A D | SIISelLowering.cpp | 5102 MachineInstr *HiHalf = in EmitInstrWithCustomInserter() local 7216 SDValue HiHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BCVec, in lowerINSERT_VECTOR_ELT() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 4876 Register HiHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D() local
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