1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * 4 * Author Karsten Keil <kkeil@novell.com> 5 * 6 * Basic declarations for the mISDN HW channels 7 * 8 * Copyright 2008 by Karsten Keil <kkeil@novell.com> 9 */ 10 11 #ifndef MISDNHW_H 12 #define MISDNHW_H 13 #include <linux/mISDNif.h> 14 #include <linux/timer.h> 15 16 /* 17 * HW DEBUG 0xHHHHGGGG 18 * H - hardware driver specific bits 19 * G - for all drivers 20 */ 21 22 #define DEBUG_HW 0x00000001 23 #define DEBUG_HW_OPEN 0x00000002 24 #define DEBUG_HW_DCHANNEL 0x00000100 25 #define DEBUG_HW_DFIFO 0x00000200 26 #define DEBUG_HW_BCHANNEL 0x00001000 27 #define DEBUG_HW_BFIFO 0x00002000 28 29 #define MAX_DFRAME_LEN_L1 300 30 #define MAX_MON_FRAME 32 31 #define MAX_LOG_SPACE 2048 32 #define MISDN_COPY_SIZE 32 33 34 /* channel->Flags bit field */ 35 #define FLG_TX_BUSY 0 /* tx_buf in use */ 36 #define FLG_TX_NEXT 1 /* next_skb in use */ 37 #define FLG_L1_BUSY 2 /* L1 is permanent busy */ 38 #define FLG_L2_ACTIVATED 3 /* activated from L2 */ 39 #define FLG_OPEN 5 /* channel is in use */ 40 #define FLG_ACTIVE 6 /* channel is activated */ 41 #define FLG_BUSY_TIMER 7 42 /* channel type */ 43 #define FLG_DCHANNEL 8 /* channel is D-channel */ 44 #define FLG_BCHANNEL 9 /* channel is B-channel */ 45 #define FLG_ECHANNEL 10 /* channel is E-channel */ 46 #define FLG_TRANSPARENT 12 /* channel use transparent data */ 47 #define FLG_HDLC 13 /* channel use hdlc data */ 48 #define FLG_L2DATA 14 /* channel use L2 DATA primitivs */ 49 #define FLG_ORIGIN 15 /* channel is on origin site */ 50 /* channel specific stuff */ 51 #define FLG_FILLEMPTY 16 /* fill fifo on first frame (empty) */ 52 /* arcofi specific */ 53 #define FLG_ARCOFI_TIMER 17 54 #define FLG_ARCOFI_ERROR 18 55 /* isar specific */ 56 #define FLG_INITIALIZED 17 57 #define FLG_DLEETX 18 58 #define FLG_LASTDLE 19 59 #define FLG_FIRST 20 60 #define FLG_LASTDATA 21 61 #define FLG_NMD_DATA 22 62 #define FLG_FTI_RUN 23 63 #define FLG_LL_OK 24 64 #define FLG_LL_CONN 25 65 #define FLG_DTMFSEND 26 66 #define FLG_TX_EMPTY 27 67 /* stop sending received data upstream */ 68 #define FLG_RX_OFF 28 69 /* workq events */ 70 #define FLG_RECVQUEUE 30 71 #define FLG_PHCHANGE 31 72 73 #define schedule_event(s, ev) do { \ 74 test_and_set_bit(ev, &((s)->Flags)); \ 75 schedule_work(&((s)->workq)); \ 76 } while (0) 77 78 struct dchannel { 79 struct mISDNdevice dev; 80 u_long Flags; 81 struct work_struct workq; 82 void (*phfunc) (struct dchannel *); 83 u_int state; 84 void *l1; 85 void *hw; 86 int slot; /* multiport card channel slot */ 87 struct timer_list timer; 88 /* receive data */ 89 struct sk_buff *rx_skb; 90 int maxlen; 91 /* send data */ 92 struct sk_buff_head squeue; 93 struct sk_buff_head rqueue; 94 struct sk_buff *tx_skb; 95 int tx_idx; 96 int debug; 97 /* statistics */ 98 int err_crc; 99 int err_tx; 100 int err_rx; 101 }; 102 103 typedef int (dchannel_l1callback)(struct dchannel *, u_int); 104 extern int create_l1(struct dchannel *, dchannel_l1callback *); 105 106 /* private L1 commands */ 107 #define INFO0 0x8002 108 #define INFO1 0x8102 109 #define INFO2 0x8202 110 #define INFO3_P8 0x8302 111 #define INFO3_P10 0x8402 112 #define INFO4_P8 0x8502 113 #define INFO4_P10 0x8602 114 #define LOSTFRAMING 0x8702 115 #define ANYSIGNAL 0x8802 116 #define HW_POWERDOWN 0x8902 117 #define HW_RESET_REQ 0x8a02 118 #define HW_POWERUP_REQ 0x8b02 119 #define HW_DEACT_REQ 0x8c02 120 #define HW_ACTIVATE_REQ 0x8e02 121 #define HW_D_NOBLOCKED 0x8f02 122 #define HW_RESET_IND 0x9002 123 #define HW_POWERUP_IND 0x9102 124 #define HW_DEACT_IND 0x9202 125 #define HW_ACTIVATE_IND 0x9302 126 #define HW_DEACT_CNF 0x9402 127 #define HW_TESTLOOP 0x9502 128 #define HW_TESTRX_RAW 0x9602 129 #define HW_TESTRX_HDLC 0x9702 130 #define HW_TESTRX_OFF 0x9802 131 #define HW_TIMER3_IND 0x9902 132 #define HW_TIMER3_VALUE 0x9a00 133 #define HW_TIMER3_VMASK 0x00FF 134 135 struct layer1; 136 extern int l1_event(struct layer1 *, u_int); 137 138 #define MISDN_BCH_FILL_SIZE 4 139 140 struct bchannel { 141 struct mISDNchannel ch; 142 int nr; 143 u_long Flags; 144 struct work_struct workq; 145 u_int state; 146 void *hw; 147 int slot; /* multiport card channel slot */ 148 struct timer_list timer; 149 /* receive data */ 150 u8 fill[MISDN_BCH_FILL_SIZE]; 151 struct sk_buff *rx_skb; 152 unsigned short maxlen; 153 unsigned short init_maxlen; /* initial value */ 154 unsigned short next_maxlen; /* pending value */ 155 unsigned short minlen; /* for transparent data */ 156 unsigned short init_minlen; /* initial value */ 157 unsigned short next_minlen; /* pending value */ 158 /* send data */ 159 struct sk_buff *next_skb; 160 struct sk_buff *tx_skb; 161 struct sk_buff_head rqueue; 162 int rcount; 163 int tx_idx; 164 int debug; 165 /* statistics */ 166 int err_crc; 167 int err_tx; 168 int err_rx; 169 int dropcnt; 170 }; 171 172 extern int mISDN_initdchannel(struct dchannel *, int, void *); 173 extern int mISDN_initbchannel(struct bchannel *, unsigned short, 174 unsigned short); 175 extern int mISDN_freedchannel(struct dchannel *); 176 extern void mISDN_clear_bchannel(struct bchannel *); 177 extern void mISDN_freebchannel(struct bchannel *); 178 extern int mISDN_ctrl_bchannel(struct bchannel *, struct mISDN_ctrl_req *); 179 extern void queue_ch_frame(struct mISDNchannel *, u_int, 180 int, struct sk_buff *); 181 extern int dchannel_senddata(struct dchannel *, struct sk_buff *); 182 extern int bchannel_senddata(struct bchannel *, struct sk_buff *); 183 extern int bchannel_get_rxbuf(struct bchannel *, int); 184 extern void recv_Dchannel(struct dchannel *); 185 extern void recv_Echannel(struct dchannel *, struct dchannel *); 186 extern void recv_Bchannel(struct bchannel *, unsigned int, bool); 187 extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *); 188 extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *); 189 extern int get_next_bframe(struct bchannel *); 190 extern int get_next_dframe(struct dchannel *); 191 192 #endif 193