1 // SPDX-License-Identifier: GPL-2.0
2 #include <errno.h>
3 #include <regex.h>
4 #include <string.h>
5 #include <sys/auxv.h>
6 #include <linux/kernel.h>
7 #include <linux/zalloc.h>
8
9 #include "../debug.h"
10 #include "../event.h"
11 #include "../perf_regs.h"
12 #include "../../perf-sys.h"
13 #include "../../arch/arm64/include/perf_regs.h"
14
15 #define SMPL_REG_MASK(b) (1ULL << (b))
16
17 #ifndef HWCAP_SVE
18 #define HWCAP_SVE (1 << 22)
19 #endif
20
21 /* %xNUM */
22 #define SDT_OP_REGEX1 "^(x[1-2]?[0-9]|3[0-1])$"
23
24 /* [sp], [sp, NUM] */
25 #define SDT_OP_REGEX2 "^\\[sp(, )?([0-9]+)?\\]$"
26
27 static regex_t sdt_op_regex1, sdt_op_regex2;
28
sdt_init_op_regex(void)29 static int sdt_init_op_regex(void)
30 {
31 static int initialized;
32 int ret = 0;
33
34 if (initialized)
35 return 0;
36
37 ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
38 if (ret)
39 goto error;
40
41 ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
42 if (ret)
43 goto free_regex1;
44
45 initialized = 1;
46 return 0;
47
48 free_regex1:
49 regfree(&sdt_op_regex1);
50 error:
51 pr_debug4("Regex compilation error.\n");
52 return ret;
53 }
54
55 /*
56 * SDT marker arguments on Arm64 uses %xREG or [sp, NUM], currently
57 * support these two formats.
58 */
__perf_sdt_arg_parse_op_arm64(char * old_op,char ** new_op)59 int __perf_sdt_arg_parse_op_arm64(char *old_op, char **new_op)
60 {
61 int ret, new_len;
62 regmatch_t rm[5];
63
64 ret = sdt_init_op_regex();
65 if (ret < 0)
66 return ret;
67
68 if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
69 /* Extract xNUM */
70 new_len = 2; /* % NULL */
71 new_len += (int)(rm[1].rm_eo - rm[1].rm_so);
72
73 *new_op = zalloc(new_len);
74 if (!*new_op)
75 return -ENOMEM;
76
77 scnprintf(*new_op, new_len, "%%%.*s",
78 (int)(rm[1].rm_eo - rm[1].rm_so), old_op + rm[1].rm_so);
79 } else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
80 /* [sp], [sp, NUM] or [sp,NUM] */
81 new_len = 7; /* + ( % s p ) NULL */
82
83 /* If the argument is [sp], need to fill offset '0' */
84 if (rm[2].rm_so == -1)
85 new_len += 1;
86 else
87 new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
88
89 *new_op = zalloc(new_len);
90 if (!*new_op)
91 return -ENOMEM;
92
93 if (rm[2].rm_so == -1)
94 scnprintf(*new_op, new_len, "+0(%%sp)");
95 else
96 scnprintf(*new_op, new_len, "+%.*s(%%sp)",
97 (int)(rm[2].rm_eo - rm[2].rm_so),
98 old_op + rm[2].rm_so);
99 } else {
100 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
101 return SDT_ARG_SKIP;
102 }
103
104 return SDT_ARG_VALID;
105 }
106
__perf_reg_mask_arm64(bool intr)107 uint64_t __perf_reg_mask_arm64(bool intr)
108 {
109 struct perf_event_attr attr = {
110 .type = PERF_TYPE_HARDWARE,
111 .config = PERF_COUNT_HW_CPU_CYCLES,
112 .sample_type = PERF_SAMPLE_REGS_USER,
113 .disabled = 1,
114 .exclude_kernel = 1,
115 .sample_period = 1,
116 .sample_regs_user = PERF_REGS_MASK
117 };
118 int fd;
119
120 if (intr)
121 return PERF_REGS_MASK;
122
123 if (getauxval(AT_HWCAP) & HWCAP_SVE)
124 attr.sample_regs_user |= SMPL_REG_MASK(PERF_REG_ARM64_VG);
125
126 /*
127 * Check if the pmu supports perf extended regs, before
128 * returning the register mask to sample. Open the event
129 * on the perf process to check this.
130 */
131 if (attr.sample_regs_user != PERF_REGS_MASK) {
132 event_attr_init(&attr);
133 fd = sys_perf_event_open(&attr, /*pid=*/0, /*cpu=*/-1,
134 /*group_fd=*/-1, /*flags=*/0);
135 if (fd != -1) {
136 close(fd);
137 return attr.sample_regs_user;
138 }
139 }
140 return PERF_REGS_MASK;
141 }
142
__perf_reg_name_arm64(int id)143 const char *__perf_reg_name_arm64(int id)
144 {
145 switch (id) {
146 case PERF_REG_ARM64_X0:
147 return "x0";
148 case PERF_REG_ARM64_X1:
149 return "x1";
150 case PERF_REG_ARM64_X2:
151 return "x2";
152 case PERF_REG_ARM64_X3:
153 return "x3";
154 case PERF_REG_ARM64_X4:
155 return "x4";
156 case PERF_REG_ARM64_X5:
157 return "x5";
158 case PERF_REG_ARM64_X6:
159 return "x6";
160 case PERF_REG_ARM64_X7:
161 return "x7";
162 case PERF_REG_ARM64_X8:
163 return "x8";
164 case PERF_REG_ARM64_X9:
165 return "x9";
166 case PERF_REG_ARM64_X10:
167 return "x10";
168 case PERF_REG_ARM64_X11:
169 return "x11";
170 case PERF_REG_ARM64_X12:
171 return "x12";
172 case PERF_REG_ARM64_X13:
173 return "x13";
174 case PERF_REG_ARM64_X14:
175 return "x14";
176 case PERF_REG_ARM64_X15:
177 return "x15";
178 case PERF_REG_ARM64_X16:
179 return "x16";
180 case PERF_REG_ARM64_X17:
181 return "x17";
182 case PERF_REG_ARM64_X18:
183 return "x18";
184 case PERF_REG_ARM64_X19:
185 return "x19";
186 case PERF_REG_ARM64_X20:
187 return "x20";
188 case PERF_REG_ARM64_X21:
189 return "x21";
190 case PERF_REG_ARM64_X22:
191 return "x22";
192 case PERF_REG_ARM64_X23:
193 return "x23";
194 case PERF_REG_ARM64_X24:
195 return "x24";
196 case PERF_REG_ARM64_X25:
197 return "x25";
198 case PERF_REG_ARM64_X26:
199 return "x26";
200 case PERF_REG_ARM64_X27:
201 return "x27";
202 case PERF_REG_ARM64_X28:
203 return "x28";
204 case PERF_REG_ARM64_X29:
205 return "x29";
206 case PERF_REG_ARM64_SP:
207 return "sp";
208 case PERF_REG_ARM64_LR:
209 return "lr";
210 case PERF_REG_ARM64_PC:
211 return "pc";
212 case PERF_REG_ARM64_VG:
213 return "vg";
214 default:
215 return NULL;
216 }
217
218 return NULL;
219 }
220
__perf_reg_ip_arm64(void)221 uint64_t __perf_reg_ip_arm64(void)
222 {
223 return PERF_REG_ARM64_PC;
224 }
225
__perf_reg_sp_arm64(void)226 uint64_t __perf_reg_sp_arm64(void)
227 {
228 return PERF_REG_ARM64_SP;
229 }
230