1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Linux driver for Uniwill notebooks. 4 * 5 * Special thanks go to Pőcze Barnabás, Christoffer Sandberg and Werner Sembach 6 * for supporting the development of this driver either through prior work or 7 * by answering questions regarding the underlying ACPI and WMI interfaces. 8 * 9 * Copyright (C) 2025 Armin Wolf <W_Armin@gmx.de> 10 */ 11 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14 #include <linux/acpi.h> 15 #include <linux/array_size.h> 16 #include <linux/bits.h> 17 #include <linux/bitfield.h> 18 #include <linux/cleanup.h> 19 #include <linux/debugfs.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/device/driver.h> 23 #include <linux/dmi.h> 24 #include <linux/errno.h> 25 #include <linux/fixp-arith.h> 26 #include <linux/hwmon.h> 27 #include <linux/hwmon-sysfs.h> 28 #include <linux/init.h> 29 #include <linux/input.h> 30 #include <linux/input/sparse-keymap.h> 31 #include <linux/kernel.h> 32 #include <linux/kstrtox.h> 33 #include <linux/leds.h> 34 #include <linux/led-class-multicolor.h> 35 #include <linux/limits.h> 36 #include <linux/list.h> 37 #include <linux/minmax.h> 38 #include <linux/module.h> 39 #include <linux/mutex.h> 40 #include <linux/notifier.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm.h> 43 #include <linux/printk.h> 44 #include <linux/regmap.h> 45 #include <linux/string.h> 46 #include <linux/sysfs.h> 47 #include <linux/types.h> 48 #include <linux/units.h> 49 50 #include <acpi/battery.h> 51 52 #include "uniwill-wmi.h" 53 54 #define EC_ADDR_BAT_POWER_UNIT_1 0x0400 55 56 #define EC_ADDR_BAT_POWER_UNIT_2 0x0401 57 58 #define EC_ADDR_BAT_DESIGN_CAPACITY_1 0x0402 59 60 #define EC_ADDR_BAT_DESIGN_CAPACITY_2 0x0403 61 62 #define EC_ADDR_BAT_FULL_CAPACITY_1 0x0404 63 64 #define EC_ADDR_BAT_FULL_CAPACITY_2 0x0405 65 66 #define EC_ADDR_BAT_DESIGN_VOLTAGE_1 0x0408 67 68 #define EC_ADDR_BAT_DESIGN_VOLTAGE_2 0x0409 69 70 #define EC_ADDR_BAT_STATUS_1 0x0432 71 #define BAT_DISCHARGING BIT(0) 72 73 #define EC_ADDR_BAT_STATUS_2 0x0433 74 75 #define EC_ADDR_BAT_CURRENT_1 0x0434 76 77 #define EC_ADDR_BAT_CURRENT_2 0x0435 78 79 #define EC_ADDR_BAT_REMAIN_CAPACITY_1 0x0436 80 81 #define EC_ADDR_BAT_REMAIN_CAPACITY_2 0x0437 82 83 #define EC_ADDR_BAT_VOLTAGE_1 0x0438 84 85 #define EC_ADDR_BAT_VOLTAGE_2 0x0439 86 87 #define EC_ADDR_CPU_TEMP 0x043E 88 89 #define EC_ADDR_GPU_TEMP 0x044F 90 91 #define EC_ADDR_SYSTEM_ID 0x0456 92 #define HAS_GPU BIT(7) 93 94 #define EC_ADDR_MAIN_FAN_RPM_1 0x0464 95 96 #define EC_ADDR_MAIN_FAN_RPM_2 0x0465 97 98 #define EC_ADDR_SECOND_FAN_RPM_1 0x046C 99 100 #define EC_ADDR_SECOND_FAN_RPM_2 0x046D 101 102 #define EC_ADDR_DEVICE_STATUS 0x047B 103 #define WIFI_STATUS_ON BIT(7) 104 /* BIT(5) is also unset depending on the rfkill state (bluetooth?) */ 105 106 #define EC_ADDR_BAT_ALERT 0x0494 107 108 #define EC_ADDR_BAT_CYCLE_COUNT_1 0x04A6 109 110 #define EC_ADDR_BAT_CYCLE_COUNT_2 0x04A7 111 112 #define EC_ADDR_PROJECT_ID 0x0740 113 #define PROJECT_ID_PH4TRX1 0x12 114 #define PROJECT_ID_PH6TRX1 0x15 115 116 #define EC_ADDR_AP_OEM 0x0741 117 #define ENABLE_MANUAL_CTRL BIT(0) 118 #define ITE_KBD_EFFECT_REACTIVE BIT(3) 119 #define FAN_ABNORMAL BIT(5) 120 121 #define EC_ADDR_SUPPORT_5 0x0742 122 #define FAN_TURBO_SUPPORTED BIT(4) 123 #define FAN_SUPPORT BIT(5) 124 125 #define EC_ADDR_CTGP_DB_CTRL 0x0743 126 #define CTGP_DB_GENERAL_ENABLE BIT(0) 127 #define CTGP_DB_DB_ENABLE BIT(1) 128 #define CTGP_DB_CTGP_ENABLE BIT(2) 129 130 #define EC_ADDR_CTGP_DB_CTGP_OFFSET 0x0744 131 132 #define EC_ADDR_CTGP_DB_TPP_OFFSET 0x0745 133 134 #define EC_ADDR_CTGP_DB_DB_OFFSET 0x0746 135 136 #define EC_ADDR_LIGHTBAR_AC_CTRL 0x0748 137 #define LIGHTBAR_APP_EXISTS BIT(0) 138 #define LIGHTBAR_POWER_SAVE BIT(1) 139 #define LIGHTBAR_S0_OFF BIT(2) 140 #define LIGHTBAR_S3_OFF BIT(3) // Breathing animation when suspended 141 #define LIGHTBAR_WELCOME BIT(7) // Rainbow animation 142 143 #define EC_ADDR_LIGHTBAR_AC_RED 0x0749 144 145 #define EC_ADDR_LIGHTBAR_AC_GREEN 0x074A 146 147 #define EC_ADDR_LIGHTBAR_AC_BLUE 0x074B 148 149 #define EC_ADDR_BIOS_OEM 0x074E 150 #define FN_LOCK_STATUS BIT(4) 151 152 #define EC_ADDR_MANUAL_FAN_CTRL 0x0751 153 #define FAN_LEVEL_MASK GENMASK(2, 0) 154 #define FAN_MODE_TURBO BIT(4) 155 #define FAN_MODE_HIGH BIT(5) 156 #define FAN_MODE_BOOST BIT(6) 157 #define FAN_MODE_USER BIT(7) 158 159 #define EC_ADDR_PWM_1 0x075B 160 161 #define EC_ADDR_PWM_2 0x075C 162 163 /* Unreliable */ 164 #define EC_ADDR_SUPPORT_1 0x0765 165 #define AIRPLANE_MODE BIT(0) 166 #define GPS_SWITCH BIT(1) 167 #define OVERCLOCK BIT(2) 168 #define MACRO_KEY BIT(3) 169 #define SHORTCUT_KEY BIT(4) 170 #define SUPER_KEY_LOCK BIT(5) 171 #define LIGHTBAR BIT(6) 172 #define FAN_BOOST BIT(7) 173 174 #define EC_ADDR_SUPPORT_2 0x0766 175 #define SILENT_MODE BIT(0) 176 #define USB_CHARGING BIT(1) 177 #define RGB_KEYBOARD BIT(2) 178 #define CHINA_MODE BIT(5) 179 #define MY_BATTERY BIT(6) 180 181 #define EC_ADDR_TRIGGER 0x0767 182 #define TRIGGER_SUPER_KEY_LOCK BIT(0) 183 #define TRIGGER_LIGHTBAR BIT(1) 184 #define TRIGGER_FAN_BOOST BIT(2) 185 #define TRIGGER_SILENT_MODE BIT(3) 186 #define TRIGGER_USB_CHARGING BIT(4) 187 #define RGB_APPLY_COLOR BIT(5) 188 #define RGB_LOGO_EFFECT BIT(6) 189 #define RGB_RAINBOW_EFFECT BIT(7) 190 191 #define EC_ADDR_SWITCH_STATUS 0x0768 192 #define SUPER_KEY_LOCK_STATUS BIT(0) 193 #define LIGHTBAR_STATUS BIT(1) 194 #define FAN_BOOST_STATUS BIT(2) 195 #define MACRO_KEY_STATUS BIT(3) 196 #define MY_BAT_POWER_BAT_STATUS BIT(4) 197 198 #define EC_ADDR_RGB_RED 0x0769 199 200 #define EC_ADDR_RGB_GREEN 0x076A 201 202 #define EC_ADDR_RGB_BLUE 0x076B 203 204 #define EC_ADDR_ROMID_START 0x0770 205 #define ROMID_LENGTH 14 206 207 #define EC_ADDR_ROMID_EXTRA_1 0x077E 208 209 #define EC_ADDR_ROMID_EXTRA_2 0x077F 210 211 #define EC_ADDR_BIOS_OEM_2 0x0782 212 #define FAN_V2_NEW BIT(0) 213 #define FAN_QKEY BIT(1) 214 #define FAN_TABLE_OFFICE_MODE BIT(2) 215 #define FAN_V3 BIT(3) 216 #define DEFAULT_MODE BIT(4) 217 218 #define EC_ADDR_PL1_SETTING 0x0783 219 220 #define EC_ADDR_PL2_SETTING 0x0784 221 222 #define EC_ADDR_PL4_SETTING 0x0785 223 224 #define EC_ADDR_FAN_DEFAULT 0x0786 225 #define FAN_CURVE_LENGTH 5 226 227 #define EC_ADDR_KBD_STATUS 0x078C 228 #define KBD_WHITE_ONLY BIT(0) // ~single color 229 #define KBD_SINGLE_COLOR_OFF BIT(1) 230 #define KBD_TURBO_LEVEL_MASK GENMASK(3, 2) 231 #define KBD_APPLY BIT(4) 232 #define KBD_BRIGHTNESS GENMASK(7, 5) 233 234 #define EC_ADDR_FAN_CTRL 0x078E 235 #define FAN3P5 BIT(1) 236 #define CHARGING_PROFILE BIT(3) 237 #define UNIVERSAL_FAN_CTRL BIT(6) 238 239 #define EC_ADDR_BIOS_OEM_3 0x07A3 240 #define FAN_REDUCED_DURY_CYCLE BIT(5) 241 #define FAN_ALWAYS_ON BIT(6) 242 243 #define EC_ADDR_BIOS_BYTE 0x07A4 244 #define FN_LOCK_SWITCH BIT(3) 245 246 #define EC_ADDR_OEM_3 0x07A5 247 #define POWER_LED_MASK GENMASK(1, 0) 248 #define POWER_LED_LEFT 0x00 249 #define POWER_LED_BOTH 0x01 250 #define POWER_LED_NONE 0x02 251 #define FAN_QUIET BIT(2) 252 #define OVERBOOST BIT(4) 253 #define HIGH_POWER BIT(7) 254 255 #define EC_ADDR_OEM_4 0x07A6 256 #define OVERBOOST_DYN_TEMP_OFF BIT(1) 257 #define CHARGING_PROFILE_MASK GENMASK(5, 4) 258 #define CHARGING_PROFILE_HIGH_CAPACITY 0x00 259 #define CHARGING_PROFILE_BALANCED 0x01 260 #define CHARGING_PROFILE_STATIONARY 0x02 261 #define TOUCHPAD_TOGGLE_OFF BIT(6) 262 263 #define EC_ADDR_CHARGE_CTRL 0x07B9 264 #define CHARGE_CTRL_MASK GENMASK(6, 0) 265 #define CHARGE_CTRL_REACHED BIT(7) 266 267 #define EC_ADDR_UNIVERSAL_FAN_CTRL 0x07C5 268 #define SPLIT_TABLES BIT(7) 269 270 #define EC_ADDR_AP_OEM_6 0x07C6 271 #define ENABLE_UNIVERSAL_FAN_CTRL BIT(2) 272 #define BATTERY_CHARGE_FULL_OVER_24H BIT(3) 273 #define BATTERY_ERM_STATUS_REACHED BIT(4) 274 275 #define EC_ADDR_USB_C_POWER_PRIORITY 0x07CC 276 #define USB_C_POWER_PRIORITY BIT(7) 277 278 /* Same bits as EC_ADDR_LIGHTBAR_AC_CTRL except LIGHTBAR_S3_OFF */ 279 #define EC_ADDR_LIGHTBAR_BAT_CTRL 0x07E2 280 281 #define EC_ADDR_LIGHTBAR_BAT_RED 0x07E3 282 283 #define EC_ADDR_LIGHTBAR_BAT_GREEN 0x07E4 284 285 #define EC_ADDR_LIGHTBAR_BAT_BLUE 0x07E5 286 287 #define EC_ADDR_CPU_TEMP_END_TABLE 0x0F00 288 289 #define EC_ADDR_CPU_TEMP_START_TABLE 0x0F10 290 291 #define EC_ADDR_CPU_FAN_SPEED_TABLE 0x0F20 292 293 #define EC_ADDR_GPU_TEMP_END_TABLE 0x0F30 294 295 #define EC_ADDR_GPU_TEMP_START_TABLE 0x0F40 296 297 #define EC_ADDR_GPU_FAN_SPEED_TABLE 0x0F50 298 299 /* 300 * Those two registers technically allow for manual fan control, 301 * but are unstable on some models and are likely not meant to 302 * be used by applications as they are only accessible when using 303 * the WMI interface. 304 */ 305 #define EC_ADDR_PWM_1_WRITEABLE 0x1804 306 307 #define EC_ADDR_PWM_2_WRITEABLE 0x1809 308 309 #define DRIVER_NAME "uniwill" 310 311 /* 312 * The OEM software always sleeps up to 6 ms after reading/writing EC 313 * registers, so we emulate this behaviour for maximum compatibility. 314 */ 315 #define UNIWILL_EC_DELAY_US 6000 316 317 #define PWM_MAX 200 318 #define FAN_TABLE_LENGTH 16 319 320 #define LED_CHANNELS 3 321 #define LED_MAX_BRIGHTNESS 200 322 323 #define UNIWILL_FEATURE_FN_LOCK BIT(0) 324 #define UNIWILL_FEATURE_SUPER_KEY BIT(1) 325 #define UNIWILL_FEATURE_TOUCHPAD_TOGGLE BIT(2) 326 #define UNIWILL_FEATURE_LIGHTBAR BIT(3) 327 #define UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT BIT(4) 328 /* Mutually exclusive with the charge limit feature */ 329 #define UNIWILL_FEATURE_BATTERY_CHARGE_MODES BIT(5) 330 #define UNIWILL_FEATURE_CPU_TEMP BIT(6) 331 #define UNIWILL_FEATURE_GPU_TEMP BIT(7) 332 #define UNIWILL_FEATURE_PRIMARY_FAN BIT(8) 333 #define UNIWILL_FEATURE_SECONDARY_FAN BIT(9) 334 #define UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL BIT(10) 335 #define UNIWILL_FEATURE_USB_C_POWER_PRIORITY BIT(11) 336 337 enum usb_c_power_priority_options { 338 USB_C_POWER_PRIORITY_CHARGING = 0, 339 USB_C_POWER_PRIORITY_PERFORMANCE, 340 }; 341 342 struct uniwill_data { 343 struct device *dev; 344 acpi_handle handle; 345 struct regmap *regmap; 346 unsigned int features; 347 struct acpi_battery_hook hook; 348 struct mutex battery_lock; /* Protects the list of currently registered batteries */ 349 union { 350 struct { 351 /* Protects writes to last_charge_type */ 352 struct mutex charge_type_lock; 353 enum power_supply_charge_type last_charge_type; 354 }; 355 unsigned int last_charge_ctrl; 356 }; 357 bool last_fn_lock_state; 358 bool last_super_key_enable_state; 359 bool last_touchpad_toggle_enable_state; 360 struct mutex super_key_lock; /* Protects the toggling of the super key lock state */ 361 struct list_head batteries; 362 struct mutex led_lock; /* Protects writes to the lightbar registers */ 363 struct led_classdev_mc led_mc_cdev; 364 struct mc_subled led_mc_subled_info[LED_CHANNELS]; 365 struct mutex input_lock; /* Protects input sequence during notify */ 366 struct input_dev *input_device; 367 struct notifier_block nb; 368 struct mutex usb_c_power_priority_lock; /* Protects dependent bit write and state safe */ 369 enum usb_c_power_priority_options last_usb_c_power_priority_option; 370 }; 371 372 struct uniwill_battery_entry { 373 struct list_head head; 374 struct power_supply *battery; 375 }; 376 377 struct uniwill_device_descriptor { 378 unsigned int features; 379 /* Executed during driver probing */ 380 int (*probe)(struct uniwill_data *data); 381 }; 382 383 static bool force; 384 module_param_unsafe(force, bool, 0); 385 MODULE_PARM_DESC(force, "Force loading without checking for supported devices\n"); 386 387 /* 388 * Contains device specific data like the feature bitmap since 389 * the associated registers are not always reliable. 390 */ 391 static struct uniwill_device_descriptor device_descriptor __ro_after_init; 392 393 static const char * const uniwill_temp_labels[] = { 394 "CPU", 395 "GPU", 396 }; 397 398 static const char * const uniwill_fan_labels[] = { 399 "Main", 400 "Secondary", 401 }; 402 403 static const struct key_entry uniwill_keymap[] = { 404 /* Reported via keyboard controller */ 405 { KE_IGNORE, UNIWILL_OSD_CAPSLOCK, { KEY_CAPSLOCK }}, 406 { KE_IGNORE, UNIWILL_OSD_NUMLOCK, { KEY_NUMLOCK }}, 407 408 /* 409 * Reported when the user enables/disables the super key. 410 * Those events might even be reported when the change was done 411 * using the sysfs attribute! 412 */ 413 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_DISABLE, { KEY_UNKNOWN }}, 414 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_ENABLE, { KEY_UNKNOWN }}, 415 /* Optional, might not be reported by all devices */ 416 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_STATE_CHANGED, { KEY_UNKNOWN }}, 417 418 /* Reported in manual mode when toggling the airplane mode status */ 419 { KE_KEY, UNIWILL_OSD_RFKILL, { KEY_RFKILL }}, 420 { KE_IGNORE, UNIWILL_OSD_RADIOON, { KEY_UNKNOWN }}, 421 { KE_IGNORE, UNIWILL_OSD_RADIOOFF, { KEY_UNKNOWN }}, 422 423 /* Reported when user wants to cycle the platform profile */ 424 { KE_KEY, UNIWILL_OSD_PERFORMANCE_MODE_TOGGLE, { KEY_F14 }}, 425 426 /* Reported when the user wants to adjust the brightness of the keyboard */ 427 { KE_KEY, UNIWILL_OSD_KBDILLUMDOWN, { KEY_KBDILLUMDOWN }}, 428 { KE_KEY, UNIWILL_OSD_KBDILLUMUP, { KEY_KBDILLUMUP }}, 429 430 /* Reported when the user wants to toggle the microphone mute status */ 431 { KE_KEY, UNIWILL_OSD_MIC_MUTE, { KEY_MICMUTE }}, 432 433 /* Reported when the user wants to toggle the mute status */ 434 { KE_IGNORE, UNIWILL_OSD_MUTE, { KEY_MUTE }}, 435 436 /* Reported when the user wants to toggle the brightness of the keyboard */ 437 { KE_KEY, UNIWILL_OSD_KBDILLUMTOGGLE, { KEY_KBDILLUMTOGGLE }}, 438 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL0, { KEY_KBDILLUMTOGGLE }}, 439 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL1, { KEY_KBDILLUMTOGGLE }}, 440 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL2, { KEY_KBDILLUMTOGGLE }}, 441 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL3, { KEY_KBDILLUMTOGGLE }}, 442 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL4, { KEY_KBDILLUMTOGGLE }}, 443 444 /* FIXME: find out the exact meaning of those events */ 445 { KE_IGNORE, UNIWILL_OSD_BAT_CHARGE_FULL_24_H, { KEY_UNKNOWN }}, 446 { KE_IGNORE, UNIWILL_OSD_BAT_ERM_UPDATE, { KEY_UNKNOWN }}, 447 448 /* Reported when the user wants to toggle the benchmark mode status */ 449 { KE_IGNORE, UNIWILL_OSD_BENCHMARK_MODE_TOGGLE, { KEY_UNKNOWN }}, 450 451 /* Reported when the user wants to toggle the webcam */ 452 { KE_IGNORE, UNIWILL_OSD_WEBCAM_TOGGLE, { KEY_UNKNOWN }}, 453 454 { KE_END } 455 }; 456 457 static inline bool uniwill_device_supports(const struct uniwill_data *data, 458 unsigned int features) 459 { 460 return (data->features & features) == features; 461 } 462 463 static inline bool uniwill_device_supports_any(const struct uniwill_data *data, 464 unsigned int features) 465 { 466 return data->features & features; 467 } 468 469 static int uniwill_ec_reg_write(void *context, unsigned int reg, unsigned int val) 470 { 471 union acpi_object params[2] = { 472 { 473 .integer = { 474 .type = ACPI_TYPE_INTEGER, 475 .value = reg, 476 }, 477 }, 478 { 479 .integer = { 480 .type = ACPI_TYPE_INTEGER, 481 .value = val, 482 }, 483 }, 484 }; 485 struct uniwill_data *data = context; 486 struct acpi_object_list input = { 487 .count = ARRAY_SIZE(params), 488 .pointer = params, 489 }; 490 acpi_status status; 491 492 status = acpi_evaluate_object(data->handle, "ECRW", &input, NULL); 493 if (ACPI_FAILURE(status)) 494 return -EIO; 495 496 usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2); 497 498 return 0; 499 } 500 501 static int uniwill_ec_reg_read(void *context, unsigned int reg, unsigned int *val) 502 { 503 union acpi_object params[1] = { 504 { 505 .integer = { 506 .type = ACPI_TYPE_INTEGER, 507 .value = reg, 508 }, 509 }, 510 }; 511 struct uniwill_data *data = context; 512 struct acpi_object_list input = { 513 .count = ARRAY_SIZE(params), 514 .pointer = params, 515 }; 516 unsigned long long output; 517 acpi_status status; 518 519 status = acpi_evaluate_integer(data->handle, "ECRR", &input, &output); 520 if (ACPI_FAILURE(status)) 521 return -EIO; 522 523 if (output > U8_MAX) 524 return -ENXIO; 525 526 usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2); 527 528 *val = output; 529 530 return 0; 531 } 532 533 static const struct regmap_bus uniwill_ec_bus = { 534 .reg_write = uniwill_ec_reg_write, 535 .reg_read = uniwill_ec_reg_read, 536 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE, 537 .val_format_endian_default = REGMAP_ENDIAN_LITTLE, 538 }; 539 540 static bool uniwill_writeable_reg(struct device *dev, unsigned int reg) 541 { 542 switch (reg) { 543 case EC_ADDR_AP_OEM: 544 case EC_ADDR_LIGHTBAR_AC_CTRL: 545 case EC_ADDR_LIGHTBAR_AC_RED: 546 case EC_ADDR_LIGHTBAR_AC_GREEN: 547 case EC_ADDR_LIGHTBAR_AC_BLUE: 548 case EC_ADDR_BIOS_OEM: 549 case EC_ADDR_TRIGGER: 550 case EC_ADDR_OEM_4: 551 case EC_ADDR_CHARGE_CTRL: 552 case EC_ADDR_LIGHTBAR_BAT_CTRL: 553 case EC_ADDR_LIGHTBAR_BAT_RED: 554 case EC_ADDR_LIGHTBAR_BAT_GREEN: 555 case EC_ADDR_LIGHTBAR_BAT_BLUE: 556 case EC_ADDR_CTGP_DB_CTRL: 557 case EC_ADDR_CTGP_DB_CTGP_OFFSET: 558 case EC_ADDR_CTGP_DB_TPP_OFFSET: 559 case EC_ADDR_CTGP_DB_DB_OFFSET: 560 case EC_ADDR_USB_C_POWER_PRIORITY: 561 return true; 562 default: 563 return false; 564 } 565 } 566 567 static bool uniwill_readable_reg(struct device *dev, unsigned int reg) 568 { 569 switch (reg) { 570 case EC_ADDR_CPU_TEMP: 571 case EC_ADDR_GPU_TEMP: 572 case EC_ADDR_MAIN_FAN_RPM_1: 573 case EC_ADDR_MAIN_FAN_RPM_2: 574 case EC_ADDR_SECOND_FAN_RPM_1: 575 case EC_ADDR_SECOND_FAN_RPM_2: 576 case EC_ADDR_BAT_ALERT: 577 case EC_ADDR_PROJECT_ID: 578 case EC_ADDR_AP_OEM: 579 case EC_ADDR_LIGHTBAR_AC_CTRL: 580 case EC_ADDR_LIGHTBAR_AC_RED: 581 case EC_ADDR_LIGHTBAR_AC_GREEN: 582 case EC_ADDR_LIGHTBAR_AC_BLUE: 583 case EC_ADDR_BIOS_OEM: 584 case EC_ADDR_PWM_1: 585 case EC_ADDR_PWM_2: 586 case EC_ADDR_TRIGGER: 587 case EC_ADDR_SWITCH_STATUS: 588 case EC_ADDR_OEM_4: 589 case EC_ADDR_CHARGE_CTRL: 590 case EC_ADDR_LIGHTBAR_BAT_CTRL: 591 case EC_ADDR_LIGHTBAR_BAT_RED: 592 case EC_ADDR_LIGHTBAR_BAT_GREEN: 593 case EC_ADDR_LIGHTBAR_BAT_BLUE: 594 case EC_ADDR_SYSTEM_ID: 595 case EC_ADDR_CTGP_DB_CTRL: 596 case EC_ADDR_CTGP_DB_CTGP_OFFSET: 597 case EC_ADDR_CTGP_DB_TPP_OFFSET: 598 case EC_ADDR_CTGP_DB_DB_OFFSET: 599 case EC_ADDR_USB_C_POWER_PRIORITY: 600 return true; 601 default: 602 return false; 603 } 604 } 605 606 static bool uniwill_volatile_reg(struct device *dev, unsigned int reg) 607 { 608 switch (reg) { 609 case EC_ADDR_CPU_TEMP: 610 case EC_ADDR_GPU_TEMP: 611 case EC_ADDR_MAIN_FAN_RPM_1: 612 case EC_ADDR_MAIN_FAN_RPM_2: 613 case EC_ADDR_SECOND_FAN_RPM_1: 614 case EC_ADDR_SECOND_FAN_RPM_2: 615 case EC_ADDR_BAT_ALERT: 616 case EC_ADDR_BIOS_OEM: 617 case EC_ADDR_PWM_1: 618 case EC_ADDR_PWM_2: 619 case EC_ADDR_TRIGGER: 620 case EC_ADDR_SWITCH_STATUS: 621 case EC_ADDR_OEM_4: 622 case EC_ADDR_CHARGE_CTRL: 623 case EC_ADDR_USB_C_POWER_PRIORITY: 624 return true; 625 default: 626 return false; 627 } 628 } 629 630 static const struct regmap_config uniwill_ec_config = { 631 .reg_bits = 16, 632 .val_bits = 8, 633 .writeable_reg = uniwill_writeable_reg, 634 .readable_reg = uniwill_readable_reg, 635 .volatile_reg = uniwill_volatile_reg, 636 .can_sleep = true, 637 .max_register = 0xFFF, 638 .cache_type = REGCACHE_MAPLE, 639 .use_single_read = true, 640 .use_single_write = true, 641 }; 642 643 static int uniwill_write_fn_lock(struct uniwill_data *data, bool status) 644 { 645 unsigned int value; 646 647 if (status) 648 value = FN_LOCK_STATUS; 649 else 650 value = 0; 651 652 return regmap_update_bits(data->regmap, EC_ADDR_BIOS_OEM, FN_LOCK_STATUS, value); 653 } 654 655 static ssize_t fn_lock_store(struct device *dev, struct device_attribute *attr, const char *buf, 656 size_t count) 657 { 658 struct uniwill_data *data = dev_get_drvdata(dev); 659 bool enable; 660 int ret; 661 662 ret = kstrtobool(buf, &enable); 663 if (ret < 0) 664 return ret; 665 666 ret = uniwill_write_fn_lock(data, enable); 667 if (ret < 0) 668 return ret; 669 670 return count; 671 } 672 673 static int uniwill_read_fn_lock(struct uniwill_data *data, bool *status) 674 { 675 unsigned int value; 676 int ret; 677 678 ret = regmap_read(data->regmap, EC_ADDR_BIOS_OEM, &value); 679 if (ret < 0) 680 return ret; 681 682 *status = !!(value & FN_LOCK_STATUS); 683 684 return 0; 685 } 686 687 static ssize_t fn_lock_show(struct device *dev, struct device_attribute *attr, char *buf) 688 { 689 struct uniwill_data *data = dev_get_drvdata(dev); 690 bool status; 691 int ret; 692 693 ret = uniwill_read_fn_lock(data, &status); 694 if (ret < 0) 695 return ret; 696 697 return sysfs_emit(buf, "%d\n", status); 698 } 699 700 static DEVICE_ATTR_RW(fn_lock); 701 702 static int uniwill_write_super_key_enable(struct uniwill_data *data, bool status) 703 { 704 unsigned int value; 705 int ret; 706 707 guard(mutex)(&data->super_key_lock); 708 709 ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value); 710 if (ret < 0) 711 return ret; 712 713 /* 714 * We can only toggle the super key lock, so we return early if the setting 715 * is already in the correct state. 716 */ 717 if (status == !(value & SUPER_KEY_LOCK_STATUS)) 718 return 0; 719 720 return regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, TRIGGER_SUPER_KEY_LOCK, 721 TRIGGER_SUPER_KEY_LOCK); 722 } 723 724 static ssize_t super_key_enable_store(struct device *dev, struct device_attribute *attr, 725 const char *buf, size_t count) 726 { 727 struct uniwill_data *data = dev_get_drvdata(dev); 728 bool enable; 729 int ret; 730 731 ret = kstrtobool(buf, &enable); 732 if (ret < 0) 733 return ret; 734 735 ret = uniwill_write_super_key_enable(data, enable); 736 if (ret < 0) 737 return ret; 738 739 return count; 740 } 741 742 static int uniwill_read_super_key_enable(struct uniwill_data *data, bool *status) 743 { 744 unsigned int value; 745 int ret; 746 747 ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value); 748 if (ret < 0) 749 return ret; 750 751 *status = !(value & SUPER_KEY_LOCK_STATUS); 752 753 return 0; 754 } 755 756 static ssize_t super_key_enable_show(struct device *dev, struct device_attribute *attr, char *buf) 757 { 758 struct uniwill_data *data = dev_get_drvdata(dev); 759 bool status; 760 int ret; 761 762 ret = uniwill_read_super_key_enable(data, &status); 763 if (ret < 0) 764 return ret; 765 766 return sysfs_emit(buf, "%d\n", status); 767 } 768 769 static DEVICE_ATTR_RW(super_key_enable); 770 771 static int uniwill_write_touchpad_toggle_enable(struct uniwill_data *data, bool status) 772 { 773 unsigned int value; 774 775 if (status) 776 value = 0; 777 else 778 value = TOUCHPAD_TOGGLE_OFF; 779 780 return regmap_update_bits(data->regmap, EC_ADDR_OEM_4, TOUCHPAD_TOGGLE_OFF, value); 781 } 782 783 static ssize_t touchpad_toggle_enable_store(struct device *dev, struct device_attribute *attr, 784 const char *buf, size_t count) 785 { 786 struct uniwill_data *data = dev_get_drvdata(dev); 787 bool enable; 788 int ret; 789 790 ret = kstrtobool(buf, &enable); 791 if (ret < 0) 792 return ret; 793 794 ret = uniwill_write_touchpad_toggle_enable(data, enable); 795 if (ret < 0) 796 return ret; 797 798 return count; 799 } 800 801 static int uniwill_read_touchpad_toggle_enable(struct uniwill_data *data, bool *status) 802 { 803 unsigned int value; 804 int ret; 805 806 ret = regmap_read(data->regmap, EC_ADDR_OEM_4, &value); 807 if (ret < 0) 808 return ret; 809 810 *status = !(value & TOUCHPAD_TOGGLE_OFF); 811 812 return 0; 813 } 814 815 static ssize_t touchpad_toggle_enable_show(struct device *dev, struct device_attribute *attr, 816 char *buf) 817 { 818 struct uniwill_data *data = dev_get_drvdata(dev); 819 bool status; 820 int ret; 821 822 ret = uniwill_read_touchpad_toggle_enable(data, &status); 823 if (ret < 0) 824 return ret; 825 826 return sysfs_emit(buf, "%d\n", status); 827 } 828 829 static DEVICE_ATTR_RW(touchpad_toggle_enable); 830 831 static ssize_t rainbow_animation_store(struct device *dev, struct device_attribute *attr, 832 const char *buf, size_t count) 833 { 834 struct uniwill_data *data = dev_get_drvdata(dev); 835 unsigned int value; 836 bool enable; 837 int ret; 838 839 ret = kstrtobool(buf, &enable); 840 if (ret < 0) 841 return ret; 842 843 if (enable) 844 value = LIGHTBAR_WELCOME; 845 else 846 value = 0; 847 848 guard(mutex)(&data->led_lock); 849 850 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_WELCOME, value); 851 if (ret < 0) 852 return ret; 853 854 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_WELCOME, value); 855 if (ret < 0) 856 return ret; 857 858 return count; 859 } 860 861 static ssize_t rainbow_animation_show(struct device *dev, struct device_attribute *attr, char *buf) 862 { 863 struct uniwill_data *data = dev_get_drvdata(dev); 864 unsigned int value; 865 int ret; 866 867 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 868 if (ret < 0) 869 return ret; 870 871 return sysfs_emit(buf, "%d\n", !!(value & LIGHTBAR_WELCOME)); 872 } 873 874 static DEVICE_ATTR_RW(rainbow_animation); 875 876 static ssize_t breathing_in_suspend_store(struct device *dev, struct device_attribute *attr, 877 const char *buf, size_t count) 878 { 879 struct uniwill_data *data = dev_get_drvdata(dev); 880 unsigned int value; 881 bool enable; 882 int ret; 883 884 ret = kstrtobool(buf, &enable); 885 if (ret < 0) 886 return ret; 887 888 if (enable) 889 value = 0; 890 else 891 value = LIGHTBAR_S3_OFF; 892 893 /* We only access a single register here, so we do not need to use data->led_lock */ 894 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S3_OFF, value); 895 if (ret < 0) 896 return ret; 897 898 return count; 899 } 900 901 static ssize_t breathing_in_suspend_show(struct device *dev, struct device_attribute *attr, 902 char *buf) 903 { 904 struct uniwill_data *data = dev_get_drvdata(dev); 905 unsigned int value; 906 int ret; 907 908 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 909 if (ret < 0) 910 return ret; 911 912 return sysfs_emit(buf, "%d\n", !(value & LIGHTBAR_S3_OFF)); 913 } 914 915 static DEVICE_ATTR_RW(breathing_in_suspend); 916 917 static ssize_t ctgp_offset_store(struct device *dev, struct device_attribute *attr, 918 const char *buf, size_t count) 919 { 920 struct uniwill_data *data = dev_get_drvdata(dev); 921 unsigned int value; 922 int ret; 923 924 ret = kstrtouint(buf, 0, &value); 925 if (ret < 0) 926 return ret; 927 928 if (value > U8_MAX) 929 return -EINVAL; 930 931 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, value); 932 if (ret < 0) 933 return ret; 934 935 return count; 936 } 937 938 static ssize_t ctgp_offset_show(struct device *dev, struct device_attribute *attr, 939 char *buf) 940 { 941 struct uniwill_data *data = dev_get_drvdata(dev); 942 unsigned int value; 943 int ret; 944 945 ret = regmap_read(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, &value); 946 if (ret < 0) 947 return ret; 948 949 return sysfs_emit(buf, "%u\n", value); 950 } 951 952 static DEVICE_ATTR_RW(ctgp_offset); 953 954 static int uniwill_nvidia_ctgp_init(struct uniwill_data *data) 955 { 956 int ret; 957 958 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 959 return 0; 960 961 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, 0); 962 if (ret < 0) 963 return ret; 964 965 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_TPP_OFFSET, 255); 966 if (ret < 0) 967 return ret; 968 969 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_DB_OFFSET, 25); 970 if (ret < 0) 971 return ret; 972 973 ret = regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 974 CTGP_DB_GENERAL_ENABLE | CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 975 if (ret < 0) 976 return ret; 977 978 return 0; 979 } 980 981 static const char * const usb_c_power_priority_text[] = { 982 [USB_C_POWER_PRIORITY_CHARGING] = "charging", 983 [USB_C_POWER_PRIORITY_PERFORMANCE] = "performance", 984 }; 985 986 static const u8 usb_c_power_priority_value[] = { 987 [USB_C_POWER_PRIORITY_CHARGING] = 0, 988 [USB_C_POWER_PRIORITY_PERFORMANCE] = USB_C_POWER_PRIORITY, 989 }; 990 991 static ssize_t usb_c_power_priority_store(struct device *dev, 992 struct device_attribute *attr, 993 const char *buf, size_t count) 994 { 995 struct uniwill_data *data = dev_get_drvdata(dev); 996 enum usb_c_power_priority_options option; 997 unsigned int value; 998 int ret; 999 1000 ret = sysfs_match_string(usb_c_power_priority_text, buf); 1001 if (ret < 0) 1002 return ret; 1003 1004 option = ret; 1005 value = usb_c_power_priority_value[option]; 1006 1007 guard(mutex)(&data->usb_c_power_priority_lock); 1008 1009 ret = regmap_update_bits(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, 1010 USB_C_POWER_PRIORITY, value); 1011 if (ret < 0) 1012 return ret; 1013 1014 data->last_usb_c_power_priority_option = option; 1015 1016 return count; 1017 } 1018 1019 static ssize_t usb_c_power_priority_show(struct device *dev, 1020 struct device_attribute *attr, 1021 char *buf) 1022 { 1023 struct uniwill_data *data = dev_get_drvdata(dev); 1024 unsigned int value; 1025 int ret; 1026 1027 ret = regmap_read(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, &value); 1028 if (ret < 0) 1029 return ret; 1030 1031 value &= USB_C_POWER_PRIORITY; 1032 1033 if (usb_c_power_priority_value[USB_C_POWER_PRIORITY_PERFORMANCE] == value) 1034 return sysfs_emit(buf, "%s\n", 1035 usb_c_power_priority_text[USB_C_POWER_PRIORITY_PERFORMANCE]); 1036 1037 return sysfs_emit(buf, "%s\n", usb_c_power_priority_text[USB_C_POWER_PRIORITY_CHARGING]); 1038 } 1039 1040 static DEVICE_ATTR_RW(usb_c_power_priority); 1041 1042 static int usb_c_power_priority_restore(struct uniwill_data *data) 1043 { 1044 unsigned int value; 1045 1046 value = usb_c_power_priority_value[data->last_usb_c_power_priority_option]; 1047 1048 guard(mutex)(&data->usb_c_power_priority_lock); 1049 1050 return regmap_update_bits(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, 1051 USB_C_POWER_PRIORITY, value); 1052 } 1053 1054 static int usb_c_power_priority_init(struct uniwill_data *data) 1055 { 1056 unsigned int value; 1057 int ret; 1058 1059 if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) 1060 return 0; 1061 1062 ret = devm_mutex_init(data->dev, &data->usb_c_power_priority_lock); 1063 if (ret < 0) 1064 return ret; 1065 1066 ret = regmap_read(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, &value); 1067 if (ret < 0) 1068 return ret; 1069 1070 value &= USB_C_POWER_PRIORITY; 1071 1072 data->last_usb_c_power_priority_option = 1073 usb_c_power_priority_value[USB_C_POWER_PRIORITY_PERFORMANCE] == value ? 1074 USB_C_POWER_PRIORITY_PERFORMANCE : 1075 USB_C_POWER_PRIORITY_CHARGING; 1076 1077 return 0; 1078 } 1079 1080 static struct attribute *uniwill_attrs[] = { 1081 /* Keyboard-related */ 1082 &dev_attr_fn_lock.attr, 1083 &dev_attr_super_key_enable.attr, 1084 &dev_attr_touchpad_toggle_enable.attr, 1085 /* Lightbar-related */ 1086 &dev_attr_rainbow_animation.attr, 1087 &dev_attr_breathing_in_suspend.attr, 1088 /* Power-management-related */ 1089 &dev_attr_ctgp_offset.attr, 1090 &dev_attr_usb_c_power_priority.attr, 1091 NULL 1092 }; 1093 1094 static umode_t uniwill_attr_is_visible(struct kobject *kobj, struct attribute *attr, int n) 1095 { 1096 struct device *dev = kobj_to_dev(kobj); 1097 struct uniwill_data *data = dev_get_drvdata(dev); 1098 1099 if (attr == &dev_attr_fn_lock.attr) { 1100 if (uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1101 return attr->mode; 1102 } 1103 1104 if (attr == &dev_attr_super_key_enable.attr) { 1105 if (uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 1106 return attr->mode; 1107 } 1108 1109 if (attr == &dev_attr_touchpad_toggle_enable.attr) { 1110 if (uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE)) 1111 return attr->mode; 1112 } 1113 1114 if (attr == &dev_attr_rainbow_animation.attr || 1115 attr == &dev_attr_breathing_in_suspend.attr) { 1116 if (uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR)) 1117 return attr->mode; 1118 } 1119 1120 if (attr == &dev_attr_ctgp_offset.attr) { 1121 if (uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 1122 return attr->mode; 1123 } 1124 1125 if (attr == &dev_attr_usb_c_power_priority.attr) { 1126 if (uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) 1127 return attr->mode; 1128 } 1129 1130 return 0; 1131 } 1132 1133 static const struct attribute_group uniwill_group = { 1134 .is_visible = uniwill_attr_is_visible, 1135 .attrs = uniwill_attrs, 1136 }; 1137 1138 static const struct attribute_group *uniwill_groups[] = { 1139 &uniwill_group, 1140 NULL 1141 }; 1142 1143 static umode_t uniwill_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr, 1144 int channel) 1145 { 1146 const struct uniwill_data *data = drvdata; 1147 unsigned int feature; 1148 1149 switch (type) { 1150 case hwmon_temp: 1151 switch (channel) { 1152 case 0: 1153 feature = UNIWILL_FEATURE_CPU_TEMP; 1154 break; 1155 case 1: 1156 feature = UNIWILL_FEATURE_GPU_TEMP; 1157 break; 1158 default: 1159 return 0; 1160 } 1161 break; 1162 case hwmon_fan: 1163 case hwmon_pwm: 1164 switch (channel) { 1165 case 0: 1166 feature = UNIWILL_FEATURE_PRIMARY_FAN; 1167 break; 1168 case 1: 1169 feature = UNIWILL_FEATURE_SECONDARY_FAN; 1170 break; 1171 default: 1172 return 0; 1173 } 1174 break; 1175 default: 1176 return 0; 1177 } 1178 1179 if (uniwill_device_supports(data, feature)) 1180 return 0444; 1181 1182 return 0; 1183 } 1184 1185 static int uniwill_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, 1186 long *val) 1187 { 1188 struct uniwill_data *data = dev_get_drvdata(dev); 1189 unsigned int value; 1190 __be16 rpm; 1191 int ret; 1192 1193 switch (type) { 1194 case hwmon_temp: 1195 switch (channel) { 1196 case 0: 1197 ret = regmap_read(data->regmap, EC_ADDR_CPU_TEMP, &value); 1198 break; 1199 case 1: 1200 ret = regmap_read(data->regmap, EC_ADDR_GPU_TEMP, &value); 1201 break; 1202 default: 1203 return -EOPNOTSUPP; 1204 } 1205 1206 if (ret < 0) 1207 return ret; 1208 1209 *val = value * MILLIDEGREE_PER_DEGREE; 1210 return 0; 1211 case hwmon_fan: 1212 switch (channel) { 1213 case 0: 1214 ret = regmap_bulk_read(data->regmap, EC_ADDR_MAIN_FAN_RPM_1, &rpm, 1215 sizeof(rpm)); 1216 break; 1217 case 1: 1218 ret = regmap_bulk_read(data->regmap, EC_ADDR_SECOND_FAN_RPM_1, &rpm, 1219 sizeof(rpm)); 1220 break; 1221 default: 1222 return -EOPNOTSUPP; 1223 } 1224 1225 if (ret < 0) 1226 return ret; 1227 1228 *val = be16_to_cpu(rpm); 1229 return 0; 1230 case hwmon_pwm: 1231 switch (channel) { 1232 case 0: 1233 ret = regmap_read(data->regmap, EC_ADDR_PWM_1, &value); 1234 break; 1235 case 1: 1236 ret = regmap_read(data->regmap, EC_ADDR_PWM_2, &value); 1237 break; 1238 default: 1239 return -EOPNOTSUPP; 1240 } 1241 1242 if (ret < 0) 1243 return ret; 1244 1245 *val = fixp_linear_interpolate(0, 0, PWM_MAX, U8_MAX, value); 1246 return 0; 1247 default: 1248 return -EOPNOTSUPP; 1249 } 1250 } 1251 1252 static int uniwill_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, 1253 int channel, const char **str) 1254 { 1255 switch (type) { 1256 case hwmon_temp: 1257 *str = uniwill_temp_labels[channel]; 1258 return 0; 1259 case hwmon_fan: 1260 *str = uniwill_fan_labels[channel]; 1261 return 0; 1262 default: 1263 return -EOPNOTSUPP; 1264 } 1265 } 1266 1267 static const struct hwmon_ops uniwill_ops = { 1268 .is_visible = uniwill_is_visible, 1269 .read = uniwill_read, 1270 .read_string = uniwill_read_string, 1271 }; 1272 1273 static const struct hwmon_channel_info * const uniwill_info[] = { 1274 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 1275 HWMON_CHANNEL_INFO(temp, 1276 HWMON_T_INPUT | HWMON_T_LABEL, 1277 HWMON_T_INPUT | HWMON_T_LABEL), 1278 HWMON_CHANNEL_INFO(fan, 1279 HWMON_F_INPUT | HWMON_F_LABEL, 1280 HWMON_F_INPUT | HWMON_F_LABEL), 1281 HWMON_CHANNEL_INFO(pwm, 1282 HWMON_PWM_INPUT, 1283 HWMON_PWM_INPUT), 1284 NULL 1285 }; 1286 1287 static const struct hwmon_chip_info uniwill_chip_info = { 1288 .ops = &uniwill_ops, 1289 .info = uniwill_info, 1290 }; 1291 1292 static int uniwill_hwmon_init(struct uniwill_data *data) 1293 { 1294 struct device *hdev; 1295 1296 if (!uniwill_device_supports(data, UNIWILL_FEATURE_CPU_TEMP) && 1297 !uniwill_device_supports(data, UNIWILL_FEATURE_GPU_TEMP) && 1298 !uniwill_device_supports(data, UNIWILL_FEATURE_PRIMARY_FAN) && 1299 !uniwill_device_supports(data, UNIWILL_FEATURE_SECONDARY_FAN)) 1300 return 0; 1301 1302 hdev = devm_hwmon_device_register_with_info(data->dev, "uniwill", data, 1303 &uniwill_chip_info, NULL); 1304 1305 return PTR_ERR_OR_ZERO(hdev); 1306 } 1307 1308 static const unsigned int uniwill_led_channel_to_bat_reg[LED_CHANNELS] = { 1309 EC_ADDR_LIGHTBAR_BAT_RED, 1310 EC_ADDR_LIGHTBAR_BAT_GREEN, 1311 EC_ADDR_LIGHTBAR_BAT_BLUE, 1312 }; 1313 1314 static const unsigned int uniwill_led_channel_to_ac_reg[LED_CHANNELS] = { 1315 EC_ADDR_LIGHTBAR_AC_RED, 1316 EC_ADDR_LIGHTBAR_AC_GREEN, 1317 EC_ADDR_LIGHTBAR_AC_BLUE, 1318 }; 1319 1320 static int uniwill_led_brightness_set(struct led_classdev *led_cdev, enum led_brightness brightness) 1321 { 1322 struct led_classdev_mc *led_mc_cdev = lcdev_to_mccdev(led_cdev); 1323 struct uniwill_data *data = container_of(led_mc_cdev, struct uniwill_data, led_mc_cdev); 1324 unsigned int value; 1325 int ret; 1326 1327 ret = led_mc_calc_color_components(led_mc_cdev, brightness); 1328 if (ret < 0) 1329 return ret; 1330 1331 guard(mutex)(&data->led_lock); 1332 1333 for (int i = 0; i < LED_CHANNELS; i++) { 1334 /* Prevent the brightness values from overflowing */ 1335 value = min(LED_MAX_BRIGHTNESS, data->led_mc_subled_info[i].brightness); 1336 ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value); 1337 if (ret < 0) 1338 return ret; 1339 1340 ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value); 1341 if (ret < 0) 1342 return ret; 1343 } 1344 1345 if (brightness) 1346 value = 0; 1347 else 1348 value = LIGHTBAR_S0_OFF; 1349 1350 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S0_OFF, value); 1351 if (ret < 0) 1352 return ret; 1353 1354 return regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_S0_OFF, value); 1355 } 1356 1357 #define LIGHTBAR_MASK (LIGHTBAR_APP_EXISTS | LIGHTBAR_S0_OFF | LIGHTBAR_S3_OFF | LIGHTBAR_WELCOME) 1358 1359 static int uniwill_led_init(struct uniwill_data *data) 1360 { 1361 struct led_init_data init_data = { 1362 .devicename = DRIVER_NAME, 1363 .default_label = "multicolor:" LED_FUNCTION_STATUS, 1364 .devname_mandatory = true, 1365 }; 1366 unsigned int color_indices[3] = { 1367 LED_COLOR_ID_RED, 1368 LED_COLOR_ID_GREEN, 1369 LED_COLOR_ID_BLUE, 1370 }; 1371 unsigned int value; 1372 int ret; 1373 1374 if (!uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR)) 1375 return 0; 1376 1377 ret = devm_mutex_init(data->dev, &data->led_lock); 1378 if (ret < 0) 1379 return ret; 1380 1381 /* 1382 * The EC has separate lightbar settings for AC and battery mode, 1383 * so we have to ensure that both settings are the same. 1384 */ 1385 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 1386 if (ret < 0) 1387 return ret; 1388 1389 value |= LIGHTBAR_APP_EXISTS; 1390 ret = regmap_write(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, value); 1391 if (ret < 0) 1392 return ret; 1393 1394 /* 1395 * The breathing animation during suspend is not supported when 1396 * running on battery power. 1397 */ 1398 value |= LIGHTBAR_S3_OFF; 1399 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_MASK, value); 1400 if (ret < 0) 1401 return ret; 1402 1403 data->led_mc_cdev.led_cdev.color = LED_COLOR_ID_MULTI; 1404 data->led_mc_cdev.led_cdev.max_brightness = LED_MAX_BRIGHTNESS; 1405 data->led_mc_cdev.led_cdev.flags = LED_REJECT_NAME_CONFLICT; 1406 data->led_mc_cdev.led_cdev.brightness_set_blocking = uniwill_led_brightness_set; 1407 1408 if (value & LIGHTBAR_S0_OFF) 1409 data->led_mc_cdev.led_cdev.brightness = 0; 1410 else 1411 data->led_mc_cdev.led_cdev.brightness = LED_MAX_BRIGHTNESS; 1412 1413 for (int i = 0; i < LED_CHANNELS; i++) { 1414 data->led_mc_subled_info[i].color_index = color_indices[i]; 1415 1416 ret = regmap_read(data->regmap, uniwill_led_channel_to_ac_reg[i], &value); 1417 if (ret < 0) 1418 return ret; 1419 1420 /* 1421 * Make sure that the initial intensity value is not greater than 1422 * the maximum brightness. 1423 */ 1424 value = min(LED_MAX_BRIGHTNESS, value); 1425 ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value); 1426 if (ret < 0) 1427 return ret; 1428 1429 ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value); 1430 if (ret < 0) 1431 return ret; 1432 1433 data->led_mc_subled_info[i].intensity = value; 1434 data->led_mc_subled_info[i].channel = i; 1435 } 1436 1437 data->led_mc_cdev.subled_info = data->led_mc_subled_info; 1438 data->led_mc_cdev.num_colors = LED_CHANNELS; 1439 1440 return devm_led_classdev_multicolor_register_ext(data->dev, &data->led_mc_cdev, 1441 &init_data); 1442 } 1443 1444 static unsigned int uniwill_sanitize_battery_threshold(unsigned int value) 1445 { 1446 /* 0 means "charging threshold not active" */ 1447 if (!value) 1448 return 100; 1449 1450 /* Guard against invalid values */ 1451 return min(value, 100); 1452 } 1453 1454 static int uniwill_read_charge_type(struct uniwill_data *data, enum power_supply_charge_type *type) 1455 { 1456 unsigned int value; 1457 int ret; 1458 1459 ret = regmap_read(data->regmap, EC_ADDR_OEM_4, &value); 1460 if (ret < 0) 1461 return ret; 1462 1463 switch (FIELD_GET(CHARGING_PROFILE_MASK, value)) { 1464 case CHARGING_PROFILE_HIGH_CAPACITY: 1465 *type = POWER_SUPPLY_CHARGE_TYPE_STANDARD; 1466 return 0; 1467 case CHARGING_PROFILE_BALANCED: 1468 *type = POWER_SUPPLY_CHARGE_TYPE_LONGLIFE; 1469 return 0; 1470 case CHARGING_PROFILE_STATIONARY: 1471 *type = POWER_SUPPLY_CHARGE_TYPE_TRICKLE; 1472 return 0; 1473 default: 1474 return -EPROTO; 1475 } 1476 } 1477 1478 static int uniwill_get_property(struct power_supply *psy, const struct power_supply_ext *ext, 1479 void *drvdata, enum power_supply_property psp, 1480 union power_supply_propval *val) 1481 { 1482 struct uniwill_data *data = drvdata; 1483 union power_supply_propval prop; 1484 unsigned int regval; 1485 int ret; 1486 1487 switch (psp) { 1488 case POWER_SUPPLY_PROP_CHARGE_TYPES: 1489 /* 1490 * We need to use the cached value here because the charging mode 1491 * reported by the EC might temporarily change when a external power 1492 * source has been connected. 1493 */ 1494 mutex_lock(&data->charge_type_lock); 1495 val->intval = data->last_charge_type; 1496 mutex_unlock(&data->charge_type_lock); 1497 return 0; 1498 case POWER_SUPPLY_PROP_HEALTH: 1499 ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_PRESENT, &prop); 1500 if (ret < 0) 1501 return ret; 1502 1503 if (!prop.intval) { 1504 val->intval = POWER_SUPPLY_HEALTH_NO_BATTERY; 1505 return 0; 1506 } 1507 1508 ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_STATUS, &prop); 1509 if (ret < 0) 1510 return ret; 1511 1512 if (prop.intval == POWER_SUPPLY_STATUS_UNKNOWN) { 1513 val->intval = POWER_SUPPLY_HEALTH_UNKNOWN; 1514 return 0; 1515 } 1516 1517 ret = regmap_read(data->regmap, EC_ADDR_BAT_ALERT, ®val); 1518 if (ret < 0) 1519 return ret; 1520 1521 if (regval) { 1522 /* Charging issue */ 1523 val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; 1524 return 0; 1525 } 1526 1527 val->intval = POWER_SUPPLY_HEALTH_GOOD; 1528 return 0; 1529 case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: 1530 ret = regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, ®val); 1531 if (ret < 0) 1532 return ret; 1533 1534 regval = FIELD_GET(CHARGE_CTRL_MASK, regval); 1535 val->intval = uniwill_sanitize_battery_threshold(regval); 1536 return 0; 1537 default: 1538 return -EINVAL; 1539 } 1540 } 1541 1542 static int uniwill_write_charge_type(struct uniwill_data *data, enum power_supply_charge_type type) 1543 { 1544 unsigned int value; 1545 1546 switch (type) { 1547 case POWER_SUPPLY_CHARGE_TYPE_TRICKLE: 1548 value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_STATIONARY); 1549 break; 1550 case POWER_SUPPLY_CHARGE_TYPE_STANDARD: 1551 value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_HIGH_CAPACITY); 1552 break; 1553 case POWER_SUPPLY_CHARGE_TYPE_LONGLIFE: 1554 value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_BALANCED); 1555 break; 1556 default: 1557 return -EINVAL; 1558 } 1559 1560 return regmap_update_bits(data->regmap, EC_ADDR_OEM_4, CHARGING_PROFILE_MASK, value); 1561 } 1562 1563 static int uniwill_restore_charge_type(struct uniwill_data *data) 1564 { 1565 guard(mutex)(&data->charge_type_lock); 1566 1567 return uniwill_write_charge_type(data, data->last_charge_type); 1568 } 1569 1570 static int uniwill_set_property(struct power_supply *psy, const struct power_supply_ext *ext, 1571 void *drvdata, enum power_supply_property psp, 1572 const union power_supply_propval *val) 1573 { 1574 struct uniwill_data *data = drvdata; 1575 int ret; 1576 1577 switch (psp) { 1578 case POWER_SUPPLY_PROP_CHARGE_TYPES: 1579 mutex_lock(&data->charge_type_lock); 1580 1581 ret = uniwill_write_charge_type(data, val->intval); 1582 if (ret >= 0) 1583 data->last_charge_type = val->intval; 1584 1585 mutex_unlock(&data->charge_type_lock); 1586 1587 return ret; 1588 case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: 1589 if (val->intval < 0 || val->intval > 100) 1590 return -EINVAL; 1591 1592 return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK, 1593 max(val->intval, 1)); 1594 default: 1595 return -EINVAL; 1596 } 1597 } 1598 1599 static int uniwill_property_is_writeable(struct power_supply *psy, 1600 const struct power_supply_ext *ext, void *drvdata, 1601 enum power_supply_property psp) 1602 { 1603 switch (psp) { 1604 case POWER_SUPPLY_PROP_CHARGE_TYPES: 1605 case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: 1606 return true; 1607 default: 1608 return false; 1609 } 1610 } 1611 1612 static const enum power_supply_property uniwill_charge_limit_properties[] = { 1613 POWER_SUPPLY_PROP_HEALTH, 1614 POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, 1615 }; 1616 1617 static const struct power_supply_ext uniwill_charge_limit_extension = { 1618 .name = DRIVER_NAME, 1619 .properties = uniwill_charge_limit_properties, 1620 .num_properties = ARRAY_SIZE(uniwill_charge_limit_properties), 1621 .get_property = uniwill_get_property, 1622 .set_property = uniwill_set_property, 1623 .property_is_writeable = uniwill_property_is_writeable, 1624 }; 1625 1626 static const enum power_supply_property uniwill_charge_modes_properties[] = { 1627 POWER_SUPPLY_PROP_CHARGE_TYPES, 1628 POWER_SUPPLY_PROP_HEALTH, 1629 }; 1630 1631 static const struct power_supply_ext uniwill_charge_modes_extension = { 1632 .name = DRIVER_NAME, 1633 .charge_types = BIT(POWER_SUPPLY_CHARGE_TYPE_TRICKLE) | 1634 BIT(POWER_SUPPLY_CHARGE_TYPE_STANDARD) | 1635 BIT(POWER_SUPPLY_CHARGE_TYPE_LONGLIFE), 1636 .properties = uniwill_charge_modes_properties, 1637 .num_properties = ARRAY_SIZE(uniwill_charge_modes_properties), 1638 .get_property = uniwill_get_property, 1639 .set_property = uniwill_set_property, 1640 .property_is_writeable = uniwill_property_is_writeable, 1641 }; 1642 1643 static int uniwill_add_battery(struct power_supply *battery, struct acpi_battery_hook *hook) 1644 { 1645 struct uniwill_data *data = container_of(hook, struct uniwill_data, hook); 1646 struct uniwill_battery_entry *entry; 1647 int ret; 1648 1649 entry = kzalloc_obj(*entry); 1650 if (!entry) 1651 return -ENOMEM; 1652 1653 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) 1654 ret = power_supply_register_extension(battery, &uniwill_charge_limit_extension, 1655 data->dev, data); 1656 else 1657 ret = power_supply_register_extension(battery, &uniwill_charge_modes_extension, 1658 data->dev, data); 1659 1660 if (ret < 0) { 1661 kfree(entry); 1662 return ret; 1663 } 1664 1665 guard(mutex)(&data->battery_lock); 1666 1667 entry->battery = battery; 1668 list_add(&entry->head, &data->batteries); 1669 1670 return 0; 1671 } 1672 1673 static int uniwill_remove_battery(struct power_supply *battery, struct acpi_battery_hook *hook) 1674 { 1675 struct uniwill_data *data = container_of(hook, struct uniwill_data, hook); 1676 struct uniwill_battery_entry *entry, *tmp; 1677 1678 scoped_guard(mutex, &data->battery_lock) { 1679 list_for_each_entry_safe(entry, tmp, &data->batteries, head) { 1680 if (entry->battery == battery) { 1681 list_del(&entry->head); 1682 kfree(entry); 1683 break; 1684 } 1685 } 1686 } 1687 1688 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) 1689 power_supply_unregister_extension(battery, &uniwill_charge_limit_extension); 1690 else 1691 power_supply_unregister_extension(battery, &uniwill_charge_modes_extension); 1692 1693 return 0; 1694 } 1695 1696 static int uniwill_battery_init(struct uniwill_data *data) 1697 { 1698 unsigned int value, threshold, sanitized; 1699 int ret; 1700 1701 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) { 1702 ret = regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &value); 1703 if (ret < 0) 1704 return ret; 1705 1706 /* 1707 * The charge control threshold might be initialized with 0 by 1708 * the EC to signal that said threshold is uninitialized. We thus 1709 * need to replace this placeholder value with a valid one (100) 1710 * to signal that we want to take control of battery charging. 1711 * For the sake of completeness we also apply this to other 1712 * invalid threshold values. 1713 */ 1714 threshold = FIELD_GET(CHARGE_CTRL_MASK, value); 1715 sanitized = uniwill_sanitize_battery_threshold(threshold); 1716 if (threshold != sanitized) { 1717 FIELD_MODIFY(CHARGE_CTRL_MASK, &value, sanitized); 1718 ret = regmap_write(data->regmap, EC_ADDR_CHARGE_CTRL, value); 1719 if (ret < 0) 1720 return ret; 1721 } 1722 } else if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) { 1723 ret = devm_mutex_init(data->dev, &data->charge_type_lock); 1724 if (ret < 0) 1725 return ret; 1726 1727 ret = uniwill_read_charge_type(data, &data->last_charge_type); 1728 if (ret < 0) 1729 return ret; 1730 } else { 1731 return 0; 1732 } 1733 1734 ret = devm_mutex_init(data->dev, &data->battery_lock); 1735 if (ret < 0) 1736 return ret; 1737 1738 INIT_LIST_HEAD(&data->batteries); 1739 data->hook.name = "Uniwill Battery Extension"; 1740 data->hook.add_battery = uniwill_add_battery; 1741 data->hook.remove_battery = uniwill_remove_battery; 1742 1743 return devm_battery_hook_register(data->dev, &data->hook); 1744 } 1745 1746 static int uniwill_notifier_call(struct notifier_block *nb, unsigned long action, void *dummy) 1747 { 1748 struct uniwill_data *data = container_of(nb, struct uniwill_data, nb); 1749 struct uniwill_battery_entry *entry; 1750 int ret; 1751 1752 switch (action) { 1753 case UNIWILL_OSD_BATTERY_ALERT: 1754 if (!uniwill_device_supports_any(data, 1755 UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT | 1756 UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) 1757 return NOTIFY_DONE; 1758 1759 mutex_lock(&data->battery_lock); 1760 list_for_each_entry(entry, &data->batteries, head) { 1761 power_supply_changed(entry->battery); 1762 } 1763 mutex_unlock(&data->battery_lock); 1764 1765 return NOTIFY_OK; 1766 case UNIWILL_OSD_DC_ADAPTER_CHANGED: 1767 if (!uniwill_device_supports_any(data, 1768 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 1769 UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) 1770 return NOTIFY_DONE; 1771 1772 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) { 1773 ret = uniwill_restore_charge_type(data); 1774 if (ret < 0) 1775 return notifier_from_errno(ret); 1776 } 1777 1778 if (uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) { 1779 ret = usb_c_power_priority_restore(data); 1780 if (ret < 0) 1781 return notifier_from_errno(ret); 1782 } 1783 1784 return NOTIFY_OK; 1785 case UNIWILL_OSD_FN_LOCK: 1786 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1787 return NOTIFY_DONE; 1788 1789 sysfs_notify(&data->dev->kobj, NULL, "fn_lock"); 1790 1791 return NOTIFY_OK; 1792 default: 1793 mutex_lock(&data->input_lock); 1794 sparse_keymap_report_event(data->input_device, action, 1, true); 1795 mutex_unlock(&data->input_lock); 1796 1797 return NOTIFY_OK; 1798 } 1799 } 1800 1801 static int uniwill_input_init(struct uniwill_data *data) 1802 { 1803 int ret; 1804 1805 ret = devm_mutex_init(data->dev, &data->input_lock); 1806 if (ret < 0) 1807 return ret; 1808 1809 data->input_device = devm_input_allocate_device(data->dev); 1810 if (!data->input_device) 1811 return -ENOMEM; 1812 1813 ret = sparse_keymap_setup(data->input_device, uniwill_keymap, NULL); 1814 if (ret < 0) 1815 return ret; 1816 1817 data->input_device->name = "Uniwill WMI hotkeys"; 1818 data->input_device->phys = "wmi/input0"; 1819 data->input_device->id.bustype = BUS_HOST; 1820 ret = input_register_device(data->input_device); 1821 if (ret < 0) 1822 return ret; 1823 1824 data->nb.notifier_call = uniwill_notifier_call; 1825 1826 return devm_uniwill_wmi_register_notifier(data->dev, &data->nb); 1827 } 1828 1829 static void uniwill_disable_manual_control(void *context) 1830 { 1831 struct uniwill_data *data = context; 1832 1833 regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1834 } 1835 1836 static int uniwill_ec_init(struct uniwill_data *data) 1837 { 1838 unsigned int value; 1839 int ret; 1840 1841 ret = regmap_read(data->regmap, EC_ADDR_PROJECT_ID, &value); 1842 if (ret < 0) 1843 return ret; 1844 1845 dev_dbg(data->dev, "Project ID: %u\n", value); 1846 1847 ret = regmap_set_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1848 if (ret < 0) 1849 return ret; 1850 1851 return devm_add_action_or_reset(data->dev, uniwill_disable_manual_control, data); 1852 } 1853 1854 static int uniwill_probe(struct platform_device *pdev) 1855 { 1856 struct uniwill_data *data; 1857 struct regmap *regmap; 1858 acpi_handle handle; 1859 int ret; 1860 1861 handle = ACPI_HANDLE(&pdev->dev); 1862 if (!handle) 1863 return -ENODEV; 1864 1865 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 1866 if (!data) 1867 return -ENOMEM; 1868 1869 data->dev = &pdev->dev; 1870 data->handle = handle; 1871 platform_set_drvdata(pdev, data); 1872 1873 regmap = devm_regmap_init(&pdev->dev, &uniwill_ec_bus, data, &uniwill_ec_config); 1874 if (IS_ERR(regmap)) 1875 return PTR_ERR(regmap); 1876 1877 data->regmap = regmap; 1878 1879 ret = devm_mutex_init(&pdev->dev, &data->super_key_lock); 1880 if (ret < 0) 1881 return ret; 1882 1883 ret = uniwill_ec_init(data); 1884 if (ret < 0) 1885 return ret; 1886 1887 data->features = device_descriptor.features; 1888 1889 /* 1890 * Some devices might need to perform some device-specific initialization steps 1891 * before the supported features are initialized. Because of this we have to call 1892 * this callback just after the EC itself was initialized. 1893 */ 1894 if (device_descriptor.probe) { 1895 ret = device_descriptor.probe(data); 1896 if (ret < 0) 1897 return ret; 1898 } 1899 1900 ret = uniwill_battery_init(data); 1901 if (ret < 0) 1902 return ret; 1903 1904 ret = uniwill_led_init(data); 1905 if (ret < 0) 1906 return ret; 1907 1908 ret = uniwill_hwmon_init(data); 1909 if (ret < 0) 1910 return ret; 1911 1912 ret = uniwill_nvidia_ctgp_init(data); 1913 if (ret < 0) 1914 return ret; 1915 1916 ret = usb_c_power_priority_init(data); 1917 if (ret < 0) 1918 return ret; 1919 1920 return uniwill_input_init(data); 1921 } 1922 1923 static void uniwill_shutdown(struct platform_device *pdev) 1924 { 1925 struct uniwill_data *data = platform_get_drvdata(pdev); 1926 1927 regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1928 } 1929 1930 static int uniwill_suspend_fn_lock(struct uniwill_data *data) 1931 { 1932 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1933 return 0; 1934 1935 /* 1936 * EC_ADDR_BIOS_OEM is marked as volatile, so we have to restore it 1937 * ourselves. 1938 */ 1939 return uniwill_read_fn_lock(data, &data->last_fn_lock_state); 1940 } 1941 1942 static int uniwill_suspend_super_key(struct uniwill_data *data) 1943 { 1944 if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 1945 return 0; 1946 1947 /* 1948 * EC_ADDR_SWITCH_STATUS is marked as volatile, so we have to restore it 1949 * ourselves. 1950 */ 1951 return uniwill_read_super_key_enable(data, &data->last_super_key_enable_state); 1952 } 1953 1954 static int uniwill_suspend_touchpad_toggle(struct uniwill_data *data) 1955 { 1956 if (!uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE)) 1957 return 0; 1958 1959 /* 1960 * EC_ADDR_OEM_4 is marked as volatile, so we have to restore it 1961 * ourselves. 1962 */ 1963 return uniwill_read_touchpad_toggle_enable(data, &data->last_touchpad_toggle_enable_state); 1964 } 1965 1966 static int uniwill_suspend_battery(struct uniwill_data *data) 1967 { 1968 if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) 1969 return 0; 1970 1971 /* 1972 * Save the current charge limit in order to restore it during resume. 1973 * We cannot use the regmap code for that since this register needs to 1974 * be declared as volatile due to CHARGE_CTRL_REACHED. 1975 */ 1976 return regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &data->last_charge_ctrl); 1977 } 1978 1979 static int uniwill_suspend_nvidia_ctgp(struct uniwill_data *data) 1980 { 1981 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 1982 return 0; 1983 1984 return regmap_clear_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 1985 CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 1986 } 1987 1988 static int uniwill_suspend(struct device *dev) 1989 { 1990 struct uniwill_data *data = dev_get_drvdata(dev); 1991 int ret; 1992 1993 ret = uniwill_suspend_fn_lock(data); 1994 if (ret < 0) 1995 return ret; 1996 1997 ret = uniwill_suspend_super_key(data); 1998 if (ret < 0) 1999 return ret; 2000 2001 ret = uniwill_suspend_touchpad_toggle(data); 2002 if (ret < 0) 2003 return ret; 2004 2005 ret = uniwill_suspend_battery(data); 2006 if (ret < 0) 2007 return ret; 2008 2009 ret = uniwill_suspend_nvidia_ctgp(data); 2010 if (ret < 0) 2011 return ret; 2012 2013 regcache_cache_only(data->regmap, true); 2014 regcache_mark_dirty(data->regmap); 2015 2016 return 0; 2017 } 2018 2019 static int uniwill_resume_fn_lock(struct uniwill_data *data) 2020 { 2021 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 2022 return 0; 2023 2024 return uniwill_write_fn_lock(data, data->last_fn_lock_state); 2025 } 2026 2027 static int uniwill_resume_super_key(struct uniwill_data *data) 2028 { 2029 if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 2030 return 0; 2031 2032 return uniwill_write_super_key_enable(data, data->last_super_key_enable_state); 2033 } 2034 2035 static int uniwill_resume_touchpad_toggle(struct uniwill_data *data) 2036 { 2037 if (!uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE)) 2038 return 0; 2039 2040 return uniwill_write_touchpad_toggle_enable(data, data->last_touchpad_toggle_enable_state); 2041 } 2042 2043 static int uniwill_resume_battery(struct uniwill_data *data) 2044 { 2045 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) 2046 return uniwill_restore_charge_type(data); 2047 2048 if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) 2049 return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK, 2050 data->last_charge_ctrl); 2051 2052 return 0; 2053 } 2054 2055 static int uniwill_resume_nvidia_ctgp(struct uniwill_data *data) 2056 { 2057 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 2058 return 0; 2059 2060 return regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 2061 CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 2062 } 2063 2064 static int uniwill_resume_usb_c_power_priority(struct uniwill_data *data) 2065 { 2066 if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) 2067 return 0; 2068 2069 return usb_c_power_priority_restore(data); 2070 } 2071 2072 static int uniwill_resume(struct device *dev) 2073 { 2074 struct uniwill_data *data = dev_get_drvdata(dev); 2075 int ret; 2076 2077 regcache_cache_only(data->regmap, false); 2078 2079 ret = regcache_sync(data->regmap); 2080 if (ret < 0) 2081 return ret; 2082 2083 ret = uniwill_resume_fn_lock(data); 2084 if (ret < 0) 2085 return ret; 2086 2087 ret = uniwill_resume_super_key(data); 2088 if (ret < 0) 2089 return ret; 2090 2091 ret = uniwill_resume_touchpad_toggle(data); 2092 if (ret < 0) 2093 return ret; 2094 2095 ret = uniwill_resume_battery(data); 2096 if (ret < 0) 2097 return ret; 2098 2099 ret = uniwill_resume_nvidia_ctgp(data); 2100 if (ret < 0) 2101 return ret; 2102 2103 return uniwill_resume_usb_c_power_priority(data); 2104 } 2105 2106 static DEFINE_SIMPLE_DEV_PM_OPS(uniwill_pm_ops, uniwill_suspend, uniwill_resume); 2107 2108 /* 2109 * We only use the DMI table for auoloading because the ACPI device itself 2110 * does not guarantee that the underlying EC implementation is supported. 2111 */ 2112 static const struct acpi_device_id uniwill_id_table[] = { 2113 { "INOU0000" }, 2114 { }, 2115 }; 2116 2117 static struct platform_driver uniwill_driver = { 2118 .driver = { 2119 .name = DRIVER_NAME, 2120 .dev_groups = uniwill_groups, 2121 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 2122 .acpi_match_table = uniwill_id_table, 2123 .pm = pm_sleep_ptr(&uniwill_pm_ops), 2124 }, 2125 .probe = uniwill_probe, 2126 .shutdown = uniwill_shutdown, 2127 }; 2128 2129 static struct uniwill_device_descriptor lapqc71a_lapqc71b_descriptor __initdata = { 2130 .features = UNIWILL_FEATURE_SUPER_KEY | 2131 UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT | 2132 UNIWILL_FEATURE_CPU_TEMP | 2133 UNIWILL_FEATURE_GPU_TEMP | 2134 UNIWILL_FEATURE_PRIMARY_FAN | 2135 UNIWILL_FEATURE_SECONDARY_FAN, 2136 }; 2137 2138 static struct uniwill_device_descriptor lapac71h_descriptor __initdata = { 2139 .features = UNIWILL_FEATURE_FN_LOCK | 2140 UNIWILL_FEATURE_SUPER_KEY | 2141 UNIWILL_FEATURE_TOUCHPAD_TOGGLE | 2142 UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT | 2143 UNIWILL_FEATURE_CPU_TEMP | 2144 UNIWILL_FEATURE_GPU_TEMP | 2145 UNIWILL_FEATURE_PRIMARY_FAN | 2146 UNIWILL_FEATURE_SECONDARY_FAN, 2147 }; 2148 2149 static struct uniwill_device_descriptor lapkc71f_descriptor __initdata = { 2150 .features = UNIWILL_FEATURE_FN_LOCK | 2151 UNIWILL_FEATURE_SUPER_KEY | 2152 UNIWILL_FEATURE_TOUCHPAD_TOGGLE | 2153 UNIWILL_FEATURE_LIGHTBAR | 2154 UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT | 2155 UNIWILL_FEATURE_CPU_TEMP | 2156 UNIWILL_FEATURE_GPU_TEMP | 2157 UNIWILL_FEATURE_PRIMARY_FAN | 2158 UNIWILL_FEATURE_SECONDARY_FAN, 2159 }; 2160 2161 /* 2162 * The featuresets below reflect somewhat chronological changes: 2163 * 1 -> 2: UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL is added to the EC firmware. 2164 * 2 -> 3: UNIWILL_FEATURE_USB_C_POWER_PRIORITY is removed from the EC firmware. 2165 * Some devices might divert from this timeline. 2166 */ 2167 2168 static struct uniwill_device_descriptor tux_featureset_1_descriptor __initdata = { 2169 .features = UNIWILL_FEATURE_FN_LOCK | 2170 UNIWILL_FEATURE_SUPER_KEY | 2171 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2172 UNIWILL_FEATURE_CPU_TEMP | 2173 UNIWILL_FEATURE_PRIMARY_FAN | 2174 UNIWILL_FEATURE_SECONDARY_FAN | 2175 UNIWILL_FEATURE_USB_C_POWER_PRIORITY, 2176 }; 2177 2178 static struct uniwill_device_descriptor tux_featureset_1_nvidia_descriptor __initdata = { 2179 .features = UNIWILL_FEATURE_FN_LOCK | 2180 UNIWILL_FEATURE_SUPER_KEY | 2181 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2182 UNIWILL_FEATURE_CPU_TEMP | 2183 UNIWILL_FEATURE_GPU_TEMP | 2184 UNIWILL_FEATURE_PRIMARY_FAN | 2185 UNIWILL_FEATURE_SECONDARY_FAN | 2186 UNIWILL_FEATURE_USB_C_POWER_PRIORITY, 2187 }; 2188 2189 static struct uniwill_device_descriptor tux_featureset_2_nvidia_descriptor __initdata = { 2190 .features = UNIWILL_FEATURE_FN_LOCK | 2191 UNIWILL_FEATURE_SUPER_KEY | 2192 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2193 UNIWILL_FEATURE_CPU_TEMP | 2194 UNIWILL_FEATURE_GPU_TEMP | 2195 UNIWILL_FEATURE_PRIMARY_FAN | 2196 UNIWILL_FEATURE_SECONDARY_FAN | 2197 UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL | 2198 UNIWILL_FEATURE_USB_C_POWER_PRIORITY, 2199 }; 2200 2201 static struct uniwill_device_descriptor tux_featureset_3_descriptor __initdata = { 2202 .features = UNIWILL_FEATURE_FN_LOCK | 2203 UNIWILL_FEATURE_SUPER_KEY | 2204 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2205 UNIWILL_FEATURE_CPU_TEMP | 2206 UNIWILL_FEATURE_PRIMARY_FAN | 2207 UNIWILL_FEATURE_SECONDARY_FAN, 2208 }; 2209 2210 static struct uniwill_device_descriptor tux_featureset_3_nvidia_descriptor __initdata = { 2211 .features = UNIWILL_FEATURE_FN_LOCK | 2212 UNIWILL_FEATURE_SUPER_KEY | 2213 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2214 UNIWILL_FEATURE_CPU_TEMP | 2215 UNIWILL_FEATURE_GPU_TEMP | 2216 UNIWILL_FEATURE_PRIMARY_FAN | 2217 UNIWILL_FEATURE_SECONDARY_FAN | 2218 UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL, 2219 }; 2220 2221 static int phxtxx1_probe(struct uniwill_data *data) 2222 { 2223 unsigned int value; 2224 int ret; 2225 2226 ret = regmap_read(data->regmap, EC_ADDR_PROJECT_ID, &value); 2227 if (ret < 0) 2228 return ret; 2229 2230 if (value == PROJECT_ID_PH4TRX1 || value == PROJECT_ID_PH6TRX1) 2231 data->features |= UNIWILL_FEATURE_SECONDARY_FAN; 2232 2233 return 0; 2234 }; 2235 2236 static struct uniwill_device_descriptor phxtxx1_descriptor __initdata = { 2237 .features = UNIWILL_FEATURE_FN_LOCK | 2238 UNIWILL_FEATURE_SUPER_KEY | 2239 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2240 UNIWILL_FEATURE_CPU_TEMP | 2241 UNIWILL_FEATURE_PRIMARY_FAN | 2242 UNIWILL_FEATURE_USB_C_POWER_PRIORITY, 2243 .probe = phxtxx1_probe, 2244 }; 2245 2246 static int phxarx1_phxaqf1_probe(struct uniwill_data *data) 2247 { 2248 unsigned int value; 2249 int ret; 2250 2251 ret = regmap_read(data->regmap, EC_ADDR_SYSTEM_ID, &value); 2252 if (ret < 0) 2253 return ret; 2254 2255 if (value & HAS_GPU) 2256 data->features |= UNIWILL_FEATURE_GPU_TEMP | 2257 UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL; 2258 2259 return 0; 2260 }; 2261 2262 static struct uniwill_device_descriptor phxarx1_phxaqf1_descriptor __initdata = { 2263 .features = UNIWILL_FEATURE_FN_LOCK | 2264 UNIWILL_FEATURE_SUPER_KEY | 2265 UNIWILL_FEATURE_BATTERY_CHARGE_MODES | 2266 UNIWILL_FEATURE_CPU_TEMP | 2267 UNIWILL_FEATURE_PRIMARY_FAN | 2268 UNIWILL_FEATURE_SECONDARY_FAN | 2269 UNIWILL_FEATURE_USB_C_POWER_PRIORITY, 2270 .probe = phxarx1_phxaqf1_probe, 2271 }; 2272 2273 static struct uniwill_device_descriptor pf5pu1g_descriptor __initdata = { 2274 .features = UNIWILL_FEATURE_FN_LOCK | 2275 UNIWILL_FEATURE_SUPER_KEY | 2276 UNIWILL_FEATURE_CPU_TEMP | 2277 UNIWILL_FEATURE_PRIMARY_FAN, 2278 }; 2279 2280 static const struct dmi_system_id uniwill_dmi_table[] __initconst = { 2281 { 2282 .ident = "XMG FUSION 15 (L19)", 2283 .matches = { 2284 DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"), 2285 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71A"), 2286 }, 2287 .driver_data = &lapqc71a_lapqc71b_descriptor, 2288 }, 2289 { 2290 .ident = "XMG FUSION 15 (L19)", 2291 .matches = { 2292 DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"), 2293 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71B"), 2294 }, 2295 .driver_data = &lapqc71a_lapqc71b_descriptor, 2296 }, 2297 { 2298 .ident = "XMG FUSION 15 (L19)", 2299 .matches = { 2300 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2301 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71A"), 2302 }, 2303 .driver_data = &lapqc71a_lapqc71b_descriptor, 2304 }, 2305 { 2306 .ident = "XMG FUSION 15 (L19)", 2307 .matches = { 2308 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2309 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71B"), 2310 }, 2311 .driver_data = &lapqc71a_lapqc71b_descriptor, 2312 }, 2313 { 2314 .ident = "Intel NUC x15", 2315 .matches = { 2316 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"), 2317 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPAC71H"), 2318 }, 2319 .driver_data = &lapac71h_descriptor, 2320 }, 2321 { 2322 .ident = "Intel NUC x15", 2323 .matches = { 2324 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"), 2325 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPKC71F"), 2326 }, 2327 .driver_data = &lapkc71f_descriptor, 2328 }, 2329 { 2330 .ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel", 2331 .matches = { 2332 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2333 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTxX1"), 2334 }, 2335 .driver_data = &phxtxx1_descriptor, 2336 }, 2337 { 2338 .ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel", 2339 .matches = { 2340 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2341 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTQx1"), 2342 }, 2343 .driver_data = &tux_featureset_2_nvidia_descriptor, 2344 }, 2345 { 2346 .ident = "TUXEDO InfinityBook Pro 14/16 Gen7 Intel", 2347 .matches = { 2348 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2349 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxARX1_PHxAQF1"), 2350 }, 2351 .driver_data = &phxarx1_phxaqf1_descriptor, 2352 }, 2353 { 2354 .ident = "TUXEDO InfinityBook Pro 16 Gen7 Intel/Commodore Omnia-Book Pro Gen 7", 2355 .matches = { 2356 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2357 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6AG01_PH6AQ71_PH6AQI1"), 2358 }, 2359 .driver_data = &tux_featureset_2_nvidia_descriptor, 2360 }, 2361 { 2362 .ident = "TUXEDO InfinityBook Pro 14/16 Gen8 Intel/Commodore Omnia-Book Pro Gen 8", 2363 .matches = { 2364 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2365 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PRX1_PH6PRX1"), 2366 }, 2367 .driver_data = &tux_featureset_1_descriptor, 2368 }, 2369 { 2370 .ident = "TUXEDO InfinityBook Pro 14 Gen8 Intel/Commodore Omnia-Book Pro Gen 8", 2371 .matches = { 2372 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2373 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PG31"), 2374 }, 2375 .driver_data = &tux_featureset_2_nvidia_descriptor, 2376 }, 2377 { 2378 .ident = "TUXEDO InfinityBook Pro 16 Gen8 Intel", 2379 .matches = { 2380 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2381 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6PG01_PH6PG71"), 2382 }, 2383 .driver_data = &tux_featureset_2_nvidia_descriptor, 2384 }, 2385 { 2386 .ident = "TUXEDO InfinityBook Pro 14/15 Gen9 AMD", 2387 .matches = { 2388 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2389 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxHRXx"), 2390 }, 2391 .driver_data = &tux_featureset_3_descriptor, 2392 }, 2393 { 2394 .ident = "TUXEDO InfinityBook Pro 14/15 Gen9 Intel/Commodore Omnia-Book 15 Gen9", 2395 .matches = { 2396 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2397 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxMRXx"), 2398 }, 2399 .driver_data = &tux_featureset_3_descriptor, 2400 }, 2401 { 2402 .ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD", 2403 .matches = { 2404 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2405 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxHP4NAx"), 2406 }, 2407 .driver_data = &tux_featureset_3_descriptor, 2408 }, 2409 { 2410 .ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD", 2411 .matches = { 2412 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2413 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxKK4NAx_XxSP4NAx"), 2414 }, 2415 .driver_data = &tux_featureset_3_descriptor, 2416 }, 2417 { 2418 .ident = "TUXEDO InfinityBook Pro 15 Gen10 Intel", 2419 .matches = { 2420 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2421 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxAR4NAx"), 2422 }, 2423 .driver_data = &tux_featureset_3_descriptor, 2424 }, 2425 { 2426 .ident = "TUXEDO InfinityBook Max 15 Gen10 AMD", 2427 .matches = { 2428 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2429 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5KK45xS_X5SP45xS"), 2430 }, 2431 .driver_data = &tux_featureset_3_nvidia_descriptor, 2432 }, 2433 { 2434 .ident = "TUXEDO InfinityBook Max 16 Gen10 AMD", 2435 .matches = { 2436 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2437 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6HP45xU"), 2438 }, 2439 .driver_data = &tux_featureset_3_nvidia_descriptor, 2440 }, 2441 { 2442 .ident = "TUXEDO InfinityBook Max 16 Gen10 AMD", 2443 .matches = { 2444 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2445 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6KK45xU_X6SP45xU"), 2446 }, 2447 .driver_data = &tux_featureset_3_nvidia_descriptor, 2448 }, 2449 { 2450 .ident = "TUXEDO InfinityBook Max 15 Gen10 Intel", 2451 .matches = { 2452 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2453 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5AR45xS"), 2454 }, 2455 .driver_data = &tux_featureset_3_nvidia_descriptor, 2456 }, 2457 { 2458 .ident = "TUXEDO InfinityBook Max 16 Gen10 Intel", 2459 .matches = { 2460 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2461 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR55xU"), 2462 }, 2463 .driver_data = &tux_featureset_3_nvidia_descriptor, 2464 }, 2465 { 2466 .ident = "TUXEDO Polaris 15 Gen1 AMD", 2467 .matches = { 2468 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2469 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A1650TI"), 2470 }, 2471 .driver_data = &tux_featureset_1_nvidia_descriptor, 2472 }, 2473 { 2474 .ident = "TUXEDO Polaris 15 Gen1 AMD", 2475 .matches = { 2476 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2477 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A2060"), 2478 }, 2479 .driver_data = &tux_featureset_1_nvidia_descriptor, 2480 }, 2481 { 2482 .ident = "TUXEDO Polaris 17 Gen1 AMD", 2483 .matches = { 2484 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2485 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A1650TI"), 2486 }, 2487 .driver_data = &tux_featureset_1_nvidia_descriptor, 2488 }, 2489 { 2490 .ident = "TUXEDO Polaris 17 Gen1 AMD", 2491 .matches = { 2492 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2493 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A2060"), 2494 }, 2495 .driver_data = &tux_featureset_1_nvidia_descriptor, 2496 }, 2497 { 2498 .ident = "TUXEDO Polaris 15 Gen1 Intel", 2499 .matches = { 2500 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2501 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I1650TI"), 2502 }, 2503 .driver_data = &tux_featureset_1_nvidia_descriptor, 2504 }, 2505 { 2506 .ident = "TUXEDO Polaris 15 Gen1 Intel", 2507 .matches = { 2508 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2509 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I2060"), 2510 }, 2511 .driver_data = &tux_featureset_1_nvidia_descriptor, 2512 }, 2513 { 2514 .ident = "TUXEDO Polaris 17 Gen1 Intel", 2515 .matches = { 2516 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2517 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I1650TI"), 2518 }, 2519 .driver_data = &tux_featureset_1_nvidia_descriptor, 2520 }, 2521 { 2522 .ident = "TUXEDO Polaris 17 Gen1 Intel", 2523 .matches = { 2524 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2525 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I2060"), 2526 }, 2527 .driver_data = &tux_featureset_1_nvidia_descriptor, 2528 }, 2529 { 2530 .ident = "TUXEDO Trinity 15 Intel Gen1", 2531 .matches = { 2532 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2533 DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1501I"), 2534 }, 2535 .driver_data = &tux_featureset_1_nvidia_descriptor, 2536 }, 2537 { 2538 .ident = "TUXEDO Trinity 17 Intel Gen1", 2539 .matches = { 2540 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2541 DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1701I"), 2542 }, 2543 .driver_data = &tux_featureset_1_nvidia_descriptor, 2544 }, 2545 { 2546 .ident = "TUXEDO Polaris 15/17 Gen2 AMD", 2547 .matches = { 2548 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2549 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxMGxx"), 2550 }, 2551 .driver_data = &tux_featureset_2_nvidia_descriptor, 2552 }, 2553 { 2554 .ident = "TUXEDO Polaris 15/17 Gen2 Intel", 2555 .matches = { 2556 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2557 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxNGxx"), 2558 }, 2559 .driver_data = &tux_featureset_2_nvidia_descriptor, 2560 }, 2561 { 2562 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 AMD", 2563 .matches = { 2564 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2565 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxZGxx"), 2566 }, 2567 .driver_data = &tux_featureset_2_nvidia_descriptor, 2568 }, 2569 { 2570 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 Intel", 2571 .matches = { 2572 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2573 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxTGxx"), 2574 }, 2575 .driver_data = &tux_featureset_2_nvidia_descriptor, 2576 }, 2577 { 2578 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen4 AMD", 2579 .matches = { 2580 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2581 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxRGxx"), 2582 }, 2583 .driver_data = &tux_featureset_3_nvidia_descriptor, 2584 }, 2585 { 2586 .ident = "TUXEDO Stellaris 15 Gen4 Intel", 2587 .matches = { 2588 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2589 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxAGxx"), 2590 }, 2591 .driver_data = &tux_featureset_3_nvidia_descriptor, 2592 }, 2593 { 2594 .ident = "TUXEDO Polaris 15/17 Gen5 AMD", 2595 .matches = { 2596 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2597 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxXGxx"), 2598 }, 2599 .driver_data = &tux_featureset_2_nvidia_descriptor, 2600 }, 2601 { 2602 .ident = "TUXEDO Stellaris 16 Gen5 AMD", 2603 .matches = { 2604 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2605 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6XGxX"), 2606 }, 2607 .driver_data = &tux_featureset_3_nvidia_descriptor, 2608 }, 2609 { 2610 .ident = "TUXEDO Stellaris 16/17 Gen5 Intel/Commodore ORION Gen 5", 2611 .matches = { 2612 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2613 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxPXxx"), 2614 }, 2615 .driver_data = &tux_featureset_3_nvidia_descriptor, 2616 }, 2617 { 2618 .ident = "TUXEDO Stellaris Slim 15 Gen6 AMD", 2619 .matches = { 2620 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2621 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxHGxx"), 2622 }, 2623 .driver_data = &tux_featureset_3_nvidia_descriptor, 2624 }, 2625 { 2626 .ident = "TUXEDO Stellaris Slim 15 Gen6 Intel/Commodore ORION Slim 15 Gen6", 2627 .matches = { 2628 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2629 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM5IXxA"), 2630 }, 2631 .driver_data = &tux_featureset_3_nvidia_descriptor, 2632 }, 2633 { 2634 .ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6", 2635 .matches = { 2636 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2637 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB1"), 2638 }, 2639 .driver_data = &tux_featureset_3_nvidia_descriptor, 2640 }, 2641 { 2642 .ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6", 2643 .matches = { 2644 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2645 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB2"), 2646 }, 2647 .driver_data = &tux_featureset_3_nvidia_descriptor, 2648 }, 2649 { 2650 .ident = "TUXEDO Stellaris 17 Gen6 Intel/Commodore ORION 17 Gen6", 2651 .matches = { 2652 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2653 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM7IXxN"), 2654 }, 2655 .driver_data = &tux_featureset_3_nvidia_descriptor, 2656 }, 2657 { 2658 .ident = "TUXEDO Stellaris 16 Gen7 AMD", 2659 .matches = { 2660 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2661 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6FR5xxY"), 2662 }, 2663 .driver_data = &tux_featureset_3_nvidia_descriptor, 2664 }, 2665 { 2666 .ident = "TUXEDO Stellaris 16 Gen7 Intel", 2667 .matches = { 2668 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2669 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY"), 2670 }, 2671 .driver_data = &tux_featureset_3_nvidia_descriptor, 2672 }, 2673 { 2674 .ident = "TUXEDO Stellaris 16 Gen7 Intel", 2675 .matches = { 2676 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2677 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY_mLED"), 2678 }, 2679 .driver_data = &tux_featureset_3_nvidia_descriptor, 2680 }, 2681 { 2682 .ident = "TUXEDO Book BA15 Gen10 AMD", 2683 .matches = { 2684 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2685 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5PU1G"), 2686 }, 2687 .driver_data = &pf5pu1g_descriptor, 2688 }, 2689 { 2690 .ident = "TUXEDO Pulse 14 Gen1 AMD", 2691 .matches = { 2692 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2693 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1401"), 2694 }, 2695 .driver_data = &tux_featureset_1_descriptor, 2696 }, 2697 { 2698 .ident = "TUXEDO Pulse 15 Gen1 AMD", 2699 .matches = { 2700 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2701 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1501"), 2702 }, 2703 .driver_data = &tux_featureset_1_descriptor, 2704 }, 2705 { 2706 .ident = "TUXEDO Pulse 15 Gen2 AMD", 2707 .matches = { 2708 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2709 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5LUXG"), 2710 }, 2711 .driver_data = &tux_featureset_1_descriptor, 2712 }, 2713 { } 2714 }; 2715 MODULE_DEVICE_TABLE(dmi, uniwill_dmi_table); 2716 2717 static int __init uniwill_init(void) 2718 { 2719 const struct uniwill_device_descriptor *descriptor; 2720 const struct dmi_system_id *id; 2721 int ret; 2722 2723 id = dmi_first_match(uniwill_dmi_table); 2724 if (!id) { 2725 if (!force) 2726 return -ENODEV; 2727 2728 pr_warn("Loading on a potentially unsupported device\n"); 2729 } else { 2730 /* 2731 * Some devices might support additional features depending on 2732 * the BIOS version/date, so we call this callback to let them 2733 * modify their device descriptor accordingly. 2734 */ 2735 if (id->callback) { 2736 ret = id->callback(id); 2737 if (ret < 0) 2738 return ret; 2739 } 2740 2741 descriptor = id->driver_data; 2742 device_descriptor = *descriptor; 2743 } 2744 2745 if (force) { 2746 /* Assume that the device supports all features except the charge limit */ 2747 device_descriptor.features = UINT_MAX & ~UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT; 2748 pr_warn("Enabling potentially unsupported features\n"); 2749 } 2750 2751 ret = platform_driver_register(&uniwill_driver); 2752 if (ret < 0) 2753 return ret; 2754 2755 ret = uniwill_wmi_register_driver(); 2756 if (ret < 0) { 2757 platform_driver_unregister(&uniwill_driver); 2758 return ret; 2759 } 2760 2761 return 0; 2762 } 2763 module_init(uniwill_init); 2764 2765 static void __exit uniwill_exit(void) 2766 { 2767 uniwill_wmi_unregister_driver(); 2768 platform_driver_unregister(&uniwill_driver); 2769 } 2770 module_exit(uniwill_exit); 2771 2772 MODULE_AUTHOR("Armin Wolf <W_Armin@gmx.de>"); 2773 MODULE_DESCRIPTION("Uniwill notebook driver"); 2774 MODULE_LICENSE("GPL"); 2775