xref: /linux/include/dt-bindings/clock/qcom,nord-gpu2cc.h (revision 502d45774af09f1c681c754c4b7cdfb5d7f72fd9)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_2_CC_NORD_H
7 #define _DT_BINDINGS_CLK_QCOM_GPU_2_CC_NORD_H
8 
9 /* GPU_2_CC clocks */
10 #define GPU_2_CC_AHB_CLK					0
11 #define GPU_2_CC_CRC_AHB_CLK					1
12 #define GPU_2_CC_CX_ACCU_SHIFT_CLK				2
13 #define GPU_2_CC_CX_FF_CLK					3
14 #define GPU_2_CC_CX_GMU_CLK					4
15 #define GPU_2_CC_CXO_AON_CLK					5
16 #define GPU_2_CC_CXO_CLK					6
17 #define GPU_2_CC_DEMET_CLK					7
18 #define GPU_2_CC_FF_CLK_SRC					8
19 #define GPU_2_CC_FREQ_MEASURE_CLK				9
20 #define GPU_2_CC_GMU_CLK_SRC					10
21 #define GPU_2_CC_GPU_SMMU_VOTE_CLK				11
22 #define GPU_2_CC_HUB_AON_CLK					12
23 #define GPU_2_CC_HUB_CLK_SRC					13
24 #define GPU_2_CC_HUB_CX_INT_CLK					14
25 #define GPU_2_CC_MEMNOC_GFX_CLK					15
26 #define GPU_2_CC_MND1X_0_GFX3D_CLK				16
27 #define GPU_2_CC_MND1X_1_GFX3D_CLK				17
28 #define GPU_2_CC_PLL0						18
29 #define GPU_2_CC_PLL1						19
30 #define GPU_2_CC_SLEEP_CLK					20
31 
32 /* GPU_2_CC power domains */
33 #define GPU_2_CC_CX_GDSC					0
34 #define GPU_2_CC_GX_GDSC					1
35 
36 /* GPU_2_CC resets */
37 #define GPU_2_CC_ACD_BCR					0
38 #define GPU_2_CC_CB_BCR						1
39 #define GPU_2_CC_CX_BCR						2
40 #define GPU_2_CC_FAST_HUB_BCR					3
41 #define GPU_2_CC_FF_BCR						4
42 #define GPU_2_CC_GFX3D_AON_BCR					5
43 #define GPU_2_CC_GMU_BCR					6
44 #define GPU_2_CC_GX_BCR						7
45 #define GPU_2_CC_XO_BCR						8
46 
47 #endif
48