1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * stmmac_pcs.h: Physical Coding Sublayer Header File
4 *
5 * Copyright (C) 2016 STMicroelectronics (R&D) Limited
6 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7 */
8
9 #ifndef __STMMAC_PCS_H__
10 #define __STMMAC_PCS_H__
11
12 #include <linux/slab.h>
13 #include <linux/io.h>
14 #include "common.h"
15
16 /* PCS registers (AN/TBI/SGMII/RGMII) offsets */
17 #define GMAC_AN_CTRL(x) (x) /* AN control */
18 #define GMAC_AN_STATUS(x) (x + 0x4) /* AN status */
19
20 /* ADV, LPA and EXP are only available for the TBI and RTBI interfaces */
21 #define GMAC_ANE_ADV(x) (x + 0x8) /* ANE Advertisement */
22 #define GMAC_ANE_LPA(x) (x + 0xc) /* ANE link partener ability */
23 #define GMAC_ANE_EXP(x) (x + 0x10) /* ANE expansion */
24 #define GMAC_TBI(x) (x + 0x14) /* TBI extend status */
25
26 /* AN Configuration defines */
27 #define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
28 #define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
29 #define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
30 #define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
31 #define GMAC_AN_CTRL_LR BIT(17) /* Lock to Reference */
32 #define GMAC_AN_CTRL_SGMRAL BIT(18) /* SGMII RAL Control */
33
34 /* AN Status defines */
35 #define GMAC_AN_STATUS_LS BIT(2) /* Link Status 0:down 1:up */
36 #define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
37 #define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
38 #define GMAC_AN_STATUS_ES BIT(8) /* Extended Status */
39
40 /* ADV and LPA defines */
41 #define GMAC_ANE_FD BIT(5)
42 #define GMAC_ANE_HD BIT(6)
43 #define GMAC_ANE_PSE GENMASK(8, 7)
44 #define GMAC_ANE_PSE_SHIFT 7
45 #define GMAC_ANE_RFE GENMASK(13, 12)
46 #define GMAC_ANE_RFE_SHIFT 12
47 #define GMAC_ANE_ACK BIT(14)
48
49 /**
50 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
51 * @ioaddr: IO registers pointer
52 * @reg: Base address of the AN Control Register.
53 * @intr_status: GMAC core interrupt status
54 * @x: pointer to log these events as stats
55 * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
56 * Link status.
57 */
dwmac_pcs_isr(void __iomem * ioaddr,u32 reg,unsigned int intr_status,struct stmmac_extra_stats * x)58 static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
59 unsigned int intr_status,
60 struct stmmac_extra_stats *x)
61 {
62 u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
63
64 if (intr_status & PCS_ANE_IRQ) {
65 x->irq_pcs_ane_n++;
66 if (val & GMAC_AN_STATUS_ANC)
67 pr_info("stmmac_pcs: ANE process completed\n");
68 }
69
70 if (intr_status & PCS_LINK_IRQ) {
71 x->irq_pcs_link_n++;
72 if (val & GMAC_AN_STATUS_LS)
73 pr_info("stmmac_pcs: Link Up\n");
74 else
75 pr_info("stmmac_pcs: Link Down\n");
76 }
77 }
78
79 /**
80 * dwmac_ctrl_ane - To program the AN Control Register.
81 * @ioaddr: IO registers pointer
82 * @reg: Base address of the AN Control Register.
83 * @ane: to enable the auto-negotiation
84 * @srgmi_ral: to manage MAC-2-MAC SGMII connections.
85 * @loopback: to cause the PHY to loopback tx data into rx path.
86 * Description: this is the main function to configure the AN control register
87 * and init the ANE, select loopback (usually for debugging purpose) and
88 * configure SGMII RAL.
89 */
dwmac_ctrl_ane(void __iomem * ioaddr,u32 reg,bool ane,bool srgmi_ral,bool loopback)90 static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,
91 bool srgmi_ral, bool loopback)
92 {
93 u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
94
95 /* Enable and restart the Auto-Negotiation */
96 if (ane)
97 value |= GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_RAN;
98 else
99 value &= ~GMAC_AN_CTRL_ANE;
100
101 /* In case of MAC-2-MAC connection, block is configured to operate
102 * according to MAC conf register.
103 */
104 if (srgmi_ral)
105 value |= GMAC_AN_CTRL_SGMRAL;
106
107 if (loopback)
108 value |= GMAC_AN_CTRL_ELE;
109
110 writel(value, ioaddr + GMAC_AN_CTRL(reg));
111 }
112 #endif /* __STMMAC_PCS_H__ */
113