1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched/clock.h>
34 #include <linux/ctype.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/irq.h>
40 #include <linux/bitops.h>
41 #include <linux/crash_dump.h>
42 #include <linux/cpu.h>
43 #include <linux/cpuhotplug.h>
44
45 #include <scsi/scsi.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_transport_fc.h>
49 #include <scsi/scsi_tcq.h>
50 #include <scsi/fc/fc_fs.h>
51
52 #include "lpfc_hw4.h"
53 #include "lpfc_hw.h"
54 #include "lpfc_sli.h"
55 #include "lpfc_sli4.h"
56 #include "lpfc_nl.h"
57 #include "lpfc_disc.h"
58 #include "lpfc.h"
59 #include "lpfc_scsi.h"
60 #include "lpfc_nvme.h"
61 #include "lpfc_logmsg.h"
62 #include "lpfc_crtn.h"
63 #include "lpfc_vport.h"
64 #include "lpfc_version.h"
65 #include "lpfc_ids.h"
66
67 static enum cpuhp_state lpfc_cpuhp_state;
68 /* Used when mapping IRQ vectors in a driver centric manner */
69 static uint32_t lpfc_present_cpu;
70 static bool lpfc_pldv_detect;
71
72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
76 static int lpfc_post_rcv_buf(struct lpfc_hba *);
77 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
79 static int lpfc_setup_endian_order(struct lpfc_hba *);
80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
81 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
83 static void lpfc_init_sgl_list(struct lpfc_hba *);
84 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
85 static void lpfc_free_active_sgl(struct lpfc_hba *);
86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
91 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts);
106
107 /**
108 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
109 * @phba: pointer to lpfc hba data structure.
110 *
111 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
112 * mailbox command. It retrieves the revision information from the HBA and
113 * collects the Vital Product Data (VPD) about the HBA for preparing the
114 * configuration of the HBA.
115 *
116 * Return codes:
117 * 0 - success.
118 * -ERESTART - requests the SLI layer to reset the HBA and try again.
119 * Any other value - indicates an error.
120 **/
121 int
lpfc_config_port_prep(struct lpfc_hba * phba)122 lpfc_config_port_prep(struct lpfc_hba *phba)
123 {
124 lpfc_vpd_t *vp = &phba->vpd;
125 int i = 0, rc;
126 LPFC_MBOXQ_t *pmb;
127 MAILBOX_t *mb;
128 char *lpfc_vpd_data = NULL;
129 uint16_t offset = 0;
130 static char licensed[56] =
131 "key unlock for use with gnu public licensed code only\0";
132 static int init_key = 1;
133
134 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
135 if (!pmb) {
136 phba->link_state = LPFC_HBA_ERROR;
137 return -ENOMEM;
138 }
139
140 mb = &pmb->u.mb;
141 phba->link_state = LPFC_INIT_MBX_CMDS;
142
143 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
144 if (init_key) {
145 uint32_t *ptext = (uint32_t *) licensed;
146
147 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
148 *ptext = cpu_to_be32(*ptext);
149 init_key = 0;
150 }
151
152 lpfc_read_nv(phba, pmb);
153 memset((char*)mb->un.varRDnvp.rsvd3, 0,
154 sizeof (mb->un.varRDnvp.rsvd3));
155 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
156 sizeof (licensed));
157
158 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
159
160 if (rc != MBX_SUCCESS) {
161 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
162 "0324 Config Port initialization "
163 "error, mbxCmd x%x READ_NVPARM, "
164 "mbxStatus x%x\n",
165 mb->mbxCommand, mb->mbxStatus);
166 mempool_free(pmb, phba->mbox_mem_pool);
167 return -ERESTART;
168 }
169 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
170 sizeof(phba->wwnn));
171 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
172 sizeof(phba->wwpn));
173 }
174
175 /*
176 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
177 * which was already set in lpfc_get_cfgparam()
178 */
179 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
180
181 /* Setup and issue mailbox READ REV command */
182 lpfc_read_rev(phba, pmb);
183 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
184 if (rc != MBX_SUCCESS) {
185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
186 "0439 Adapter failed to init, mbxCmd x%x "
187 "READ_REV, mbxStatus x%x\n",
188 mb->mbxCommand, mb->mbxStatus);
189 mempool_free( pmb, phba->mbox_mem_pool);
190 return -ERESTART;
191 }
192
193
194 /*
195 * The value of rr must be 1 since the driver set the cv field to 1.
196 * This setting requires the FW to set all revision fields.
197 */
198 if (mb->un.varRdRev.rr == 0) {
199 vp->rev.rBit = 0;
200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
201 "0440 Adapter failed to init, READ_REV has "
202 "missing revision information.\n");
203 mempool_free(pmb, phba->mbox_mem_pool);
204 return -ERESTART;
205 }
206
207 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
208 mempool_free(pmb, phba->mbox_mem_pool);
209 return -EINVAL;
210 }
211
212 /* Save information as VPD data */
213 vp->rev.rBit = 1;
214 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
215 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
216 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
217 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
218 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
219 vp->rev.biuRev = mb->un.varRdRev.biuRev;
220 vp->rev.smRev = mb->un.varRdRev.smRev;
221 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
222 vp->rev.endecRev = mb->un.varRdRev.endecRev;
223 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
224 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
225 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
226 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
227 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
228 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
229
230 /* If the sli feature level is less then 9, we must
231 * tear down all RPIs and VPIs on link down if NPIV
232 * is enabled.
233 */
234 if (vp->rev.feaLevelHigh < 9)
235 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
236
237 if (lpfc_is_LC_HBA(phba->pcidev->device))
238 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
239 sizeof (phba->RandomData));
240
241 /* Get adapter VPD information */
242 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
243 if (!lpfc_vpd_data)
244 goto out_free_mbox;
245 do {
246 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
247 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
248
249 if (rc != MBX_SUCCESS) {
250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
251 "0441 VPD not present on adapter, "
252 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
253 mb->mbxCommand, mb->mbxStatus);
254 mb->un.varDmp.word_cnt = 0;
255 }
256 /* dump mem may return a zero when finished or we got a
257 * mailbox error, either way we are done.
258 */
259 if (mb->un.varDmp.word_cnt == 0)
260 break;
261
262 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
263 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
264 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
265 lpfc_vpd_data + offset,
266 mb->un.varDmp.word_cnt);
267 offset += mb->un.varDmp.word_cnt;
268 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
269
270 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
271
272 kfree(lpfc_vpd_data);
273 out_free_mbox:
274 mempool_free(pmb, phba->mbox_mem_pool);
275 return 0;
276 }
277
278 /**
279 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
280 * @phba: pointer to lpfc hba data structure.
281 * @pmboxq: pointer to the driver internal queue element for mailbox command.
282 *
283 * This is the completion handler for driver's configuring asynchronous event
284 * mailbox command to the device. If the mailbox command returns successfully,
285 * it will set internal async event support flag to 1; otherwise, it will
286 * set internal async event support flag to 0.
287 **/
288 static void
lpfc_config_async_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
290 {
291 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
292 phba->temp_sensor_support = 1;
293 else
294 phba->temp_sensor_support = 0;
295 mempool_free(pmboxq, phba->mbox_mem_pool);
296 return;
297 }
298
299 /**
300 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
301 * @phba: pointer to lpfc hba data structure.
302 * @pmboxq: pointer to the driver internal queue element for mailbox command.
303 *
304 * This is the completion handler for dump mailbox command for getting
305 * wake up parameters. When this command complete, the response contain
306 * Option rom version of the HBA. This function translate the version number
307 * into a human readable string and store it in OptionROMVersion.
308 **/
309 static void
lpfc_dump_wakeup_param_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
311 {
312 struct prog_id *prg;
313 uint32_t prog_id_word;
314 char dist = ' ';
315 /* character array used for decoding dist type. */
316 char dist_char[] = "nabx";
317
318 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
319 mempool_free(pmboxq, phba->mbox_mem_pool);
320 return;
321 }
322
323 prg = (struct prog_id *) &prog_id_word;
324
325 /* word 7 contain option rom version */
326 prog_id_word = pmboxq->u.mb.un.varWords[7];
327
328 /* Decode the Option rom version word to a readable string */
329 dist = dist_char[prg->dist];
330
331 if ((prg->dist == 3) && (prg->num == 0))
332 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
333 prg->ver, prg->rev, prg->lev);
334 else
335 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
336 prg->ver, prg->rev, prg->lev,
337 dist, prg->num);
338 mempool_free(pmboxq, phba->mbox_mem_pool);
339 return;
340 }
341
342 /**
343 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
344 * @vport: pointer to lpfc vport data structure.
345 *
346 *
347 * Return codes
348 * None.
349 **/
350 void
lpfc_update_vport_wwn(struct lpfc_vport * vport)351 lpfc_update_vport_wwn(struct lpfc_vport *vport)
352 {
353 struct lpfc_hba *phba = vport->phba;
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name))) {
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (phba->sli_rev == LPFC_SLI_REV4 &&
376 vport->port_type == LPFC_PHYSICAL_PORT &&
377 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
378 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
379 phba->sli4_hba.fawwpn_flag &=
380 ~LPFC_FAWWPN_FABRIC;
381 lpfc_printf_log(phba, KERN_INFO,
382 LOG_SLI | LOG_DISCOVERY | LOG_ELS,
383 "2701 FA-PWWN change WWPN from %llx to "
384 "%llx: vflag x%x fawwpn_flag x%x\n",
385 wwn_to_u64(vport->fc_portname.u.wwn),
386 wwn_to_u64
387 (vport->fc_sparam.portName.u.wwn),
388 vport->vport_flag,
389 phba->sli4_hba.fawwpn_flag);
390 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
391 sizeof(struct lpfc_name));
392 }
393 }
394
395 if (vport->fc_portname.u.wwn[0] == 0)
396 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
397 sizeof(struct lpfc_name));
398 else
399 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
400 sizeof(struct lpfc_name));
401 }
402
403 /**
404 * lpfc_config_port_post - Perform lpfc initialization after config port
405 * @phba: pointer to lpfc hba data structure.
406 *
407 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
408 * command call. It performs all internal resource and state setups on the
409 * port: post IOCB buffers, enable appropriate host interrupt attentions,
410 * ELS ring timers, etc.
411 *
412 * Return codes
413 * 0 - success.
414 * Any other value - error.
415 **/
416 int
lpfc_config_port_post(struct lpfc_hba * phba)417 lpfc_config_port_post(struct lpfc_hba *phba)
418 {
419 struct lpfc_vport *vport = phba->pport;
420 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
421 LPFC_MBOXQ_t *pmb;
422 MAILBOX_t *mb;
423 struct lpfc_dmabuf *mp;
424 struct lpfc_sli *psli = &phba->sli;
425 uint32_t status, timeout;
426 int i, j;
427 int rc;
428
429 spin_lock_irq(&phba->hbalock);
430 /*
431 * If the Config port completed correctly the HBA is not
432 * over heated any more.
433 */
434 if (phba->over_temp_state == HBA_OVER_TEMP)
435 phba->over_temp_state = HBA_NORMAL_TEMP;
436 spin_unlock_irq(&phba->hbalock);
437
438 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
439 if (!pmb) {
440 phba->link_state = LPFC_HBA_ERROR;
441 return -ENOMEM;
442 }
443 mb = &pmb->u.mb;
444
445 /* Get login parameters for NID. */
446 rc = lpfc_read_sparam(phba, pmb, 0);
447 if (rc) {
448 mempool_free(pmb, phba->mbox_mem_pool);
449 return -ENOMEM;
450 }
451
452 pmb->vport = vport;
453 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
455 "0448 Adapter failed init, mbxCmd x%x "
456 "READ_SPARM mbxStatus x%x\n",
457 mb->mbxCommand, mb->mbxStatus);
458 phba->link_state = LPFC_HBA_ERROR;
459 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
460 return -EIO;
461 }
462
463 mp = pmb->ctx_buf;
464
465 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
466 * longer needed. Prevent unintended ctx_buf access as the mbox is
467 * reused.
468 */
469 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
470 lpfc_mbuf_free(phba, mp->virt, mp->phys);
471 kfree(mp);
472 pmb->ctx_buf = NULL;
473 lpfc_update_vport_wwn(vport);
474
475 /* Update the fc_host data structures with new wwn. */
476 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
477 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
478 fc_host_max_npiv_vports(shost) = phba->max_vpi;
479
480 /* If no serial number in VPD data, use low 6 bytes of WWNN */
481 /* This should be consolidated into parse_vpd ? - mr */
482 if (phba->SerialNumber[0] == 0) {
483 uint8_t *outptr;
484
485 outptr = &vport->fc_nodename.u.s.IEEE[0];
486 for (i = 0; i < 12; i++) {
487 status = *outptr++;
488 j = ((status & 0xf0) >> 4);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 i++;
496 j = (status & 0xf);
497 if (j <= 9)
498 phba->SerialNumber[i] =
499 (char)((uint8_t) 0x30 + (uint8_t) j);
500 else
501 phba->SerialNumber[i] =
502 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
503 }
504 }
505
506 lpfc_read_config(phba, pmb);
507 pmb->vport = vport;
508 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
510 "0453 Adapter failed to init, mbxCmd x%x "
511 "READ_CONFIG, mbxStatus x%x\n",
512 mb->mbxCommand, mb->mbxStatus);
513 phba->link_state = LPFC_HBA_ERROR;
514 mempool_free( pmb, phba->mbox_mem_pool);
515 return -EIO;
516 }
517
518 /* Check if the port is disabled */
519 lpfc_sli_read_link_ste(phba);
520
521 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
522 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
523 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
524 "3359 HBA queue depth changed from %d to %d\n",
525 phba->cfg_hba_queue_depth,
526 mb->un.varRdConfig.max_xri);
527 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
528 }
529
530 phba->lmt = mb->un.varRdConfig.lmt;
531
532 /* Get the default values for Model Name and Description */
533 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
534
535 phba->link_state = LPFC_LINK_DOWN;
536
537 /* Only process IOCBs on ELS ring till hba_state is READY */
538 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
539 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
540 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
541 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
542
543 /* Post receive buffers for desired rings */
544 if (phba->sli_rev != 3)
545 lpfc_post_rcv_buf(phba);
546
547 /*
548 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
549 */
550 if (phba->intr_type == MSIX) {
551 rc = lpfc_config_msi(phba, pmb);
552 if (rc) {
553 mempool_free(pmb, phba->mbox_mem_pool);
554 return -EIO;
555 }
556 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
557 if (rc != MBX_SUCCESS) {
558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
559 "0352 Config MSI mailbox command "
560 "failed, mbxCmd x%x, mbxStatus x%x\n",
561 pmb->u.mb.mbxCommand,
562 pmb->u.mb.mbxStatus);
563 mempool_free(pmb, phba->mbox_mem_pool);
564 return -EIO;
565 }
566 }
567
568 spin_lock_irq(&phba->hbalock);
569 /* Initialize ERATT handling flag */
570 clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag);
571
572 /* Enable appropriate host interrupts */
573 if (lpfc_readl(phba->HCregaddr, &status)) {
574 spin_unlock_irq(&phba->hbalock);
575 return -EIO;
576 }
577 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
578 if (psli->num_rings > 0)
579 status |= HC_R0INT_ENA;
580 if (psli->num_rings > 1)
581 status |= HC_R1INT_ENA;
582 if (psli->num_rings > 2)
583 status |= HC_R2INT_ENA;
584 if (psli->num_rings > 3)
585 status |= HC_R3INT_ENA;
586
587 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
588 (phba->cfg_poll & DISABLE_FCP_RING_INT))
589 status &= ~(HC_R0INT_ENA);
590
591 writel(status, phba->HCregaddr);
592 readl(phba->HCregaddr); /* flush */
593 spin_unlock_irq(&phba->hbalock);
594
595 /* Set up ring-0 (ELS) timer */
596 timeout = phba->fc_ratov * 2;
597 mod_timer(&vport->els_tmofunc,
598 jiffies + secs_to_jiffies(timeout));
599 /* Set up heart beat (HB) timer */
600 mod_timer(&phba->hb_tmofunc,
601 jiffies + secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
602 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
603 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
604 phba->last_completion_time = jiffies;
605 /* Set up error attention (ERATT) polling timer */
606 mod_timer(&phba->eratt_poll,
607 jiffies + secs_to_jiffies(phba->eratt_poll_interval));
608
609 if (test_bit(LINK_DISABLED, &phba->hba_flag)) {
610 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
611 "2598 Adapter Link is disabled.\n");
612 lpfc_down_link(phba, pmb);
613 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
614 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
615 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
617 "2599 Adapter failed to issue DOWN_LINK"
618 " mbox command rc 0x%x\n", rc);
619
620 mempool_free(pmb, phba->mbox_mem_pool);
621 return -EIO;
622 }
623 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
624 mempool_free(pmb, phba->mbox_mem_pool);
625 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
626 if (rc)
627 return rc;
628 }
629 /* MBOX buffer will be freed in mbox compl */
630 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
631 if (!pmb) {
632 phba->link_state = LPFC_HBA_ERROR;
633 return -ENOMEM;
634 }
635
636 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
637 pmb->mbox_cmpl = lpfc_config_async_cmpl;
638 pmb->vport = phba->pport;
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640
641 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
642 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
643 "0456 Adapter failed to issue "
644 "ASYNCEVT_ENABLE mbox status x%x\n",
645 rc);
646 mempool_free(pmb, phba->mbox_mem_pool);
647 }
648
649 /* Get Option rom version */
650 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
651 if (!pmb) {
652 phba->link_state = LPFC_HBA_ERROR;
653 return -ENOMEM;
654 }
655
656 lpfc_dump_wakeup_param(phba, pmb);
657 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
658 pmb->vport = phba->pport;
659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660
661 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
662 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
663 "0435 Adapter failed "
664 "to get Option ROM version status x%x\n", rc);
665 mempool_free(pmb, phba->mbox_mem_pool);
666 }
667
668 return 0;
669 }
670
671 /**
672 * lpfc_sli4_refresh_params - update driver copy of params.
673 * @phba: Pointer to HBA context object.
674 *
675 * This is called to refresh driver copy of dynamic fields from the
676 * common_get_sli4_parameters descriptor.
677 **/
678 int
lpfc_sli4_refresh_params(struct lpfc_hba * phba)679 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
680 {
681 LPFC_MBOXQ_t *mboxq;
682 struct lpfc_mqe *mqe;
683 struct lpfc_sli4_parameters *mbx_sli4_parameters;
684 int length, rc;
685
686 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
687 if (!mboxq)
688 return -ENOMEM;
689
690 mqe = &mboxq->u.mqe;
691 /* Read the port's SLI4 Config Parameters */
692 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
693 sizeof(struct lpfc_sli4_cfg_mhdr));
694 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
695 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
696 length, LPFC_SLI4_MBX_EMBED);
697
698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
699 if (unlikely(rc)) {
700 mempool_free(mboxq, phba->mbox_mem_pool);
701 return rc;
702 }
703 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
704 phba->sli4_hba.pc_sli4_params.mi_cap =
705 bf_get(cfg_mi_ver, mbx_sli4_parameters);
706
707 /* Are we forcing MI off via module parameter? */
708 if (phba->cfg_enable_mi)
709 phba->sli4_hba.pc_sli4_params.mi_ver =
710 bf_get(cfg_mi_ver, mbx_sli4_parameters);
711 else
712 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
713
714 phba->sli4_hba.pc_sli4_params.cmf =
715 bf_get(cfg_cmf, mbx_sli4_parameters);
716 phba->sli4_hba.pc_sli4_params.pls =
717 bf_get(cfg_pvl, mbx_sli4_parameters);
718
719 mempool_free(mboxq, phba->mbox_mem_pool);
720 return rc;
721 }
722
723 /**
724 * lpfc_hba_init_link - Initialize the FC link
725 * @phba: pointer to lpfc hba data structure.
726 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
727 *
728 * This routine will issue the INIT_LINK mailbox command call.
729 * It is available to other drivers through the lpfc_hba data
730 * structure for use as a delayed link up mechanism with the
731 * module parameter lpfc_suppress_link_up.
732 *
733 * Return code
734 * 0 - success
735 * Any other value - error
736 **/
737 static int
lpfc_hba_init_link(struct lpfc_hba * phba,uint32_t flag)738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
739 {
740 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
741 }
742
743 /**
744 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
745 * @phba: pointer to lpfc hba data structure.
746 * @fc_topology: desired fc topology.
747 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
748 *
749 * This routine will issue the INIT_LINK mailbox command call.
750 * It is available to other drivers through the lpfc_hba data
751 * structure for use as a delayed link up mechanism with the
752 * module parameter lpfc_suppress_link_up.
753 *
754 * Return code
755 * 0 - success
756 * Any other value - error
757 **/
758 int
lpfc_hba_init_link_fc_topology(struct lpfc_hba * phba,uint32_t fc_topology,uint32_t flag)759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
760 uint32_t flag)
761 {
762 struct lpfc_vport *vport = phba->pport;
763 LPFC_MBOXQ_t *pmb;
764 MAILBOX_t *mb;
765 int rc;
766
767 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
768 if (!pmb) {
769 phba->link_state = LPFC_HBA_ERROR;
770 return -ENOMEM;
771 }
772 mb = &pmb->u.mb;
773 pmb->vport = vport;
774
775 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
777 !(phba->lmt & LMT_1Gb)) ||
778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
779 !(phba->lmt & LMT_2Gb)) ||
780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
781 !(phba->lmt & LMT_4Gb)) ||
782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
783 !(phba->lmt & LMT_8Gb)) ||
784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
785 !(phba->lmt & LMT_10Gb)) ||
786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
787 !(phba->lmt & LMT_16Gb)) ||
788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
789 !(phba->lmt & LMT_32Gb)) ||
790 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
791 !(phba->lmt & LMT_64Gb))) {
792 /* Reset link speed to auto */
793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
794 "1302 Invalid speed for this board:%d "
795 "Reset link speed to auto.\n",
796 phba->cfg_link_speed);
797 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
798 }
799 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
801 if (phba->sli_rev < LPFC_SLI_REV4)
802 lpfc_set_loopback_flag(phba);
803 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
804 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
805 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
806 "0498 Adapter failed to init, mbxCmd x%x "
807 "INIT_LINK, mbxStatus x%x\n",
808 mb->mbxCommand, mb->mbxStatus);
809 if (phba->sli_rev <= LPFC_SLI_REV3) {
810 /* Clear all interrupt enable conditions */
811 writel(0, phba->HCregaddr);
812 readl(phba->HCregaddr); /* flush */
813 /* Clear all pending interrupts */
814 writel(0xffffffff, phba->HAregaddr);
815 readl(phba->HAregaddr); /* flush */
816 }
817 phba->link_state = LPFC_HBA_ERROR;
818 if (rc != MBX_BUSY || flag == MBX_POLL)
819 mempool_free(pmb, phba->mbox_mem_pool);
820 return -EIO;
821 }
822 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
823 if (flag == MBX_POLL)
824 mempool_free(pmb, phba->mbox_mem_pool);
825
826 return 0;
827 }
828
829 /**
830 * lpfc_hba_down_link - this routine downs the FC link
831 * @phba: pointer to lpfc hba data structure.
832 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
833 *
834 * This routine will issue the DOWN_LINK mailbox command call.
835 * It is available to other drivers through the lpfc_hba data
836 * structure for use to stop the link.
837 *
838 * Return code
839 * 0 - success
840 * Any other value - error
841 **/
842 static int
lpfc_hba_down_link(struct lpfc_hba * phba,uint32_t flag)843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
844 {
845 LPFC_MBOXQ_t *pmb;
846 int rc;
847
848 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
849 if (!pmb) {
850 phba->link_state = LPFC_HBA_ERROR;
851 return -ENOMEM;
852 }
853
854 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
855 "0491 Adapter Link is disabled.\n");
856 lpfc_down_link(phba, pmb);
857 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
858 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
859 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
861 "2522 Adapter failed to issue DOWN_LINK"
862 " mbox command rc 0x%x\n", rc);
863
864 mempool_free(pmb, phba->mbox_mem_pool);
865 return -EIO;
866 }
867 if (flag == MBX_POLL)
868 mempool_free(pmb, phba->mbox_mem_pool);
869
870 return 0;
871 }
872
873 /**
874 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
875 * @phba: pointer to lpfc HBA data structure.
876 *
877 * This routine will do LPFC uninitialization before the HBA is reset when
878 * bringing down the SLI Layer.
879 *
880 * Return codes
881 * 0 - success.
882 * Any other value - error.
883 **/
884 int
lpfc_hba_down_prep(struct lpfc_hba * phba)885 lpfc_hba_down_prep(struct lpfc_hba *phba)
886 {
887 struct lpfc_vport **vports;
888 int i;
889
890 if (phba->sli_rev <= LPFC_SLI_REV3) {
891 /* Disable interrupts */
892 writel(0, phba->HCregaddr);
893 readl(phba->HCregaddr); /* flush */
894 }
895
896 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
897 lpfc_cleanup_discovery_resources(phba->pport);
898 else {
899 vports = lpfc_create_vport_work_array(phba);
900 if (vports != NULL)
901 for (i = 0; i <= phba->max_vports &&
902 vports[i] != NULL; i++)
903 lpfc_cleanup_discovery_resources(vports[i]);
904 lpfc_destroy_vport_work_array(phba, vports);
905 }
906 return 0;
907 }
908
909 /**
910 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
911 * rspiocb which got deferred
912 *
913 * @phba: pointer to lpfc HBA data structure.
914 *
915 * This routine will cleanup completed slow path events after HBA is reset
916 * when bringing down the SLI Layer.
917 *
918 *
919 * Return codes
920 * void.
921 **/
922 static void
lpfc_sli4_free_sp_events(struct lpfc_hba * phba)923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
924 {
925 struct lpfc_iocbq *rspiocbq;
926 struct hbq_dmabuf *dmabuf;
927 struct lpfc_cq_event *cq_event;
928
929 clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag);
930
931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
932 /* Get the response iocb from the head of work queue */
933 spin_lock_irq(&phba->hbalock);
934 list_remove_head(&phba->sli4_hba.sp_queue_event,
935 cq_event, struct lpfc_cq_event, list);
936 spin_unlock_irq(&phba->hbalock);
937
938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
939 case CQE_CODE_COMPL_WQE:
940 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
941 cq_event);
942 lpfc_sli_release_iocbq(phba, rspiocbq);
943 break;
944 case CQE_CODE_RECEIVE:
945 case CQE_CODE_RECEIVE_V1:
946 dmabuf = container_of(cq_event, struct hbq_dmabuf,
947 cq_event);
948 lpfc_in_buf_free(phba, &dmabuf->dbuf);
949 }
950 }
951 }
952
953 /**
954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
955 * @phba: pointer to lpfc HBA data structure.
956 *
957 * This routine will cleanup posted ELS buffers after the HBA is reset
958 * when bringing down the SLI Layer.
959 *
960 *
961 * Return codes
962 * void.
963 **/
964 static void
lpfc_hba_free_post_buf(struct lpfc_hba * phba)965 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
966 {
967 struct lpfc_sli *psli = &phba->sli;
968 struct lpfc_sli_ring *pring;
969 struct lpfc_dmabuf *mp, *next_mp;
970 LIST_HEAD(buflist);
971 int count;
972
973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
974 lpfc_sli_hbqbuf_free_all(phba);
975 else {
976 /* Cleanup preposted buffers on the ELS ring */
977 pring = &psli->sli3_ring[LPFC_ELS_RING];
978 spin_lock_irq(&phba->hbalock);
979 list_splice_init(&pring->postbufq, &buflist);
980 spin_unlock_irq(&phba->hbalock);
981
982 count = 0;
983 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
984 list_del(&mp->list);
985 count++;
986 lpfc_mbuf_free(phba, mp->virt, mp->phys);
987 kfree(mp);
988 }
989
990 spin_lock_irq(&phba->hbalock);
991 pring->postbufq_cnt -= count;
992 spin_unlock_irq(&phba->hbalock);
993 }
994 }
995
996 /**
997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * void
1005 **/
1006 static void
lpfc_hba_clean_txcmplq(struct lpfc_hba * phba)1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1008 {
1009 struct lpfc_sli *psli = &phba->sli;
1010 struct lpfc_queue *qp = NULL;
1011 struct lpfc_sli_ring *pring;
1012 LIST_HEAD(completions);
1013 int i;
1014 struct lpfc_iocbq *piocb, *next_iocb;
1015
1016 if (phba->sli_rev != LPFC_SLI_REV4) {
1017 for (i = 0; i < psli->num_rings; i++) {
1018 pring = &psli->sli3_ring[i];
1019 spin_lock_irq(&phba->hbalock);
1020 /* At this point in time the HBA is either reset or DOA
1021 * Nothing should be on txcmplq as it will
1022 * NEVER complete.
1023 */
1024 list_splice_init(&pring->txcmplq, &completions);
1025 pring->txcmplq_cnt = 0;
1026 spin_unlock_irq(&phba->hbalock);
1027
1028 lpfc_sli_abort_iocb_ring(phba, pring);
1029 }
1030 /* Cancel all the IOCBs from the completions list */
1031 lpfc_sli_cancel_iocbs(phba, &completions,
1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1033 return;
1034 }
1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1036 pring = qp->pring;
1037 if (!pring)
1038 continue;
1039 spin_lock_irq(&pring->ring_lock);
1040 list_for_each_entry_safe(piocb, next_iocb,
1041 &pring->txcmplq, list)
1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1043 list_splice_init(&pring->txcmplq, &completions);
1044 pring->txcmplq_cnt = 0;
1045 spin_unlock_irq(&pring->ring_lock);
1046 lpfc_sli_abort_iocb_ring(phba, pring);
1047 }
1048 /* Cancel all the IOCBs from the completions list */
1049 lpfc_sli_cancel_iocbs(phba, &completions,
1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1051 }
1052
1053 /**
1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1055 * @phba: pointer to lpfc HBA data structure.
1056 *
1057 * This routine will do uninitialization after the HBA is reset when bring
1058 * down the SLI Layer.
1059 *
1060 * Return codes
1061 * 0 - success.
1062 * Any other value - error.
1063 **/
1064 static int
lpfc_hba_down_post_s3(struct lpfc_hba * phba)1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1066 {
1067 lpfc_hba_free_post_buf(phba);
1068 lpfc_hba_clean_txcmplq(phba);
1069 return 0;
1070 }
1071
1072 /**
1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1074 * @phba: pointer to lpfc HBA data structure.
1075 *
1076 * This routine will do uninitialization after the HBA is reset when bring
1077 * down the SLI Layer.
1078 *
1079 * Return codes
1080 * 0 - success.
1081 * Any other value - error.
1082 **/
1083 static int
lpfc_hba_down_post_s4(struct lpfc_hba * phba)1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1085 {
1086 struct lpfc_io_buf *psb, *psb_next;
1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1088 struct lpfc_sli4_hdw_queue *qp;
1089 LIST_HEAD(aborts);
1090 LIST_HEAD(nvme_aborts);
1091 LIST_HEAD(nvmet_aborts);
1092 struct lpfc_sglq *sglq_entry = NULL;
1093 int cnt, idx;
1094
1095
1096 lpfc_sli_hbqbuf_free_all(phba);
1097 lpfc_hba_clean_txcmplq(phba);
1098
1099 /* At this point in time the HBA is either reset or DOA. Either
1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1101 * on the lpfc_els_sgl_list so that it can either be freed if the
1102 * driver is unloading or reposted if the driver is restarting
1103 * the port.
1104 */
1105
1106 /* sgl_list_lock required because worker thread uses this
1107 * list.
1108 */
1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1110 list_for_each_entry(sglq_entry,
1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1112 sglq_entry->state = SGL_FREED;
1113
1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 &phba->sli4_hba.lpfc_els_sgl_list);
1116
1117
1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1119
1120 /* abts_xxxx_buf_list_lock required because worker thread uses this
1121 * list.
1122 */
1123 spin_lock_irq(&phba->hbalock);
1124 cnt = 0;
1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1126 qp = &phba->sli4_hba.hdwq[idx];
1127
1128 spin_lock(&qp->abts_io_buf_list_lock);
1129 list_splice_init(&qp->lpfc_abts_io_buf_list,
1130 &aborts);
1131
1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1133 psb->pCmd = NULL;
1134 psb->status = IOSTAT_SUCCESS;
1135 cnt++;
1136 }
1137 spin_lock(&qp->io_buf_list_put_lock);
1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1139 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1140 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1141 qp->abts_scsi_io_bufs = 0;
1142 qp->abts_nvme_io_bufs = 0;
1143 spin_unlock(&qp->io_buf_list_put_lock);
1144 spin_unlock(&qp->abts_io_buf_list_lock);
1145 }
1146 spin_unlock_irq(&phba->hbalock);
1147
1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1151 &nvmet_aborts);
1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1156 }
1157 }
1158
1159 lpfc_sli4_free_sp_events(phba);
1160 return cnt;
1161 }
1162
1163 /**
1164 * lpfc_hba_down_post - Wrapper func for hba down post routine
1165 * @phba: pointer to lpfc HBA data structure.
1166 *
1167 * This routine wraps the actual SLI3 or SLI4 routine for performing
1168 * uninitialization after the HBA is reset when bring down the SLI Layer.
1169 *
1170 * Return codes
1171 * 0 - success.
1172 * Any other value - error.
1173 **/
1174 int
lpfc_hba_down_post(struct lpfc_hba * phba)1175 lpfc_hba_down_post(struct lpfc_hba *phba)
1176 {
1177 return (*phba->lpfc_hba_down_post)(phba);
1178 }
1179
1180 /**
1181 * lpfc_hb_timeout - The HBA-timer timeout handler
1182 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1183 *
1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1186 * work-port-events bitmap and the worker thread is notified. This timeout
1187 * event will be used by the worker thread to invoke the actual timeout
1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1189 * be performed in the timeout handler and the HBA timeout event bit shall
1190 * be cleared by the worker thread after it has taken the event bitmap out.
1191 **/
1192 static void
lpfc_hb_timeout(struct timer_list * t)1193 lpfc_hb_timeout(struct timer_list *t)
1194 {
1195 struct lpfc_hba *phba;
1196 uint32_t tmo_posted;
1197 unsigned long iflag;
1198
1199 phba = timer_container_of(phba, t, hb_tmofunc);
1200
1201 /* Check for heart beat timeout conditions */
1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1204 if (!tmo_posted)
1205 phba->pport->work_port_events |= WORKER_HB_TMO;
1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1207
1208 /* Tell the worker thread there is work to do */
1209 if (!tmo_posted)
1210 lpfc_worker_wake_up(phba);
1211 return;
1212 }
1213
1214 /**
1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1216 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1217 *
1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1220 * work-port-events bitmap and the worker thread is notified. This timeout
1221 * event will be used by the worker thread to invoke the actual timeout
1222 * handler routine, lpfc_rrq_handler. Any periodical operations will
1223 * be performed in the timeout handler and the RRQ timeout event bit shall
1224 * be cleared by the worker thread after it has taken the event bitmap out.
1225 **/
1226 static void
lpfc_rrq_timeout(struct timer_list * t)1227 lpfc_rrq_timeout(struct timer_list *t)
1228 {
1229 struct lpfc_hba *phba;
1230
1231 phba = timer_container_of(phba, t, rrq_tmr);
1232 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1233 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1234 return;
1235 }
1236
1237 set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1238 lpfc_worker_wake_up(phba);
1239 }
1240
1241 /**
1242 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1243 * @phba: pointer to lpfc hba data structure.
1244 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1245 *
1246 * This is the callback function to the lpfc heart-beat mailbox command.
1247 * If configured, the lpfc driver issues the heart-beat mailbox command to
1248 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1249 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1250 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1251 * heart-beat outstanding state. Once the mailbox command comes back and
1252 * no error conditions detected, the heart-beat mailbox command timer is
1253 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1254 * state is cleared for the next heart-beat. If the timer expired with the
1255 * heart-beat outstanding state set, the driver will put the HBA offline.
1256 **/
1257 static void
lpfc_hb_mbox_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1259 {
1260 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
1261 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1262
1263 /* Check and reset heart-beat timer if necessary */
1264 mempool_free(pmboxq, phba->mbox_mem_pool);
1265 if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) &&
1266 !(phba->link_state == LPFC_HBA_ERROR) &&
1267 !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1268 mod_timer(&phba->hb_tmofunc,
1269 jiffies +
1270 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
1271 return;
1272 }
1273
1274 /*
1275 * lpfc_idle_stat_delay_work - idle_stat tracking
1276 *
1277 * This routine tracks per-eq idle_stat and determines polling decisions.
1278 *
1279 * Return codes:
1280 * None
1281 **/
1282 static void
lpfc_idle_stat_delay_work(struct work_struct * work)1283 lpfc_idle_stat_delay_work(struct work_struct *work)
1284 {
1285 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1286 struct lpfc_hba,
1287 idle_stat_delay_work);
1288 struct lpfc_queue *eq;
1289 struct lpfc_sli4_hdw_queue *hdwq;
1290 struct lpfc_idle_stat *idle_stat;
1291 u32 i, idle_percent;
1292 u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1293
1294 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
1295 return;
1296
1297 if (phba->link_state == LPFC_HBA_ERROR ||
1298 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) ||
1299 phba->cmf_active_mode != LPFC_CFG_OFF)
1300 goto requeue;
1301
1302 for_each_present_cpu(i) {
1303 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1304 eq = hdwq->hba_eq;
1305
1306 /* Skip if we've already handled this eq's primary CPU */
1307 if (eq->chann != i)
1308 continue;
1309
1310 idle_stat = &phba->sli4_hba.idle_stat[i];
1311
1312 /* get_cpu_idle_time returns values as running counters. Thus,
1313 * to know the amount for this period, the prior counter values
1314 * need to be subtracted from the current counter values.
1315 * From there, the idle time stat can be calculated as a
1316 * percentage of 100 - the sum of the other consumption times.
1317 */
1318 wall_idle = get_cpu_idle_time(i, &wall, 1);
1319 diff_idle = wall_idle - idle_stat->prev_idle;
1320 diff_wall = wall - idle_stat->prev_wall;
1321
1322 if (diff_wall <= diff_idle)
1323 busy_time = 0;
1324 else
1325 busy_time = diff_wall - diff_idle;
1326
1327 idle_percent = div64_u64(100 * busy_time, diff_wall);
1328 idle_percent = 100 - idle_percent;
1329
1330 if (idle_percent < 15)
1331 eq->poll_mode = LPFC_QUEUE_WORK;
1332 else
1333 eq->poll_mode = LPFC_THREADED_IRQ;
1334
1335 idle_stat->prev_idle = wall_idle;
1336 idle_stat->prev_wall = wall;
1337 }
1338
1339 requeue:
1340 schedule_delayed_work(&phba->idle_stat_delay_work,
1341 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1342 }
1343
1344 static void
lpfc_hb_eq_delay_work(struct work_struct * work)1345 lpfc_hb_eq_delay_work(struct work_struct *work)
1346 {
1347 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1348 struct lpfc_hba, eq_delay_work);
1349 struct lpfc_eq_intr_info *eqi, *eqi_new;
1350 struct lpfc_queue *eq, *eq_next;
1351 unsigned char *ena_delay = NULL;
1352 uint32_t usdelay;
1353 int i;
1354
1355 if (!phba->cfg_auto_imax ||
1356 test_bit(FC_UNLOADING, &phba->pport->load_flag))
1357 return;
1358
1359 if (phba->link_state == LPFC_HBA_ERROR ||
1360 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1361 goto requeue;
1362
1363 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1364 GFP_KERNEL);
1365 if (!ena_delay)
1366 goto requeue;
1367
1368 for (i = 0; i < phba->cfg_irq_chann; i++) {
1369 /* Get the EQ corresponding to the IRQ vector */
1370 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1371 if (!eq)
1372 continue;
1373 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1374 eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1375 ena_delay[eq->last_cpu] = 1;
1376 }
1377 }
1378
1379 for_each_present_cpu(i) {
1380 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1381 if (ena_delay[i]) {
1382 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1383 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1384 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1385 } else {
1386 usdelay = 0;
1387 }
1388
1389 eqi->icnt = 0;
1390
1391 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1392 if (unlikely(eq->last_cpu != i)) {
1393 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1394 eq->last_cpu);
1395 list_move_tail(&eq->cpu_list, &eqi_new->list);
1396 continue;
1397 }
1398 if (usdelay != eq->q_mode)
1399 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1400 usdelay);
1401 }
1402 }
1403
1404 kfree(ena_delay);
1405
1406 requeue:
1407 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1408 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1409 }
1410
1411 /**
1412 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1413 * @phba: pointer to lpfc hba data structure.
1414 *
1415 * For each heartbeat, this routine does some heuristic methods to adjust
1416 * XRI distribution. The goal is to fully utilize free XRIs.
1417 **/
lpfc_hb_mxp_handler(struct lpfc_hba * phba)1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1419 {
1420 u32 i;
1421 u32 hwq_count;
1422
1423 hwq_count = phba->cfg_hdw_queue;
1424 for (i = 0; i < hwq_count; i++) {
1425 /* Adjust XRIs in private pool */
1426 lpfc_adjust_pvt_pool_count(phba, i);
1427
1428 /* Adjust high watermark */
1429 lpfc_adjust_high_watermark(phba, i);
1430
1431 #ifdef LPFC_MXP_STAT
1432 /* Snapshot pbl, pvt and busy count */
1433 lpfc_snapshot_mxp(phba, i);
1434 #endif
1435 }
1436 }
1437
1438 /**
1439 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1440 * @phba: pointer to lpfc hba data structure.
1441 *
1442 * If a HB mbox is not already in progrees, this routine will allocate
1443 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1444 * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1445 **/
1446 int
lpfc_issue_hb_mbox(struct lpfc_hba * phba)1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1448 {
1449 LPFC_MBOXQ_t *pmboxq;
1450 int retval;
1451
1452 /* Is a Heartbeat mbox already in progress */
1453 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1454 return 0;
1455
1456 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1457 if (!pmboxq)
1458 return -ENOMEM;
1459
1460 lpfc_heart_beat(phba, pmboxq);
1461 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1462 pmboxq->vport = phba->pport;
1463 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1464
1465 if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1466 mempool_free(pmboxq, phba->mbox_mem_pool);
1467 return -ENXIO;
1468 }
1469 set_bit(HBA_HBEAT_INP, &phba->hba_flag);
1470
1471 return 0;
1472 }
1473
1474 /**
1475 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1476 * @phba: pointer to lpfc hba data structure.
1477 *
1478 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1479 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1480 * of the value of lpfc_enable_hba_heartbeat.
1481 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1482 * try to issue a MBX_HEARTBEAT mbox command.
1483 **/
1484 void
lpfc_issue_hb_tmo(struct lpfc_hba * phba)1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1486 {
1487 if (phba->cfg_enable_hba_heartbeat)
1488 return;
1489 set_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1490 }
1491
1492 /**
1493 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1494 * @phba: pointer to lpfc hba data structure.
1495 *
1496 * This is the actual HBA-timer timeout handler to be invoked by the worker
1497 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1498 * handler performs any periodic operations needed for the device. If such
1499 * periodic event has already been attended to either in the interrupt handler
1500 * or by processing slow-ring or fast-ring events within the HBA-timer
1501 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1502 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1503 * is configured and there is no heart-beat mailbox command outstanding, a
1504 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1505 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1506 * to offline.
1507 **/
1508 void
lpfc_hb_timeout_handler(struct lpfc_hba * phba)1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1510 {
1511 struct lpfc_vport **vports;
1512 struct lpfc_dmabuf *buf_ptr;
1513 int retval = 0;
1514 int i, tmo;
1515 struct lpfc_sli *psli = &phba->sli;
1516 LIST_HEAD(completions);
1517
1518 if (phba->cfg_xri_rebalancing) {
1519 /* Multi-XRI pools handler */
1520 lpfc_hb_mxp_handler(phba);
1521 }
1522
1523 vports = lpfc_create_vport_work_array(phba);
1524 if (vports != NULL)
1525 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1526 lpfc_rcv_seq_check_edtov(vports[i]);
1527 lpfc_fdmi_change_check(vports[i]);
1528 }
1529 lpfc_destroy_vport_work_array(phba, vports);
1530
1531 if (phba->link_state == LPFC_HBA_ERROR ||
1532 test_bit(FC_UNLOADING, &phba->pport->load_flag) ||
1533 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1534 return;
1535
1536 if (phba->elsbuf_cnt &&
1537 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1538 spin_lock_irq(&phba->hbalock);
1539 list_splice_init(&phba->elsbuf, &completions);
1540 phba->elsbuf_cnt = 0;
1541 phba->elsbuf_prev_cnt = 0;
1542 spin_unlock_irq(&phba->hbalock);
1543
1544 while (!list_empty(&completions)) {
1545 list_remove_head(&completions, buf_ptr,
1546 struct lpfc_dmabuf, list);
1547 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1548 kfree(buf_ptr);
1549 }
1550 }
1551 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1552
1553 /* If there is no heart beat outstanding, issue a heartbeat command */
1554 if (phba->cfg_enable_hba_heartbeat) {
1555 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1556 spin_lock_irq(&phba->pport->work_port_lock);
1557 if (time_after(phba->last_completion_time +
1558 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL),
1559 jiffies)) {
1560 spin_unlock_irq(&phba->pport->work_port_lock);
1561 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1562 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1563 else
1564 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1565 goto out;
1566 }
1567 spin_unlock_irq(&phba->pport->work_port_lock);
1568
1569 /* Check if a MBX_HEARTBEAT is already in progress */
1570 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) {
1571 /*
1572 * If heart beat timeout called with HBA_HBEAT_INP set
1573 * we need to give the hb mailbox cmd a chance to
1574 * complete or TMO.
1575 */
1576 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1577 "0459 Adapter heartbeat still outstanding: "
1578 "last compl time was %d ms.\n",
1579 jiffies_to_msecs(jiffies
1580 - phba->last_completion_time));
1581 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1582 } else {
1583 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1584 (list_empty(&psli->mboxq))) {
1585
1586 retval = lpfc_issue_hb_mbox(phba);
1587 if (retval) {
1588 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1589 goto out;
1590 }
1591 phba->skipped_hb = 0;
1592 } else if (time_before_eq(phba->last_completion_time,
1593 phba->skipped_hb)) {
1594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1595 "2857 Last completion time not "
1596 " updated in %d ms\n",
1597 jiffies_to_msecs(jiffies
1598 - phba->last_completion_time));
1599 } else
1600 phba->skipped_hb = jiffies;
1601
1602 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1603 goto out;
1604 }
1605 } else {
1606 /* Check to see if we want to force a MBX_HEARTBEAT */
1607 if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) {
1608 retval = lpfc_issue_hb_mbox(phba);
1609 if (retval)
1610 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1611 else
1612 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1613 goto out;
1614 }
1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1616 }
1617 out:
1618 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1619 }
1620
1621 /**
1622 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1623 * @phba: pointer to lpfc hba data structure.
1624 *
1625 * This routine is called to bring the HBA offline when HBA hardware error
1626 * other than Port Error 6 has been detected.
1627 **/
1628 static void
lpfc_offline_eratt(struct lpfc_hba * phba)1629 lpfc_offline_eratt(struct lpfc_hba *phba)
1630 {
1631 struct lpfc_sli *psli = &phba->sli;
1632
1633 spin_lock_irq(&phba->hbalock);
1634 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1635 spin_unlock_irq(&phba->hbalock);
1636 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1637
1638 lpfc_offline(phba);
1639 lpfc_reset_barrier(phba);
1640 spin_lock_irq(&phba->hbalock);
1641 lpfc_sli_brdreset(phba);
1642 spin_unlock_irq(&phba->hbalock);
1643 lpfc_hba_down_post(phba);
1644 lpfc_sli_brdready(phba, HS_MBRDY);
1645 lpfc_unblock_mgmt_io(phba);
1646 phba->link_state = LPFC_HBA_ERROR;
1647 return;
1648 }
1649
1650 /**
1651 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1652 * @phba: pointer to lpfc hba data structure.
1653 *
1654 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1655 * other than Port Error 6 has been detected.
1656 **/
1657 void
lpfc_sli4_offline_eratt(struct lpfc_hba * phba)1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1659 {
1660 spin_lock_irq(&phba->hbalock);
1661 if (phba->link_state == LPFC_HBA_ERROR &&
1662 test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1663 spin_unlock_irq(&phba->hbalock);
1664 return;
1665 }
1666 phba->link_state = LPFC_HBA_ERROR;
1667 spin_unlock_irq(&phba->hbalock);
1668
1669 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1670 lpfc_sli_flush_io_rings(phba);
1671 lpfc_offline(phba);
1672 lpfc_hba_down_post(phba);
1673 lpfc_unblock_mgmt_io(phba);
1674 }
1675
1676 /**
1677 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1678 * @phba: pointer to lpfc hba data structure.
1679 *
1680 * This routine is invoked to handle the deferred HBA hardware error
1681 * conditions. This type of error is indicated by HBA by setting ER1
1682 * and another ER bit in the host status register. The driver will
1683 * wait until the ER1 bit clears before handling the error condition.
1684 **/
1685 static void
lpfc_handle_deferred_eratt(struct lpfc_hba * phba)1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1687 {
1688 uint32_t old_host_status = phba->work_hs;
1689 struct lpfc_sli *psli = &phba->sli;
1690
1691 /* If the pci channel is offline, ignore possible errors,
1692 * since we cannot communicate with the pci card anyway.
1693 */
1694 if (pci_channel_offline(phba->pcidev)) {
1695 clear_bit(DEFER_ERATT, &phba->hba_flag);
1696 return;
1697 }
1698
1699 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1700 "0479 Deferred Adapter Hardware Error "
1701 "Data: x%x x%x x%x\n",
1702 phba->work_hs, phba->work_status[0],
1703 phba->work_status[1]);
1704
1705 spin_lock_irq(&phba->hbalock);
1706 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1707 spin_unlock_irq(&phba->hbalock);
1708
1709
1710 /*
1711 * Firmware stops when it triggred erratt. That could cause the I/Os
1712 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1713 * SCSI layer retry it after re-establishing link.
1714 */
1715 lpfc_sli_abort_fcp_rings(phba);
1716
1717 /*
1718 * There was a firmware error. Take the hba offline and then
1719 * attempt to restart it.
1720 */
1721 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1722 lpfc_offline(phba);
1723
1724 /* Wait for the ER1 bit to clear.*/
1725 while (phba->work_hs & HS_FFER1) {
1726 msleep(100);
1727 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1728 phba->work_hs = UNPLUG_ERR ;
1729 break;
1730 }
1731 /* If driver is unloading let the worker thread continue */
1732 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1733 phba->work_hs = 0;
1734 break;
1735 }
1736 }
1737
1738 /*
1739 * This is to ptrotect against a race condition in which
1740 * first write to the host attention register clear the
1741 * host status register.
1742 */
1743 if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1744 phba->work_hs = old_host_status & ~HS_FFER1;
1745
1746 clear_bit(DEFER_ERATT, &phba->hba_flag);
1747 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1748 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1749 }
1750
1751 static void
lpfc_board_errevt_to_mgmt(struct lpfc_hba * phba)1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1753 {
1754 struct lpfc_board_event_header board_event;
1755 struct Scsi_Host *shost;
1756
1757 board_event.event_type = FC_REG_BOARD_EVENT;
1758 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1759 shost = lpfc_shost_from_vport(phba->pport);
1760 fc_host_post_vendor_event(shost, fc_get_event_number(),
1761 sizeof(board_event),
1762 (char *) &board_event,
1763 LPFC_NL_VENDOR_ID);
1764 }
1765
1766 /**
1767 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1768 * @phba: pointer to lpfc hba data structure.
1769 *
1770 * This routine is invoked to handle the following HBA hardware error
1771 * conditions:
1772 * 1 - HBA error attention interrupt
1773 * 2 - DMA ring index out of range
1774 * 3 - Mailbox command came back as unknown
1775 **/
1776 static void
lpfc_handle_eratt_s3(struct lpfc_hba * phba)1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1778 {
1779 struct lpfc_vport *vport = phba->pport;
1780 struct lpfc_sli *psli = &phba->sli;
1781 uint32_t event_data;
1782 unsigned long temperature;
1783 struct temp_event temp_event_data;
1784 struct Scsi_Host *shost;
1785
1786 /* If the pci channel is offline, ignore possible errors,
1787 * since we cannot communicate with the pci card anyway.
1788 */
1789 if (pci_channel_offline(phba->pcidev)) {
1790 clear_bit(DEFER_ERATT, &phba->hba_flag);
1791 return;
1792 }
1793
1794 /* If resets are disabled then leave the HBA alone and return */
1795 if (!phba->cfg_enable_hba_reset)
1796 return;
1797
1798 /* Send an internal error event to mgmt application */
1799 lpfc_board_errevt_to_mgmt(phba);
1800
1801 if (test_bit(DEFER_ERATT, &phba->hba_flag))
1802 lpfc_handle_deferred_eratt(phba);
1803
1804 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1805 if (phba->work_hs & HS_FFER6)
1806 /* Re-establishing Link */
1807 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1808 "1301 Re-establishing Link "
1809 "Data: x%x x%x x%x\n",
1810 phba->work_hs, phba->work_status[0],
1811 phba->work_status[1]);
1812 if (phba->work_hs & HS_FFER8)
1813 /* Device Zeroization */
1814 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1815 "2861 Host Authentication device "
1816 "zeroization Data:x%x x%x x%x\n",
1817 phba->work_hs, phba->work_status[0],
1818 phba->work_status[1]);
1819
1820 spin_lock_irq(&phba->hbalock);
1821 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1822 spin_unlock_irq(&phba->hbalock);
1823
1824 /*
1825 * Firmware stops when it triggled erratt with HS_FFER6.
1826 * That could cause the I/Os dropped by the firmware.
1827 * Error iocb (I/O) on txcmplq and let the SCSI layer
1828 * retry it after re-establishing link.
1829 */
1830 lpfc_sli_abort_fcp_rings(phba);
1831
1832 /*
1833 * There was a firmware error. Take the hba offline and then
1834 * attempt to restart it.
1835 */
1836 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1837 lpfc_offline(phba);
1838 lpfc_sli_brdrestart(phba);
1839 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1840 lpfc_unblock_mgmt_io(phba);
1841 return;
1842 }
1843 lpfc_unblock_mgmt_io(phba);
1844 } else if (phba->work_hs & HS_CRIT_TEMP) {
1845 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1846 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1847 temp_event_data.event_code = LPFC_CRIT_TEMP;
1848 temp_event_data.data = (uint32_t)temperature;
1849
1850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1851 "0406 Adapter maximum temperature exceeded "
1852 "(%ld), taking this port offline "
1853 "Data: x%x x%x x%x\n",
1854 temperature, phba->work_hs,
1855 phba->work_status[0], phba->work_status[1]);
1856
1857 shost = lpfc_shost_from_vport(phba->pport);
1858 fc_host_post_vendor_event(shost, fc_get_event_number(),
1859 sizeof(temp_event_data),
1860 (char *) &temp_event_data,
1861 SCSI_NL_VID_TYPE_PCI
1862 | PCI_VENDOR_ID_EMULEX);
1863
1864 spin_lock_irq(&phba->hbalock);
1865 phba->over_temp_state = HBA_OVER_TEMP;
1866 spin_unlock_irq(&phba->hbalock);
1867 lpfc_offline_eratt(phba);
1868
1869 } else {
1870 /* The if clause above forces this code path when the status
1871 * failure is a value other than FFER6. Do not call the offline
1872 * twice. This is the adapter hardware error path.
1873 */
1874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1875 "0457 Adapter Hardware Error "
1876 "Data: x%x x%x x%x\n",
1877 phba->work_hs,
1878 phba->work_status[0], phba->work_status[1]);
1879
1880 event_data = FC_REG_DUMP_EVENT;
1881 shost = lpfc_shost_from_vport(vport);
1882 fc_host_post_vendor_event(shost, fc_get_event_number(),
1883 sizeof(event_data), (char *) &event_data,
1884 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1885
1886 lpfc_offline_eratt(phba);
1887 }
1888 return;
1889 }
1890
1891 /**
1892 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1893 * @phba: pointer to lpfc hba data structure.
1894 * @mbx_action: flag for mailbox shutdown action.
1895 * @en_rn_msg: send reset/port recovery message.
1896 * This routine is invoked to perform an SLI4 port PCI function reset in
1897 * response to port status register polling attention. It waits for port
1898 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1899 * During this process, interrupt vectors are freed and later requested
1900 * for handling possible port resource change.
1901 **/
1902 static int
lpfc_sli4_port_sta_fn_reset(struct lpfc_hba * phba,int mbx_action,bool en_rn_msg)1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1904 bool en_rn_msg)
1905 {
1906 int rc;
1907 uint32_t intr_mode;
1908 LPFC_MBOXQ_t *mboxq;
1909
1910 /* Notifying the transport that the targets are going offline. */
1911 lpfc_scsi_dev_block(phba);
1912
1913 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1914 LPFC_SLI_INTF_IF_TYPE_2) {
1915 /*
1916 * On error status condition, driver need to wait for port
1917 * ready before performing reset.
1918 */
1919 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1920 if (rc)
1921 return rc;
1922 }
1923
1924 /* need reset: attempt for port recovery */
1925 if (en_rn_msg)
1926 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1927 "2887 Reset Needed: Attempting Port "
1928 "Recovery...\n");
1929
1930 /* If we are no wait, the HBA has been reset and is not
1931 * functional, thus we should clear
1932 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1933 */
1934 if (mbx_action == LPFC_MBX_NO_WAIT) {
1935 spin_lock_irq(&phba->hbalock);
1936 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1937 if (phba->sli.mbox_active) {
1938 mboxq = phba->sli.mbox_active;
1939 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1940 __lpfc_mbox_cmpl_put(phba, mboxq);
1941 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1942 phba->sli.mbox_active = NULL;
1943 }
1944 spin_unlock_irq(&phba->hbalock);
1945 }
1946
1947 lpfc_offline_prep(phba, mbx_action);
1948 lpfc_sli_flush_io_rings(phba);
1949 lpfc_nvmels_flush_cmd(phba);
1950 lpfc_offline(phba);
1951 /* release interrupt for possible resource change */
1952 lpfc_sli4_disable_intr(phba);
1953 rc = lpfc_sli_brdrestart(phba);
1954 if (rc) {
1955 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1956 "6309 Failed to restart board\n");
1957 return rc;
1958 }
1959 /* request and enable interrupt */
1960 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1961 if (intr_mode == LPFC_INTR_ERROR) {
1962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1963 "3175 Failed to enable interrupt\n");
1964 return -EIO;
1965 }
1966 phba->intr_mode = intr_mode;
1967 rc = lpfc_online(phba);
1968 if (rc == 0)
1969 lpfc_unblock_mgmt_io(phba);
1970
1971 return rc;
1972 }
1973
1974 /**
1975 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1976 * @phba: pointer to lpfc hba data structure.
1977 *
1978 * This routine is invoked to handle the SLI4 HBA hardware error attention
1979 * conditions.
1980 **/
1981 static void
lpfc_handle_eratt_s4(struct lpfc_hba * phba)1982 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1983 {
1984 struct lpfc_vport *vport = phba->pport;
1985 uint32_t event_data;
1986 struct Scsi_Host *shost;
1987 uint32_t if_type;
1988 struct lpfc_register portstat_reg = {0};
1989 uint32_t reg_err1, reg_err2;
1990 uint32_t uerrlo_reg, uemasklo_reg;
1991 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1992 bool en_rn_msg = true;
1993 struct temp_event temp_event_data;
1994 struct lpfc_register portsmphr_reg;
1995 int rc, i;
1996
1997 /* If the pci channel is offline, ignore possible errors, since
1998 * we cannot communicate with the pci card anyway.
1999 */
2000 if (pci_channel_offline(phba->pcidev)) {
2001 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2002 "3166 pci channel is offline\n");
2003 lpfc_sli_flush_io_rings(phba);
2004 return;
2005 }
2006
2007 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2008 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2009 switch (if_type) {
2010 case LPFC_SLI_INTF_IF_TYPE_0:
2011 pci_rd_rc1 = lpfc_readl(
2012 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2013 &uerrlo_reg);
2014 pci_rd_rc2 = lpfc_readl(
2015 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2016 &uemasklo_reg);
2017 /* consider PCI bus read error as pci_channel_offline */
2018 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2019 return;
2020 if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) {
2021 lpfc_sli4_offline_eratt(phba);
2022 return;
2023 }
2024 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2025 "7623 Checking UE recoverable");
2026
2027 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2028 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2029 &portsmphr_reg.word0))
2030 continue;
2031
2032 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2033 &portsmphr_reg);
2034 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2035 LPFC_PORT_SEM_UE_RECOVERABLE)
2036 break;
2037 /*Sleep for 1Sec, before checking SEMAPHORE */
2038 msleep(1000);
2039 }
2040
2041 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2042 "4827 smphr_port_status x%x : Waited %dSec",
2043 smphr_port_status, i);
2044
2045 /* Recoverable UE, reset the HBA device */
2046 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2047 LPFC_PORT_SEM_UE_RECOVERABLE) {
2048 for (i = 0; i < 20; i++) {
2049 msleep(1000);
2050 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2051 &portsmphr_reg.word0) &&
2052 (LPFC_POST_STAGE_PORT_READY ==
2053 bf_get(lpfc_port_smphr_port_status,
2054 &portsmphr_reg))) {
2055 rc = lpfc_sli4_port_sta_fn_reset(phba,
2056 LPFC_MBX_NO_WAIT, en_rn_msg);
2057 if (rc == 0)
2058 return;
2059 lpfc_printf_log(phba, KERN_ERR,
2060 LOG_TRACE_EVENT,
2061 "4215 Failed to recover UE");
2062 break;
2063 }
2064 }
2065 }
2066 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2067 "7624 Firmware not ready: Failing UE recovery,"
2068 " waited %dSec", i);
2069 phba->link_state = LPFC_HBA_ERROR;
2070 break;
2071
2072 case LPFC_SLI_INTF_IF_TYPE_2:
2073 case LPFC_SLI_INTF_IF_TYPE_6:
2074 pci_rd_rc1 = lpfc_readl(
2075 phba->sli4_hba.u.if_type2.STATUSregaddr,
2076 &portstat_reg.word0);
2077 /* consider PCI bus read error as pci_channel_offline */
2078 if (pci_rd_rc1 == -EIO) {
2079 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2080 "3151 PCI bus read access failure: x%x\n",
2081 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2082 lpfc_sli4_offline_eratt(phba);
2083 return;
2084 }
2085 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2086 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2087 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2088 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2089 "2889 Port Overtemperature event, "
2090 "taking port offline Data: x%x x%x\n",
2091 reg_err1, reg_err2);
2092
2093 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2094 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2095 temp_event_data.event_code = LPFC_CRIT_TEMP;
2096 temp_event_data.data = 0xFFFFFFFF;
2097
2098 shost = lpfc_shost_from_vport(phba->pport);
2099 fc_host_post_vendor_event(shost, fc_get_event_number(),
2100 sizeof(temp_event_data),
2101 (char *)&temp_event_data,
2102 SCSI_NL_VID_TYPE_PCI
2103 | PCI_VENDOR_ID_EMULEX);
2104
2105 spin_lock_irq(&phba->hbalock);
2106 phba->over_temp_state = HBA_OVER_TEMP;
2107 spin_unlock_irq(&phba->hbalock);
2108 lpfc_sli4_offline_eratt(phba);
2109 return;
2110 }
2111 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2112 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2113 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2114 "3143 Port Down: Firmware Update "
2115 "Detected\n");
2116 en_rn_msg = false;
2117 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2118 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2120 "3144 Port Down: Debug Dump\n");
2121 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2122 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2123 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2124 "3145 Port Down: Provisioning\n");
2125
2126 /* If resets are disabled then leave the HBA alone and return */
2127 if (!phba->cfg_enable_hba_reset)
2128 return;
2129
2130 /* Check port status register for function reset */
2131 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2132 en_rn_msg);
2133 if (rc == 0) {
2134 /* don't report event on forced debug dump */
2135 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2136 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2137 return;
2138 else
2139 break;
2140 }
2141 /* fall through for not able to recover */
2142 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2143 "3152 Unrecoverable error\n");
2144 lpfc_sli4_offline_eratt(phba);
2145 break;
2146 case LPFC_SLI_INTF_IF_TYPE_1:
2147 default:
2148 break;
2149 }
2150 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2151 "3123 Report dump event to upper layer\n");
2152 /* Send an internal error event to mgmt application */
2153 lpfc_board_errevt_to_mgmt(phba);
2154
2155 event_data = FC_REG_DUMP_EVENT;
2156 shost = lpfc_shost_from_vport(vport);
2157 fc_host_post_vendor_event(shost, fc_get_event_number(),
2158 sizeof(event_data), (char *) &event_data,
2159 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2160 }
2161
2162 /**
2163 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2164 * @phba: pointer to lpfc HBA data structure.
2165 *
2166 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2167 * routine from the API jump table function pointer from the lpfc_hba struct.
2168 *
2169 * Return codes
2170 * 0 - success.
2171 * Any other value - error.
2172 **/
2173 void
lpfc_handle_eratt(struct lpfc_hba * phba)2174 lpfc_handle_eratt(struct lpfc_hba *phba)
2175 {
2176 (*phba->lpfc_handle_eratt)(phba);
2177 }
2178
2179 /**
2180 * lpfc_handle_latt - The HBA link event handler
2181 * @phba: pointer to lpfc hba data structure.
2182 *
2183 * This routine is invoked from the worker thread to handle a HBA host
2184 * attention link event. SLI3 only.
2185 **/
2186 void
lpfc_handle_latt(struct lpfc_hba * phba)2187 lpfc_handle_latt(struct lpfc_hba *phba)
2188 {
2189 struct lpfc_vport *vport = phba->pport;
2190 struct lpfc_sli *psli = &phba->sli;
2191 LPFC_MBOXQ_t *pmb;
2192 volatile uint32_t control;
2193 int rc = 0;
2194
2195 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2196 if (!pmb) {
2197 rc = 1;
2198 goto lpfc_handle_latt_err_exit;
2199 }
2200
2201 rc = lpfc_mbox_rsrc_prep(phba, pmb);
2202 if (rc) {
2203 rc = 2;
2204 mempool_free(pmb, phba->mbox_mem_pool);
2205 goto lpfc_handle_latt_err_exit;
2206 }
2207
2208 /* Cleanup any outstanding ELS commands */
2209 lpfc_els_flush_all_cmd(phba);
2210 psli->slistat.link_event++;
2211 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
2212 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2213 pmb->vport = vport;
2214 /* Block ELS IOCBs until we have processed this mbox command */
2215 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2216 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2217 if (rc == MBX_NOT_FINISHED) {
2218 rc = 4;
2219 goto lpfc_handle_latt_free_mbuf;
2220 }
2221
2222 /* Clear Link Attention in HA REG */
2223 spin_lock_irq(&phba->hbalock);
2224 writel(HA_LATT, phba->HAregaddr);
2225 readl(phba->HAregaddr); /* flush */
2226 spin_unlock_irq(&phba->hbalock);
2227
2228 return;
2229
2230 lpfc_handle_latt_free_mbuf:
2231 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2232 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2233 lpfc_handle_latt_err_exit:
2234 /* Enable Link attention interrupts */
2235 spin_lock_irq(&phba->hbalock);
2236 psli->sli_flag |= LPFC_PROCESS_LA;
2237 control = readl(phba->HCregaddr);
2238 control |= HC_LAINT_ENA;
2239 writel(control, phba->HCregaddr);
2240 readl(phba->HCregaddr); /* flush */
2241
2242 /* Clear Link Attention in HA REG */
2243 writel(HA_LATT, phba->HAregaddr);
2244 readl(phba->HAregaddr); /* flush */
2245 spin_unlock_irq(&phba->hbalock);
2246 lpfc_linkdown(phba);
2247 phba->link_state = LPFC_HBA_ERROR;
2248
2249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2250 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2251
2252 return;
2253 }
2254
2255 static void
lpfc_fill_vpd(struct lpfc_hba * phba,uint8_t * vpd,int length,int * pindex)2256 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2257 {
2258 int i, j;
2259
2260 while (length > 0) {
2261 /* Look for Serial Number */
2262 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2263 *pindex += 2;
2264 i = vpd[*pindex];
2265 *pindex += 1;
2266 j = 0;
2267 length -= (3+i);
2268 while (i--) {
2269 phba->SerialNumber[j++] = vpd[(*pindex)++];
2270 if (j == 31)
2271 break;
2272 }
2273 phba->SerialNumber[j] = 0;
2274 continue;
2275 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2276 phba->vpd_flag |= VPD_MODEL_DESC;
2277 *pindex += 2;
2278 i = vpd[*pindex];
2279 *pindex += 1;
2280 j = 0;
2281 length -= (3+i);
2282 while (i--) {
2283 phba->ModelDesc[j++] = vpd[(*pindex)++];
2284 if (j == 255)
2285 break;
2286 }
2287 phba->ModelDesc[j] = 0;
2288 continue;
2289 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2290 phba->vpd_flag |= VPD_MODEL_NAME;
2291 *pindex += 2;
2292 i = vpd[*pindex];
2293 *pindex += 1;
2294 j = 0;
2295 length -= (3+i);
2296 while (i--) {
2297 phba->ModelName[j++] = vpd[(*pindex)++];
2298 if (j == 79)
2299 break;
2300 }
2301 phba->ModelName[j] = 0;
2302 continue;
2303 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2304 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2305 *pindex += 2;
2306 i = vpd[*pindex];
2307 *pindex += 1;
2308 j = 0;
2309 length -= (3+i);
2310 while (i--) {
2311 phba->ProgramType[j++] = vpd[(*pindex)++];
2312 if (j == 255)
2313 break;
2314 }
2315 phba->ProgramType[j] = 0;
2316 continue;
2317 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2318 phba->vpd_flag |= VPD_PORT;
2319 *pindex += 2;
2320 i = vpd[*pindex];
2321 *pindex += 1;
2322 j = 0;
2323 length -= (3 + i);
2324 while (i--) {
2325 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2326 (phba->sli4_hba.pport_name_sta ==
2327 LPFC_SLI4_PPNAME_GET)) {
2328 j++;
2329 (*pindex)++;
2330 } else
2331 phba->Port[j++] = vpd[(*pindex)++];
2332 if (j == 19)
2333 break;
2334 }
2335 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2336 (phba->sli4_hba.pport_name_sta ==
2337 LPFC_SLI4_PPNAME_NON))
2338 phba->Port[j] = 0;
2339 continue;
2340 } else {
2341 *pindex += 2;
2342 i = vpd[*pindex];
2343 *pindex += 1;
2344 *pindex += i;
2345 length -= (3 + i);
2346 }
2347 }
2348 }
2349
2350 /**
2351 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2352 * @phba: pointer to lpfc hba data structure.
2353 * @vpd: pointer to the vital product data.
2354 * @len: length of the vital product data in bytes.
2355 *
2356 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2357 * an array of characters. In this routine, the ModelName, ProgramType, and
2358 * ModelDesc, etc. fields of the phba data structure will be populated.
2359 *
2360 * Return codes
2361 * 0 - pointer to the VPD passed in is NULL
2362 * 1 - success
2363 **/
2364 int
lpfc_parse_vpd(struct lpfc_hba * phba,uint8_t * vpd,int len)2365 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2366 {
2367 uint8_t lenlo, lenhi;
2368 int Length;
2369 int i;
2370 int finished = 0;
2371 int index = 0;
2372
2373 if (!vpd)
2374 return 0;
2375
2376 /* Vital Product */
2377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2378 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2379 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2380 (uint32_t) vpd[3]);
2381 while (!finished && (index < (len - 4))) {
2382 switch (vpd[index]) {
2383 case 0x82:
2384 case 0x91:
2385 index += 1;
2386 lenlo = vpd[index];
2387 index += 1;
2388 lenhi = vpd[index];
2389 index += 1;
2390 i = ((((unsigned short)lenhi) << 8) + lenlo);
2391 index += i;
2392 break;
2393 case 0x90:
2394 index += 1;
2395 lenlo = vpd[index];
2396 index += 1;
2397 lenhi = vpd[index];
2398 index += 1;
2399 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2400 if (Length > len - index)
2401 Length = len - index;
2402
2403 lpfc_fill_vpd(phba, vpd, Length, &index);
2404 finished = 0;
2405 break;
2406 case 0x78:
2407 finished = 1;
2408 break;
2409 default:
2410 index ++;
2411 break;
2412 }
2413 }
2414
2415 return(1);
2416 }
2417
2418 /**
2419 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2420 * @phba: pointer to lpfc hba data structure.
2421 * @mdp: pointer to the data structure to hold the derived model name.
2422 * @descp: pointer to the data structure to hold the derived description.
2423 *
2424 * This routine retrieves HBA's description based on its registered PCI device
2425 * ID. The @descp passed into this function points to an array of 256 chars. It
2426 * shall be returned with the model name, maximum speed, and the host bus type.
2427 * The @mdp passed into this function points to an array of 80 chars. When the
2428 * function returns, the @mdp will be filled with the model name.
2429 **/
2430 static void
lpfc_get_atto_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2431 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2432 {
2433 uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2434 char *model = "<Unknown>";
2435 int tbolt = 0;
2436
2437 switch (sub_dev_id) {
2438 case PCI_DEVICE_ID_CLRY_161E:
2439 model = "161E";
2440 break;
2441 case PCI_DEVICE_ID_CLRY_162E:
2442 model = "162E";
2443 break;
2444 case PCI_DEVICE_ID_CLRY_164E:
2445 model = "164E";
2446 break;
2447 case PCI_DEVICE_ID_CLRY_161P:
2448 model = "161P";
2449 break;
2450 case PCI_DEVICE_ID_CLRY_162P:
2451 model = "162P";
2452 break;
2453 case PCI_DEVICE_ID_CLRY_164P:
2454 model = "164P";
2455 break;
2456 case PCI_DEVICE_ID_CLRY_321E:
2457 model = "321E";
2458 break;
2459 case PCI_DEVICE_ID_CLRY_322E:
2460 model = "322E";
2461 break;
2462 case PCI_DEVICE_ID_CLRY_324E:
2463 model = "324E";
2464 break;
2465 case PCI_DEVICE_ID_CLRY_321P:
2466 model = "321P";
2467 break;
2468 case PCI_DEVICE_ID_CLRY_322P:
2469 model = "322P";
2470 break;
2471 case PCI_DEVICE_ID_CLRY_324P:
2472 model = "324P";
2473 break;
2474 case PCI_DEVICE_ID_TLFC_2XX2:
2475 model = "2XX2";
2476 tbolt = 1;
2477 break;
2478 case PCI_DEVICE_ID_TLFC_3162:
2479 model = "3162";
2480 tbolt = 1;
2481 break;
2482 case PCI_DEVICE_ID_TLFC_3322:
2483 model = "3322";
2484 tbolt = 1;
2485 break;
2486 default:
2487 model = "Unknown";
2488 break;
2489 }
2490
2491 if (mdp && mdp[0] == '\0')
2492 snprintf(mdp, 79, "%s", model);
2493
2494 if (descp && descp[0] == '\0')
2495 snprintf(descp, 255,
2496 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2497 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2498 model,
2499 phba->Port);
2500 }
2501
2502 /**
2503 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2504 * @phba: pointer to lpfc hba data structure.
2505 * @mdp: pointer to the data structure to hold the derived model name.
2506 * @descp: pointer to the data structure to hold the derived description.
2507 *
2508 * This routine retrieves HBA's description based on its registered PCI device
2509 * ID. The @descp passed into this function points to an array of 256 chars. It
2510 * shall be returned with the model name, maximum speed, and the host bus type.
2511 * The @mdp passed into this function points to an array of 80 chars. When the
2512 * function returns, the @mdp will be filled with the model name.
2513 **/
2514 static void
lpfc_get_hba_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2515 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2516 {
2517 lpfc_vpd_t *vp;
2518 uint16_t dev_id = phba->pcidev->device;
2519 int max_speed;
2520 int GE = 0;
2521 int oneConnect = 0; /* default is not a oneConnect */
2522 struct {
2523 char *name;
2524 char *bus;
2525 char *function;
2526 } m = {"<Unknown>", "", ""};
2527
2528 if (mdp && mdp[0] != '\0'
2529 && descp && descp[0] != '\0')
2530 return;
2531
2532 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2533 lpfc_get_atto_model_desc(phba, mdp, descp);
2534 return;
2535 }
2536
2537 if (phba->lmt & LMT_64Gb)
2538 max_speed = 64;
2539 else if (phba->lmt & LMT_32Gb)
2540 max_speed = 32;
2541 else if (phba->lmt & LMT_16Gb)
2542 max_speed = 16;
2543 else if (phba->lmt & LMT_10Gb)
2544 max_speed = 10;
2545 else if (phba->lmt & LMT_8Gb)
2546 max_speed = 8;
2547 else if (phba->lmt & LMT_4Gb)
2548 max_speed = 4;
2549 else if (phba->lmt & LMT_2Gb)
2550 max_speed = 2;
2551 else if (phba->lmt & LMT_1Gb)
2552 max_speed = 1;
2553 else
2554 max_speed = 0;
2555
2556 vp = &phba->vpd;
2557
2558 switch (dev_id) {
2559 case PCI_DEVICE_ID_FIREFLY:
2560 m = (typeof(m)){"LP6000", "PCI",
2561 "Obsolete, Unsupported Fibre Channel Adapter"};
2562 break;
2563 case PCI_DEVICE_ID_SUPERFLY:
2564 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2565 m = (typeof(m)){"LP7000", "PCI", ""};
2566 else
2567 m = (typeof(m)){"LP7000E", "PCI", ""};
2568 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2569 break;
2570 case PCI_DEVICE_ID_DRAGONFLY:
2571 m = (typeof(m)){"LP8000", "PCI",
2572 "Obsolete, Unsupported Fibre Channel Adapter"};
2573 break;
2574 case PCI_DEVICE_ID_CENTAUR:
2575 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2576 m = (typeof(m)){"LP9002", "PCI", ""};
2577 else
2578 m = (typeof(m)){"LP9000", "PCI", ""};
2579 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2580 break;
2581 case PCI_DEVICE_ID_RFLY:
2582 m = (typeof(m)){"LP952", "PCI",
2583 "Obsolete, Unsupported Fibre Channel Adapter"};
2584 break;
2585 case PCI_DEVICE_ID_PEGASUS:
2586 m = (typeof(m)){"LP9802", "PCI-X",
2587 "Obsolete, Unsupported Fibre Channel Adapter"};
2588 break;
2589 case PCI_DEVICE_ID_THOR:
2590 m = (typeof(m)){"LP10000", "PCI-X",
2591 "Obsolete, Unsupported Fibre Channel Adapter"};
2592 break;
2593 case PCI_DEVICE_ID_VIPER:
2594 m = (typeof(m)){"LPX1000", "PCI-X",
2595 "Obsolete, Unsupported Fibre Channel Adapter"};
2596 break;
2597 case PCI_DEVICE_ID_PFLY:
2598 m = (typeof(m)){"LP982", "PCI-X",
2599 "Obsolete, Unsupported Fibre Channel Adapter"};
2600 break;
2601 case PCI_DEVICE_ID_TFLY:
2602 m = (typeof(m)){"LP1050", "PCI-X",
2603 "Obsolete, Unsupported Fibre Channel Adapter"};
2604 break;
2605 case PCI_DEVICE_ID_HELIOS:
2606 m = (typeof(m)){"LP11000", "PCI-X2",
2607 "Obsolete, Unsupported Fibre Channel Adapter"};
2608 break;
2609 case PCI_DEVICE_ID_HELIOS_SCSP:
2610 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2611 "Obsolete, Unsupported Fibre Channel Adapter"};
2612 break;
2613 case PCI_DEVICE_ID_HELIOS_DCSP:
2614 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2615 "Obsolete, Unsupported Fibre Channel Adapter"};
2616 break;
2617 case PCI_DEVICE_ID_NEPTUNE:
2618 m = (typeof(m)){"LPe1000", "PCIe",
2619 "Obsolete, Unsupported Fibre Channel Adapter"};
2620 break;
2621 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2622 m = (typeof(m)){"LPe1000-SP", "PCIe",
2623 "Obsolete, Unsupported Fibre Channel Adapter"};
2624 break;
2625 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2626 m = (typeof(m)){"LPe1002-SP", "PCIe",
2627 "Obsolete, Unsupported Fibre Channel Adapter"};
2628 break;
2629 case PCI_DEVICE_ID_BMID:
2630 m = (typeof(m)){"LP1150", "PCI-X2",
2631 "Obsolete, Unsupported Fibre Channel Adapter"};
2632 break;
2633 case PCI_DEVICE_ID_BSMB:
2634 m = (typeof(m)){"LP111", "PCI-X2",
2635 "Obsolete, Unsupported Fibre Channel Adapter"};
2636 break;
2637 case PCI_DEVICE_ID_ZEPHYR:
2638 m = (typeof(m)){"LPe11000", "PCIe",
2639 "Obsolete, Unsupported Fibre Channel Adapter"};
2640 break;
2641 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2642 m = (typeof(m)){"LPe11000", "PCIe",
2643 "Obsolete, Unsupported Fibre Channel Adapter"};
2644 break;
2645 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2646 m = (typeof(m)){"LP2105", "PCIe",
2647 "Obsolete, Unsupported FCoE Adapter"};
2648 GE = 1;
2649 break;
2650 case PCI_DEVICE_ID_ZMID:
2651 m = (typeof(m)){"LPe1150", "PCIe",
2652 "Obsolete, Unsupported Fibre Channel Adapter"};
2653 break;
2654 case PCI_DEVICE_ID_ZSMB:
2655 m = (typeof(m)){"LPe111", "PCIe",
2656 "Obsolete, Unsupported Fibre Channel Adapter"};
2657 break;
2658 case PCI_DEVICE_ID_LP101:
2659 m = (typeof(m)){"LP101", "PCI-X",
2660 "Obsolete, Unsupported Fibre Channel Adapter"};
2661 break;
2662 case PCI_DEVICE_ID_LP10000S:
2663 m = (typeof(m)){"LP10000-S", "PCI",
2664 "Obsolete, Unsupported Fibre Channel Adapter"};
2665 break;
2666 case PCI_DEVICE_ID_LP11000S:
2667 m = (typeof(m)){"LP11000-S", "PCI-X2",
2668 "Obsolete, Unsupported Fibre Channel Adapter"};
2669 break;
2670 case PCI_DEVICE_ID_LPE11000S:
2671 m = (typeof(m)){"LPe11000-S", "PCIe",
2672 "Obsolete, Unsupported Fibre Channel Adapter"};
2673 break;
2674 case PCI_DEVICE_ID_SAT:
2675 m = (typeof(m)){"LPe12000", "PCIe",
2676 "Obsolete, Unsupported Fibre Channel Adapter"};
2677 break;
2678 case PCI_DEVICE_ID_SAT_MID:
2679 m = (typeof(m)){"LPe1250", "PCIe",
2680 "Obsolete, Unsupported Fibre Channel Adapter"};
2681 break;
2682 case PCI_DEVICE_ID_SAT_SMB:
2683 m = (typeof(m)){"LPe121", "PCIe",
2684 "Obsolete, Unsupported Fibre Channel Adapter"};
2685 break;
2686 case PCI_DEVICE_ID_SAT_DCSP:
2687 m = (typeof(m)){"LPe12002-SP", "PCIe",
2688 "Obsolete, Unsupported Fibre Channel Adapter"};
2689 break;
2690 case PCI_DEVICE_ID_SAT_SCSP:
2691 m = (typeof(m)){"LPe12000-SP", "PCIe",
2692 "Obsolete, Unsupported Fibre Channel Adapter"};
2693 break;
2694 case PCI_DEVICE_ID_SAT_S:
2695 m = (typeof(m)){"LPe12000-S", "PCIe",
2696 "Obsolete, Unsupported Fibre Channel Adapter"};
2697 break;
2698 case PCI_DEVICE_ID_PROTEUS_VF:
2699 m = (typeof(m)){"LPev12000", "PCIe IOV",
2700 "Obsolete, Unsupported Fibre Channel Adapter"};
2701 break;
2702 case PCI_DEVICE_ID_PROTEUS_PF:
2703 m = (typeof(m)){"LPev12000", "PCIe IOV",
2704 "Obsolete, Unsupported Fibre Channel Adapter"};
2705 break;
2706 case PCI_DEVICE_ID_PROTEUS_S:
2707 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2708 "Obsolete, Unsupported Fibre Channel Adapter"};
2709 break;
2710 case PCI_DEVICE_ID_TIGERSHARK:
2711 oneConnect = 1;
2712 m = (typeof(m)){"OCe10100", "PCIe",
2713 "Obsolete, Unsupported FCoE Adapter"};
2714 break;
2715 case PCI_DEVICE_ID_TOMCAT:
2716 oneConnect = 1;
2717 m = (typeof(m)){"OCe11100", "PCIe",
2718 "Obsolete, Unsupported FCoE Adapter"};
2719 break;
2720 case PCI_DEVICE_ID_FALCON:
2721 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2722 "Obsolete, Unsupported Fibre Channel Adapter"};
2723 break;
2724 case PCI_DEVICE_ID_BALIUS:
2725 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2726 "Obsolete, Unsupported Fibre Channel Adapter"};
2727 break;
2728 case PCI_DEVICE_ID_LANCER_FC:
2729 m = (typeof(m)){"LPe16000", "PCIe",
2730 "Obsolete, Unsupported Fibre Channel Adapter"};
2731 break;
2732 case PCI_DEVICE_ID_LANCER_FC_VF:
2733 m = (typeof(m)){"LPe16000", "PCIe",
2734 "Obsolete, Unsupported Fibre Channel Adapter"};
2735 break;
2736 case PCI_DEVICE_ID_LANCER_FCOE:
2737 oneConnect = 1;
2738 m = (typeof(m)){"OCe15100", "PCIe",
2739 "Obsolete, Unsupported FCoE Adapter"};
2740 break;
2741 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2742 oneConnect = 1;
2743 m = (typeof(m)){"OCe15100", "PCIe",
2744 "Obsolete, Unsupported FCoE Adapter"};
2745 break;
2746 case PCI_DEVICE_ID_LANCER_G6_FC:
2747 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2748 break;
2749 case PCI_DEVICE_ID_LANCER_G7_FC:
2750 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2751 break;
2752 case PCI_DEVICE_ID_LANCER_G7P_FC:
2753 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2754 break;
2755 case PCI_DEVICE_ID_SKYHAWK:
2756 case PCI_DEVICE_ID_SKYHAWK_VF:
2757 oneConnect = 1;
2758 m = (typeof(m)){"OCe14000", "PCIe",
2759 "Obsolete, Unsupported FCoE Adapter"};
2760 break;
2761 default:
2762 m = (typeof(m)){"Unknown", "", ""};
2763 break;
2764 }
2765
2766 if (mdp && mdp[0] == '\0')
2767 snprintf(mdp, 79,"%s", m.name);
2768 /*
2769 * oneConnect hba requires special processing, they are all initiators
2770 * and we put the port number on the end
2771 */
2772 if (descp && descp[0] == '\0') {
2773 if (oneConnect)
2774 snprintf(descp, 255,
2775 "Emulex OneConnect %s, %s Initiator %s",
2776 m.name, m.function,
2777 phba->Port);
2778 else if (max_speed == 0)
2779 snprintf(descp, 255,
2780 "Emulex %s %s %s",
2781 m.name, m.bus, m.function);
2782 else
2783 snprintf(descp, 255,
2784 "Emulex %s %d%s %s %s",
2785 m.name, max_speed, (GE) ? "GE" : "Gb",
2786 m.bus, m.function);
2787 }
2788 }
2789
2790 /**
2791 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2792 * @phba: pointer to lpfc hba data structure.
2793 * @pring: pointer to a IOCB ring.
2794 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2795 *
2796 * This routine posts a given number of IOCBs with the associated DMA buffer
2797 * descriptors specified by the cnt argument to the given IOCB ring.
2798 *
2799 * Return codes
2800 * The number of IOCBs NOT able to be posted to the IOCB ring.
2801 **/
2802 int
lpfc_sli3_post_buffer(struct lpfc_hba * phba,struct lpfc_sli_ring * pring,int cnt)2803 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2804 {
2805 IOCB_t *icmd;
2806 struct lpfc_iocbq *iocb;
2807 struct lpfc_dmabuf *mp1, *mp2;
2808
2809 cnt += pring->missbufcnt;
2810
2811 /* While there are buffers to post */
2812 while (cnt > 0) {
2813 /* Allocate buffer for command iocb */
2814 iocb = lpfc_sli_get_iocbq(phba);
2815 if (iocb == NULL) {
2816 pring->missbufcnt = cnt;
2817 return cnt;
2818 }
2819 icmd = &iocb->iocb;
2820
2821 /* 2 buffers can be posted per command */
2822 /* Allocate buffer to post */
2823 mp1 = kmalloc_obj(struct lpfc_dmabuf);
2824 if (mp1)
2825 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2826 if (!mp1 || !mp1->virt) {
2827 kfree(mp1);
2828 lpfc_sli_release_iocbq(phba, iocb);
2829 pring->missbufcnt = cnt;
2830 return cnt;
2831 }
2832
2833 INIT_LIST_HEAD(&mp1->list);
2834 /* Allocate buffer to post */
2835 if (cnt > 1) {
2836 mp2 = kmalloc_obj(struct lpfc_dmabuf);
2837 if (mp2)
2838 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2839 &mp2->phys);
2840 if (!mp2 || !mp2->virt) {
2841 kfree(mp2);
2842 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2843 kfree(mp1);
2844 lpfc_sli_release_iocbq(phba, iocb);
2845 pring->missbufcnt = cnt;
2846 return cnt;
2847 }
2848
2849 INIT_LIST_HEAD(&mp2->list);
2850 } else {
2851 mp2 = NULL;
2852 }
2853
2854 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2855 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2856 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2857 icmd->ulpBdeCount = 1;
2858 cnt--;
2859 if (mp2) {
2860 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2861 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2862 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2863 cnt--;
2864 icmd->ulpBdeCount = 2;
2865 }
2866
2867 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2868 icmd->ulpLe = 1;
2869
2870 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2871 IOCB_ERROR) {
2872 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2873 kfree(mp1);
2874 cnt++;
2875 if (mp2) {
2876 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2877 kfree(mp2);
2878 cnt++;
2879 }
2880 lpfc_sli_release_iocbq(phba, iocb);
2881 pring->missbufcnt = cnt;
2882 return cnt;
2883 }
2884 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2885 if (mp2)
2886 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2887 }
2888 pring->missbufcnt = 0;
2889 return 0;
2890 }
2891
2892 /**
2893 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2894 * @phba: pointer to lpfc hba data structure.
2895 *
2896 * This routine posts initial receive IOCB buffers to the ELS ring. The
2897 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2898 * set to 64 IOCBs. SLI3 only.
2899 *
2900 * Return codes
2901 * 0 - success (currently always success)
2902 **/
2903 static int
lpfc_post_rcv_buf(struct lpfc_hba * phba)2904 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2905 {
2906 struct lpfc_sli *psli = &phba->sli;
2907
2908 /* Ring 0, ELS / CT buffers */
2909 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2910 /* Ring 2 - FCP no buffers needed */
2911
2912 return 0;
2913 }
2914
2915 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2916
2917 /**
2918 * lpfc_sha_init - Set up initial array of hash table entries
2919 * @HashResultPointer: pointer to an array as hash table.
2920 *
2921 * This routine sets up the initial values to the array of hash table entries
2922 * for the LC HBAs.
2923 **/
2924 static void
lpfc_sha_init(uint32_t * HashResultPointer)2925 lpfc_sha_init(uint32_t * HashResultPointer)
2926 {
2927 HashResultPointer[0] = 0x67452301;
2928 HashResultPointer[1] = 0xEFCDAB89;
2929 HashResultPointer[2] = 0x98BADCFE;
2930 HashResultPointer[3] = 0x10325476;
2931 HashResultPointer[4] = 0xC3D2E1F0;
2932 }
2933
2934 /**
2935 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2936 * @HashResultPointer: pointer to an initial/result hash table.
2937 * @HashWorkingPointer: pointer to an working hash table.
2938 *
2939 * This routine iterates an initial hash table pointed by @HashResultPointer
2940 * with the values from the working hash table pointeed by @HashWorkingPointer.
2941 * The results are putting back to the initial hash table, returned through
2942 * the @HashResultPointer as the result hash table.
2943 **/
2944 static void
lpfc_sha_iterate(uint32_t * HashResultPointer,uint32_t * HashWorkingPointer)2945 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2946 {
2947 int t;
2948 uint32_t TEMP;
2949 uint32_t A, B, C, D, E;
2950 t = 16;
2951 do {
2952 HashWorkingPointer[t] =
2953 S(1,
2954 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2955 8] ^
2956 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2957 } while (++t <= 79);
2958 t = 0;
2959 A = HashResultPointer[0];
2960 B = HashResultPointer[1];
2961 C = HashResultPointer[2];
2962 D = HashResultPointer[3];
2963 E = HashResultPointer[4];
2964
2965 do {
2966 if (t < 20) {
2967 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2968 } else if (t < 40) {
2969 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2970 } else if (t < 60) {
2971 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2972 } else {
2973 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2974 }
2975 TEMP += S(5, A) + E + HashWorkingPointer[t];
2976 E = D;
2977 D = C;
2978 C = S(30, B);
2979 B = A;
2980 A = TEMP;
2981 } while (++t <= 79);
2982
2983 HashResultPointer[0] += A;
2984 HashResultPointer[1] += B;
2985 HashResultPointer[2] += C;
2986 HashResultPointer[3] += D;
2987 HashResultPointer[4] += E;
2988
2989 }
2990
2991 /**
2992 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2993 * @RandomChallenge: pointer to the entry of host challenge random number array.
2994 * @HashWorking: pointer to the entry of the working hash array.
2995 *
2996 * This routine calculates the working hash array referred by @HashWorking
2997 * from the challenge random numbers associated with the host, referred by
2998 * @RandomChallenge. The result is put into the entry of the working hash
2999 * array and returned by reference through @HashWorking.
3000 **/
3001 static void
lpfc_challenge_key(uint32_t * RandomChallenge,uint32_t * HashWorking)3002 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
3003 {
3004 *HashWorking = (*RandomChallenge ^ *HashWorking);
3005 }
3006
3007 /**
3008 * lpfc_hba_init - Perform special handling for LC HBA initialization
3009 * @phba: pointer to lpfc hba data structure.
3010 * @hbainit: pointer to an array of unsigned 32-bit integers.
3011 *
3012 * This routine performs the special handling for LC HBA initialization.
3013 **/
3014 void
lpfc_hba_init(struct lpfc_hba * phba,uint32_t * hbainit)3015 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
3016 {
3017 int t;
3018 uint32_t *HashWorking;
3019 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
3020
3021 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3022 if (!HashWorking)
3023 return;
3024
3025 HashWorking[0] = HashWorking[78] = *pwwnn++;
3026 HashWorking[1] = HashWorking[79] = *pwwnn;
3027
3028 for (t = 0; t < 7; t++)
3029 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3030
3031 lpfc_sha_init(hbainit);
3032 lpfc_sha_iterate(hbainit, HashWorking);
3033 kfree(HashWorking);
3034 }
3035
3036 /**
3037 * lpfc_cleanup - Performs vport cleanups before deleting a vport
3038 * @vport: pointer to a virtual N_Port data structure.
3039 *
3040 * This routine performs the necessary cleanups before deleting the @vport.
3041 * It invokes the discovery state machine to perform necessary state
3042 * transitions and to release the ndlps associated with the @vport. Note,
3043 * the physical port is treated as @vport 0.
3044 **/
3045 void
lpfc_cleanup(struct lpfc_vport * vport)3046 lpfc_cleanup(struct lpfc_vport *vport)
3047 {
3048 struct lpfc_hba *phba = vport->phba;
3049 struct lpfc_nodelist *ndlp, *next_ndlp;
3050 int i = 0;
3051
3052 if (phba->link_state > LPFC_LINK_DOWN)
3053 lpfc_port_link_failure(vport);
3054
3055 /* Clean up VMID resources */
3056 if (lpfc_is_vmid_enabled(phba))
3057 lpfc_vmid_vport_cleanup(vport);
3058
3059 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3060 /* Fabric Ports not in UNMAPPED state are cleaned up in the
3061 * DEVICE_RM event.
3062 */
3063 if (ndlp->nlp_type & NLP_FABRIC &&
3064 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3065 lpfc_disc_state_machine(vport, ndlp, NULL,
3066 NLP_EVT_DEVICE_RECOVERY);
3067
3068 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3069 lpfc_disc_state_machine(vport, ndlp, NULL,
3070 NLP_EVT_DEVICE_RM);
3071 }
3072
3073 /* This is a special case flush to return all
3074 * IOs before entering this loop. There are
3075 * two points in the code where a flush is
3076 * avoided if the FC_UNLOADING flag is set.
3077 * one is in the multipool destroy,
3078 * (this prevents a crash) and the other is
3079 * in the nvme abort handler, ( also prevents
3080 * a crash). Both of these exceptions are
3081 * cases where the slot is still accessible.
3082 * The flush here is only when the pci slot
3083 * is offline.
3084 */
3085 if (test_bit(FC_UNLOADING, &vport->load_flag) &&
3086 pci_channel_offline(phba->pcidev))
3087 lpfc_sli_flush_io_rings(vport->phba);
3088
3089 /* At this point, ALL ndlp's should be gone
3090 * because of the previous NLP_EVT_DEVICE_RM.
3091 * Lets wait for this to happen, if needed.
3092 */
3093 while (!list_empty(&vport->fc_nodes)) {
3094 if (i++ > 3000) {
3095 lpfc_printf_vlog(vport, KERN_ERR,
3096 LOG_TRACE_EVENT,
3097 "0233 Nodelist not empty\n");
3098 list_for_each_entry_safe(ndlp, next_ndlp,
3099 &vport->fc_nodes, nlp_listp) {
3100 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3101 LOG_DISCOVERY,
3102 "0282 did:x%x ndlp:x%px "
3103 "refcnt:%d xflags x%x "
3104 "nflag x%lx\n",
3105 ndlp->nlp_DID, (void *)ndlp,
3106 kref_read(&ndlp->kref),
3107 ndlp->fc4_xpt_flags,
3108 ndlp->nlp_flag);
3109 }
3110 break;
3111 }
3112
3113 /* Wait for any activity on ndlps to settle */
3114 msleep(10);
3115 }
3116 lpfc_cleanup_vports_rrqs(vport, NULL);
3117 }
3118
3119 /**
3120 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3121 * @vport: pointer to a virtual N_Port data structure.
3122 *
3123 * This routine stops all the timers associated with a @vport. This function
3124 * is invoked before disabling or deleting a @vport. Note that the physical
3125 * port is treated as @vport 0.
3126 **/
3127 void
lpfc_stop_vport_timers(struct lpfc_vport * vport)3128 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3129 {
3130 timer_delete_sync(&vport->els_tmofunc);
3131 timer_delete_sync(&vport->delayed_disc_tmo);
3132 lpfc_can_disctmo(vport);
3133 return;
3134 }
3135
3136 /**
3137 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3138 * @phba: pointer to lpfc hba data structure.
3139 *
3140 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3141 * caller of this routine should already hold the host lock.
3142 **/
3143 void
__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3144 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3145 {
3146 /* Clear pending FCF rediscovery wait flag */
3147 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3148
3149 /* Now, try to stop the timer */
3150 timer_delete(&phba->fcf.redisc_wait);
3151 }
3152
3153 /**
3154 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3155 * @phba: pointer to lpfc hba data structure.
3156 *
3157 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3158 * checks whether the FCF rediscovery wait timer is pending with the host
3159 * lock held before proceeding with disabling the timer and clearing the
3160 * wait timer pendig flag.
3161 **/
3162 void
lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3163 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3164 {
3165 spin_lock_irq(&phba->hbalock);
3166 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3167 /* FCF rediscovery timer already fired or stopped */
3168 spin_unlock_irq(&phba->hbalock);
3169 return;
3170 }
3171 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3172 /* Clear failover in progress flags */
3173 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3174 spin_unlock_irq(&phba->hbalock);
3175 }
3176
3177 /**
3178 * lpfc_cmf_stop - Stop CMF processing
3179 * @phba: pointer to lpfc hba data structure.
3180 *
3181 * This is called when the link goes down or if CMF mode is turned OFF.
3182 * It is also called when going offline or unloaded just before the
3183 * congestion info buffer is unregistered.
3184 **/
3185 void
lpfc_cmf_stop(struct lpfc_hba * phba)3186 lpfc_cmf_stop(struct lpfc_hba *phba)
3187 {
3188 int cpu;
3189 struct lpfc_cgn_stat *cgs;
3190
3191 /* We only do something if CMF is enabled */
3192 if (!phba->sli4_hba.pc_sli4_params.cmf)
3193 return;
3194
3195 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3196 "6221 Stop CMF / Cancel Timer\n");
3197
3198 /* Cancel the CMF timer */
3199 hrtimer_cancel(&phba->cmf_stats_timer);
3200 hrtimer_cancel(&phba->cmf_timer);
3201
3202 /* Zero CMF counters */
3203 atomic_set(&phba->cmf_busy, 0);
3204 for_each_present_cpu(cpu) {
3205 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3206 atomic64_set(&cgs->total_bytes, 0);
3207 atomic64_set(&cgs->rcv_bytes, 0);
3208 atomic_set(&cgs->rx_io_cnt, 0);
3209 atomic64_set(&cgs->rx_latency, 0);
3210 }
3211 atomic_set(&phba->cmf_bw_wait, 0);
3212
3213 /* Resume any blocked IO - Queue unblock on workqueue */
3214 queue_work(phba->wq, &phba->unblock_request_work);
3215 }
3216
3217 static inline uint64_t
lpfc_get_max_line_rate(struct lpfc_hba * phba)3218 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3219 {
3220 uint64_t rate = lpfc_sli_port_speed_get(phba);
3221
3222 return ((((unsigned long)rate) * 1024 * 1024) / 10);
3223 }
3224
3225 void
lpfc_cmf_signal_init(struct lpfc_hba * phba)3226 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3227 {
3228 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3229 "6223 Signal CMF init\n");
3230
3231 /* Use the new fc_linkspeed to recalculate */
3232 phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3233 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3234 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3235 phba->cmf_interval_rate, 1000);
3236 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3237
3238 /* This is a signal to firmware to sync up CMF BW with link speed */
3239 lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3240 }
3241
3242 /**
3243 * lpfc_cmf_start - Start CMF processing
3244 * @phba: pointer to lpfc hba data structure.
3245 *
3246 * This is called when the link comes up or if CMF mode is turned OFF
3247 * to Monitor or Managed.
3248 **/
3249 void
lpfc_cmf_start(struct lpfc_hba * phba)3250 lpfc_cmf_start(struct lpfc_hba *phba)
3251 {
3252 struct lpfc_cgn_stat *cgs;
3253 int cpu;
3254
3255 /* We only do something if CMF is enabled */
3256 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3257 phba->cmf_active_mode == LPFC_CFG_OFF)
3258 return;
3259
3260 /* Reinitialize congestion buffer info */
3261 lpfc_init_congestion_buf(phba);
3262
3263 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3264 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3265 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3266 atomic_set(&phba->cgn_sync_warn_cnt, 0);
3267
3268 atomic_set(&phba->cmf_busy, 0);
3269 for_each_present_cpu(cpu) {
3270 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3271 atomic64_set(&cgs->total_bytes, 0);
3272 atomic64_set(&cgs->rcv_bytes, 0);
3273 atomic_set(&cgs->rx_io_cnt, 0);
3274 atomic64_set(&cgs->rx_latency, 0);
3275 }
3276 phba->cmf_latency.tv_sec = 0;
3277 phba->cmf_latency.tv_nsec = 0;
3278
3279 lpfc_cmf_signal_init(phba);
3280
3281 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3282 "6222 Start CMF / Timer\n");
3283
3284 phba->cmf_timer_cnt = 0;
3285 hrtimer_start(&phba->cmf_timer,
3286 ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC),
3287 HRTIMER_MODE_REL);
3288 hrtimer_start(&phba->cmf_stats_timer,
3289 ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC),
3290 HRTIMER_MODE_REL);
3291 /* Setup for latency check in IO cmpl routines */
3292 ktime_get_real_ts64(&phba->cmf_latency);
3293
3294 atomic_set(&phba->cmf_bw_wait, 0);
3295 atomic_set(&phba->cmf_stop_io, 0);
3296 }
3297
3298 /**
3299 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3300 * @phba: pointer to lpfc hba data structure.
3301 *
3302 * This routine stops all the timers associated with a HBA. This function is
3303 * invoked before either putting a HBA offline or unloading the driver.
3304 **/
3305 void
lpfc_stop_hba_timers(struct lpfc_hba * phba)3306 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3307 {
3308 if (phba->pport)
3309 lpfc_stop_vport_timers(phba->pport);
3310 cancel_delayed_work_sync(&phba->eq_delay_work);
3311 cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3312 timer_delete_sync(&phba->sli.mbox_tmo);
3313 timer_delete_sync(&phba->fabric_block_timer);
3314 timer_delete_sync(&phba->eratt_poll);
3315 timer_delete_sync(&phba->hb_tmofunc);
3316 if (phba->sli_rev == LPFC_SLI_REV4) {
3317 timer_delete_sync(&phba->rrq_tmr);
3318 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
3319 }
3320 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
3321 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
3322
3323 switch (phba->pci_dev_grp) {
3324 case LPFC_PCI_DEV_LP:
3325 /* Stop any LightPulse device specific driver timers */
3326 timer_delete_sync(&phba->fcp_poll_timer);
3327 break;
3328 case LPFC_PCI_DEV_OC:
3329 /* Stop any OneConnect device specific driver timers */
3330 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3331 break;
3332 default:
3333 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3334 "0297 Invalid device group (x%x)\n",
3335 phba->pci_dev_grp);
3336 break;
3337 }
3338 return;
3339 }
3340
3341 /**
3342 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3343 * @phba: pointer to lpfc hba data structure.
3344 * @mbx_action: flag for mailbox no wait action.
3345 *
3346 * This routine marks a HBA's management interface as blocked. Once the HBA's
3347 * management interface is marked as blocked, all the user space access to
3348 * the HBA, whether they are from sysfs interface or libdfc interface will
3349 * all be blocked. The HBA is set to block the management interface when the
3350 * driver prepares the HBA interface for online or offline.
3351 **/
3352 static void
lpfc_block_mgmt_io(struct lpfc_hba * phba,int mbx_action)3353 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3354 {
3355 unsigned long iflag;
3356 uint8_t actcmd = MBX_HEARTBEAT;
3357 unsigned long timeout;
3358
3359 spin_lock_irqsave(&phba->hbalock, iflag);
3360 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3361 spin_unlock_irqrestore(&phba->hbalock, iflag);
3362 if (mbx_action == LPFC_MBX_NO_WAIT)
3363 return;
3364 timeout = secs_to_jiffies(LPFC_MBOX_TMO) + jiffies;
3365 spin_lock_irqsave(&phba->hbalock, iflag);
3366 if (phba->sli.mbox_active) {
3367 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3368 /* Determine how long we might wait for the active mailbox
3369 * command to be gracefully completed by firmware.
3370 */
3371 timeout = secs_to_jiffies(lpfc_mbox_tmo_val(phba,
3372 phba->sli.mbox_active)) + jiffies;
3373 }
3374 spin_unlock_irqrestore(&phba->hbalock, iflag);
3375
3376 /* Wait for the outstnading mailbox command to complete */
3377 while (phba->sli.mbox_active) {
3378 /* Check active mailbox complete status every 2ms */
3379 msleep(2);
3380 if (time_after(jiffies, timeout)) {
3381 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3382 "2813 Mgmt IO is Blocked %x "
3383 "- mbox cmd %x still active\n",
3384 phba->sli.sli_flag, actcmd);
3385 break;
3386 }
3387 }
3388 }
3389
3390 /**
3391 * lpfc_sli4_node_rpi_restore - Recover assigned RPIs for active nodes.
3392 * @phba: pointer to lpfc hba data structure.
3393 *
3394 * Allocate RPIs for all active remote nodes. This is needed whenever
3395 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3396 * is to fixup the temporary rpi assignments.
3397 **/
3398 void
lpfc_sli4_node_rpi_restore(struct lpfc_hba * phba)3399 lpfc_sli4_node_rpi_restore(struct lpfc_hba *phba)
3400 {
3401 struct lpfc_nodelist *ndlp, *next_ndlp;
3402 struct lpfc_vport **vports;
3403 int i, rpi;
3404
3405 if (phba->sli_rev != LPFC_SLI_REV4)
3406 return;
3407
3408 vports = lpfc_create_vport_work_array(phba);
3409 if (!vports)
3410 return;
3411
3412 for (i = 0; i <= phba->max_vports && vports[i]; i++) {
3413 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3414 continue;
3415
3416 list_for_each_entry_safe(ndlp, next_ndlp,
3417 &vports[i]->fc_nodes,
3418 nlp_listp) {
3419 rpi = lpfc_sli4_alloc_rpi(phba);
3420 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3421 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3422 LOG_NODE | LOG_DISCOVERY,
3423 "0099 RPI alloc error for "
3424 "ndlp x%px DID:x%06x "
3425 "flg:x%lx\n",
3426 ndlp, ndlp->nlp_DID,
3427 ndlp->nlp_flag);
3428 continue;
3429 }
3430 ndlp->nlp_rpi = rpi;
3431 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3432 LOG_NODE | LOG_DISCOVERY,
3433 "0009 Assign RPI x%x to ndlp x%px "
3434 "DID:x%06x flg:x%lx\n",
3435 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3436 ndlp->nlp_flag);
3437 }
3438 }
3439 lpfc_destroy_vport_work_array(phba, vports);
3440 }
3441
3442 /**
3443 * lpfc_create_expedite_pool - create expedite pool
3444 * @phba: pointer to lpfc hba data structure.
3445 *
3446 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3447 * to expedite pool. Mark them as expedite.
3448 **/
lpfc_create_expedite_pool(struct lpfc_hba * phba)3449 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3450 {
3451 struct lpfc_sli4_hdw_queue *qp;
3452 struct lpfc_io_buf *lpfc_ncmd;
3453 struct lpfc_io_buf *lpfc_ncmd_next;
3454 struct lpfc_epd_pool *epd_pool;
3455 unsigned long iflag;
3456
3457 epd_pool = &phba->epd_pool;
3458 qp = &phba->sli4_hba.hdwq[0];
3459
3460 spin_lock_init(&epd_pool->lock);
3461 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3462 spin_lock(&epd_pool->lock);
3463 INIT_LIST_HEAD(&epd_pool->list);
3464 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3465 &qp->lpfc_io_buf_list_put, list) {
3466 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3467 lpfc_ncmd->expedite = true;
3468 qp->put_io_bufs--;
3469 epd_pool->count++;
3470 if (epd_pool->count >= XRI_BATCH)
3471 break;
3472 }
3473 spin_unlock(&epd_pool->lock);
3474 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3475 }
3476
3477 /**
3478 * lpfc_destroy_expedite_pool - destroy expedite pool
3479 * @phba: pointer to lpfc hba data structure.
3480 *
3481 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3482 * of HWQ 0. Clear the mark.
3483 **/
lpfc_destroy_expedite_pool(struct lpfc_hba * phba)3484 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3485 {
3486 struct lpfc_sli4_hdw_queue *qp;
3487 struct lpfc_io_buf *lpfc_ncmd;
3488 struct lpfc_io_buf *lpfc_ncmd_next;
3489 struct lpfc_epd_pool *epd_pool;
3490 unsigned long iflag;
3491
3492 epd_pool = &phba->epd_pool;
3493 qp = &phba->sli4_hba.hdwq[0];
3494
3495 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3496 spin_lock(&epd_pool->lock);
3497 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3498 &epd_pool->list, list) {
3499 list_move_tail(&lpfc_ncmd->list,
3500 &qp->lpfc_io_buf_list_put);
3501 lpfc_ncmd->flags = false;
3502 qp->put_io_bufs++;
3503 epd_pool->count--;
3504 }
3505 spin_unlock(&epd_pool->lock);
3506 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3507 }
3508
3509 /**
3510 * lpfc_create_multixri_pools - create multi-XRI pools
3511 * @phba: pointer to lpfc hba data structure.
3512 *
3513 * This routine initialize public, private per HWQ. Then, move XRIs from
3514 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3515 * Initialized.
3516 **/
lpfc_create_multixri_pools(struct lpfc_hba * phba)3517 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3518 {
3519 u32 i, j;
3520 u32 hwq_count;
3521 u32 count_per_hwq;
3522 struct lpfc_io_buf *lpfc_ncmd;
3523 struct lpfc_io_buf *lpfc_ncmd_next;
3524 unsigned long iflag;
3525 struct lpfc_sli4_hdw_queue *qp;
3526 struct lpfc_multixri_pool *multixri_pool;
3527 struct lpfc_pbl_pool *pbl_pool;
3528 struct lpfc_pvt_pool *pvt_pool;
3529
3530 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3531 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3532 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3533 phba->sli4_hba.io_xri_cnt);
3534
3535 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3536 lpfc_create_expedite_pool(phba);
3537
3538 hwq_count = phba->cfg_hdw_queue;
3539 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3540
3541 for (i = 0; i < hwq_count; i++) {
3542 multixri_pool = kzalloc_obj(*multixri_pool);
3543
3544 if (!multixri_pool) {
3545 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3546 "1238 Failed to allocate memory for "
3547 "multixri_pool\n");
3548
3549 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3550 lpfc_destroy_expedite_pool(phba);
3551
3552 j = 0;
3553 while (j < i) {
3554 qp = &phba->sli4_hba.hdwq[j];
3555 kfree(qp->p_multixri_pool);
3556 j++;
3557 }
3558 phba->cfg_xri_rebalancing = 0;
3559 return;
3560 }
3561
3562 qp = &phba->sli4_hba.hdwq[i];
3563 qp->p_multixri_pool = multixri_pool;
3564
3565 multixri_pool->xri_limit = count_per_hwq;
3566 multixri_pool->rrb_next_hwqid = i;
3567
3568 /* Deal with public free xri pool */
3569 pbl_pool = &multixri_pool->pbl_pool;
3570 spin_lock_init(&pbl_pool->lock);
3571 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3572 spin_lock(&pbl_pool->lock);
3573 INIT_LIST_HEAD(&pbl_pool->list);
3574 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3575 &qp->lpfc_io_buf_list_put, list) {
3576 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3577 qp->put_io_bufs--;
3578 pbl_pool->count++;
3579 }
3580 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3581 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3582 pbl_pool->count, i);
3583 spin_unlock(&pbl_pool->lock);
3584 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3585
3586 /* Deal with private free xri pool */
3587 pvt_pool = &multixri_pool->pvt_pool;
3588 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3589 pvt_pool->low_watermark = XRI_BATCH;
3590 spin_lock_init(&pvt_pool->lock);
3591 spin_lock_irqsave(&pvt_pool->lock, iflag);
3592 INIT_LIST_HEAD(&pvt_pool->list);
3593 pvt_pool->count = 0;
3594 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3595 }
3596 }
3597
3598 /**
3599 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3600 * @phba: pointer to lpfc hba data structure.
3601 *
3602 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3603 **/
lpfc_destroy_multixri_pools(struct lpfc_hba * phba)3604 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3605 {
3606 u32 i;
3607 u32 hwq_count;
3608 struct lpfc_io_buf *lpfc_ncmd;
3609 struct lpfc_io_buf *lpfc_ncmd_next;
3610 unsigned long iflag;
3611 struct lpfc_sli4_hdw_queue *qp;
3612 struct lpfc_multixri_pool *multixri_pool;
3613 struct lpfc_pbl_pool *pbl_pool;
3614 struct lpfc_pvt_pool *pvt_pool;
3615
3616 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3617 lpfc_destroy_expedite_pool(phba);
3618
3619 if (!test_bit(FC_UNLOADING, &phba->pport->load_flag))
3620 lpfc_sli_flush_io_rings(phba);
3621
3622 hwq_count = phba->cfg_hdw_queue;
3623
3624 for (i = 0; i < hwq_count; i++) {
3625 qp = &phba->sli4_hba.hdwq[i];
3626 multixri_pool = qp->p_multixri_pool;
3627 if (!multixri_pool)
3628 continue;
3629
3630 qp->p_multixri_pool = NULL;
3631
3632 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3633
3634 /* Deal with public free xri pool */
3635 pbl_pool = &multixri_pool->pbl_pool;
3636 spin_lock(&pbl_pool->lock);
3637
3638 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3639 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3640 pbl_pool->count, i);
3641
3642 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3643 &pbl_pool->list, list) {
3644 list_move_tail(&lpfc_ncmd->list,
3645 &qp->lpfc_io_buf_list_put);
3646 qp->put_io_bufs++;
3647 pbl_pool->count--;
3648 }
3649
3650 INIT_LIST_HEAD(&pbl_pool->list);
3651 pbl_pool->count = 0;
3652
3653 spin_unlock(&pbl_pool->lock);
3654
3655 /* Deal with private free xri pool */
3656 pvt_pool = &multixri_pool->pvt_pool;
3657 spin_lock(&pvt_pool->lock);
3658
3659 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3660 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3661 pvt_pool->count, i);
3662
3663 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3664 &pvt_pool->list, list) {
3665 list_move_tail(&lpfc_ncmd->list,
3666 &qp->lpfc_io_buf_list_put);
3667 qp->put_io_bufs++;
3668 pvt_pool->count--;
3669 }
3670
3671 INIT_LIST_HEAD(&pvt_pool->list);
3672 pvt_pool->count = 0;
3673
3674 spin_unlock(&pvt_pool->lock);
3675 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3676
3677 kfree(multixri_pool);
3678 }
3679 }
3680
3681 /**
3682 * lpfc_online - Initialize and bring a HBA online
3683 * @phba: pointer to lpfc hba data structure.
3684 *
3685 * This routine initializes the HBA and brings a HBA online. During this
3686 * process, the management interface is blocked to prevent user space access
3687 * to the HBA interfering with the driver initialization.
3688 *
3689 * Return codes
3690 * 0 - successful
3691 * 1 - failed
3692 **/
3693 int
lpfc_online(struct lpfc_hba * phba)3694 lpfc_online(struct lpfc_hba *phba)
3695 {
3696 struct lpfc_vport *vport;
3697 struct lpfc_vport **vports;
3698 int i, error = 0;
3699 bool vpis_cleared = false;
3700
3701 if (!phba)
3702 return 0;
3703 vport = phba->pport;
3704
3705 if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3706 return 0;
3707
3708 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3709 "0458 Bring Adapter online\n");
3710
3711 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3712
3713 if (phba->sli_rev == LPFC_SLI_REV4) {
3714 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3715 lpfc_unblock_mgmt_io(phba);
3716 return 1;
3717 }
3718 spin_lock_irq(&phba->hbalock);
3719 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3720 vpis_cleared = true;
3721 spin_unlock_irq(&phba->hbalock);
3722
3723 /* Reestablish the local initiator port.
3724 * The offline process destroyed the previous lport.
3725 */
3726 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3727 !phba->nvmet_support) {
3728 error = lpfc_nvme_create_localport(phba->pport);
3729 if (error)
3730 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3731 "6132 NVME restore reg failed "
3732 "on nvmei error x%x\n", error);
3733 }
3734 } else {
3735 lpfc_sli_queue_init(phba);
3736 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3737 lpfc_unblock_mgmt_io(phba);
3738 return 1;
3739 }
3740 }
3741
3742 vports = lpfc_create_vport_work_array(phba);
3743 if (vports != NULL) {
3744 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3745 clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3746 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3747 set_bit(FC_VPORT_NEEDS_REG_VPI,
3748 &vports[i]->fc_flag);
3749 if (phba->sli_rev == LPFC_SLI_REV4) {
3750 set_bit(FC_VPORT_NEEDS_INIT_VPI,
3751 &vports[i]->fc_flag);
3752 if ((vpis_cleared) &&
3753 (vports[i]->port_type !=
3754 LPFC_PHYSICAL_PORT))
3755 vports[i]->vpi = 0;
3756 }
3757 }
3758 }
3759 lpfc_destroy_vport_work_array(phba, vports);
3760
3761 if (phba->cfg_xri_rebalancing)
3762 lpfc_create_multixri_pools(phba);
3763
3764 lpfc_cpuhp_add(phba);
3765
3766 lpfc_unblock_mgmt_io(phba);
3767 return 0;
3768 }
3769
3770 /**
3771 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3772 * @phba: pointer to lpfc hba data structure.
3773 *
3774 * This routine marks a HBA's management interface as not blocked. Once the
3775 * HBA's management interface is marked as not blocked, all the user space
3776 * access to the HBA, whether they are from sysfs interface or libdfc
3777 * interface will be allowed. The HBA is set to block the management interface
3778 * when the driver prepares the HBA interface for online or offline and then
3779 * set to unblock the management interface afterwards.
3780 **/
3781 void
lpfc_unblock_mgmt_io(struct lpfc_hba * phba)3782 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3783 {
3784 unsigned long iflag;
3785
3786 spin_lock_irqsave(&phba->hbalock, iflag);
3787 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3788 spin_unlock_irqrestore(&phba->hbalock, iflag);
3789 }
3790
3791 /**
3792 * lpfc_offline_prep - Prepare a HBA to be brought offline
3793 * @phba: pointer to lpfc hba data structure.
3794 * @mbx_action: flag for mailbox shutdown action.
3795 *
3796 * This routine is invoked to prepare a HBA to be brought offline. It performs
3797 * unregistration login to all the nodes on all vports and flushes the mailbox
3798 * queue to make it ready to be brought offline.
3799 **/
3800 void
lpfc_offline_prep(struct lpfc_hba * phba,int mbx_action)3801 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3802 {
3803 struct lpfc_vport *vport = phba->pport;
3804 struct lpfc_nodelist *ndlp, *next_ndlp;
3805 struct lpfc_vport **vports;
3806 struct Scsi_Host *shost;
3807 int i;
3808 int offline;
3809 bool hba_pci_err;
3810
3811 if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3812 return;
3813
3814 lpfc_block_mgmt_io(phba, mbx_action);
3815
3816 lpfc_linkdown(phba);
3817
3818 offline = pci_channel_offline(phba->pcidev);
3819 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3820
3821 /* Issue an unreg_login to all nodes on all vports */
3822 vports = lpfc_create_vport_work_array(phba);
3823 if (vports != NULL) {
3824 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3825 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3826 continue;
3827 shost = lpfc_shost_from_vport(vports[i]);
3828 spin_lock_irq(shost->host_lock);
3829 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3830 spin_unlock_irq(shost->host_lock);
3831 set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag);
3832 clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag);
3833
3834 list_for_each_entry_safe(ndlp, next_ndlp,
3835 &vports[i]->fc_nodes,
3836 nlp_listp) {
3837
3838 clear_bit(NLP_NPR_ADISC, &ndlp->nlp_flag);
3839 if (offline || hba_pci_err) {
3840 clear_bit(NLP_UNREG_INP,
3841 &ndlp->nlp_flag);
3842 clear_bit(NLP_RPI_REGISTERED,
3843 &ndlp->nlp_flag);
3844 }
3845
3846 if (ndlp->nlp_type & NLP_FABRIC) {
3847 lpfc_disc_state_machine(vports[i], ndlp,
3848 NULL, NLP_EVT_DEVICE_RECOVERY);
3849
3850 /* Don't remove the node unless the node
3851 * has been unregistered with the
3852 * transport, and we're not in recovery
3853 * before dev_loss_tmo triggered.
3854 * Otherwise, let dev_loss take care of
3855 * the node.
3856 */
3857 if (!test_bit(NLP_IN_RECOV_POST_DEV_LOSS,
3858 &ndlp->save_flags) &&
3859 !(ndlp->fc4_xpt_flags &
3860 (NVME_XPT_REGD | SCSI_XPT_REGD)))
3861 lpfc_disc_state_machine
3862 (vports[i], ndlp,
3863 NULL,
3864 NLP_EVT_DEVICE_RM);
3865 }
3866 }
3867 }
3868 }
3869 lpfc_destroy_vport_work_array(phba, vports);
3870
3871 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3872
3873 if (phba->wq)
3874 flush_workqueue(phba->wq);
3875 }
3876
3877 /**
3878 * lpfc_offline - Bring a HBA offline
3879 * @phba: pointer to lpfc hba data structure.
3880 *
3881 * This routine actually brings a HBA offline. It stops all the timers
3882 * associated with the HBA, brings down the SLI layer, and eventually
3883 * marks the HBA as in offline state for the upper layer protocol.
3884 **/
3885 void
lpfc_offline(struct lpfc_hba * phba)3886 lpfc_offline(struct lpfc_hba *phba)
3887 {
3888 struct Scsi_Host *shost;
3889 struct lpfc_vport **vports;
3890 int i;
3891
3892 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3893 return;
3894
3895 /* stop port and all timers associated with this hba */
3896 lpfc_stop_port(phba);
3897
3898 /* Tear down the local and target port registrations. The
3899 * nvme transports need to cleanup.
3900 */
3901 lpfc_nvmet_destroy_targetport(phba);
3902 lpfc_nvme_destroy_localport(phba->pport);
3903
3904 vports = lpfc_create_vport_work_array(phba);
3905 if (vports != NULL)
3906 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3907 lpfc_stop_vport_timers(vports[i]);
3908 lpfc_destroy_vport_work_array(phba, vports);
3909 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3910 "0460 Bring Adapter offline\n");
3911 /* Bring down the SLI Layer and cleanup. The HBA is offline
3912 now. */
3913 lpfc_sli_hba_down(phba);
3914 spin_lock_irq(&phba->hbalock);
3915 phba->work_ha = 0;
3916 spin_unlock_irq(&phba->hbalock);
3917 vports = lpfc_create_vport_work_array(phba);
3918 if (vports != NULL)
3919 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3920 shost = lpfc_shost_from_vport(vports[i]);
3921 spin_lock_irq(shost->host_lock);
3922 vports[i]->work_port_events = 0;
3923 spin_unlock_irq(shost->host_lock);
3924 set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3925 }
3926 lpfc_destroy_vport_work_array(phba, vports);
3927 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3928 * in hba_unset
3929 */
3930 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3931 __lpfc_cpuhp_remove(phba);
3932
3933 if (phba->cfg_xri_rebalancing)
3934 lpfc_destroy_multixri_pools(phba);
3935 }
3936
3937 /**
3938 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3939 * @phba: pointer to lpfc hba data structure.
3940 *
3941 * This routine is to free all the SCSI buffers and IOCBs from the driver
3942 * list back to kernel. It is called from lpfc_pci_remove_one to free
3943 * the internal resources before the device is removed from the system.
3944 **/
3945 static void
lpfc_scsi_free(struct lpfc_hba * phba)3946 lpfc_scsi_free(struct lpfc_hba *phba)
3947 {
3948 struct lpfc_io_buf *sb, *sb_next;
3949
3950 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3951 return;
3952
3953 spin_lock_irq(&phba->hbalock);
3954
3955 /* Release all the lpfc_scsi_bufs maintained by this host. */
3956
3957 spin_lock(&phba->scsi_buf_list_put_lock);
3958 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3959 list) {
3960 list_del(&sb->list);
3961 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3962 sb->dma_handle);
3963 kfree(sb);
3964 phba->total_scsi_bufs--;
3965 }
3966 spin_unlock(&phba->scsi_buf_list_put_lock);
3967
3968 spin_lock(&phba->scsi_buf_list_get_lock);
3969 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3970 list) {
3971 list_del(&sb->list);
3972 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3973 sb->dma_handle);
3974 kfree(sb);
3975 phba->total_scsi_bufs--;
3976 }
3977 spin_unlock(&phba->scsi_buf_list_get_lock);
3978 spin_unlock_irq(&phba->hbalock);
3979 }
3980
3981 /**
3982 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3983 * @phba: pointer to lpfc hba data structure.
3984 *
3985 * This routine is to free all the IO buffers and IOCBs from the driver
3986 * list back to kernel. It is called from lpfc_pci_remove_one to free
3987 * the internal resources before the device is removed from the system.
3988 **/
3989 void
lpfc_io_free(struct lpfc_hba * phba)3990 lpfc_io_free(struct lpfc_hba *phba)
3991 {
3992 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
3993 struct lpfc_sli4_hdw_queue *qp;
3994 int idx;
3995
3996 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3997 qp = &phba->sli4_hba.hdwq[idx];
3998 /* Release all the lpfc_nvme_bufs maintained by this host. */
3999 spin_lock(&qp->io_buf_list_put_lock);
4000 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4001 &qp->lpfc_io_buf_list_put,
4002 list) {
4003 list_del(&lpfc_ncmd->list);
4004 qp->put_io_bufs--;
4005 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4006 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4007 if (phba->cfg_xpsgl && !phba->nvmet_support)
4008 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4009 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4010 kfree(lpfc_ncmd);
4011 qp->total_io_bufs--;
4012 }
4013 spin_unlock(&qp->io_buf_list_put_lock);
4014
4015 spin_lock(&qp->io_buf_list_get_lock);
4016 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4017 &qp->lpfc_io_buf_list_get,
4018 list) {
4019 list_del(&lpfc_ncmd->list);
4020 qp->get_io_bufs--;
4021 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4022 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4023 if (phba->cfg_xpsgl && !phba->nvmet_support)
4024 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4025 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4026 kfree(lpfc_ncmd);
4027 qp->total_io_bufs--;
4028 }
4029 spin_unlock(&qp->io_buf_list_get_lock);
4030 }
4031 }
4032
4033 /**
4034 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4035 * @phba: pointer to lpfc hba data structure.
4036 *
4037 * This routine first calculates the sizes of the current els and allocated
4038 * scsi sgl lists, and then goes through all sgls to updates the physical
4039 * XRIs assigned due to port function reset. During port initialization, the
4040 * current els and allocated scsi sgl lists are 0s.
4041 *
4042 * Return codes
4043 * 0 - successful (for now, it always returns 0)
4044 **/
4045 int
lpfc_sli4_els_sgl_update(struct lpfc_hba * phba)4046 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4047 {
4048 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4049 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4050 LIST_HEAD(els_sgl_list);
4051 int rc;
4052
4053 /*
4054 * update on pci function's els xri-sgl list
4055 */
4056 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4057
4058 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4059 /* els xri-sgl expanded */
4060 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4061 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4062 "3157 ELS xri-sgl count increased from "
4063 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4064 els_xri_cnt);
4065 /* allocate the additional els sgls */
4066 for (i = 0; i < xri_cnt; i++) {
4067 sglq_entry = kzalloc_obj(struct lpfc_sglq);
4068 if (sglq_entry == NULL) {
4069 lpfc_printf_log(phba, KERN_ERR,
4070 LOG_TRACE_EVENT,
4071 "2562 Failure to allocate an "
4072 "ELS sgl entry:%d\n", i);
4073 rc = -ENOMEM;
4074 goto out_free_mem;
4075 }
4076 sglq_entry->buff_type = GEN_BUFF_TYPE;
4077 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4078 &sglq_entry->phys);
4079 if (sglq_entry->virt == NULL) {
4080 kfree(sglq_entry);
4081 lpfc_printf_log(phba, KERN_ERR,
4082 LOG_TRACE_EVENT,
4083 "2563 Failure to allocate an "
4084 "ELS mbuf:%d\n", i);
4085 rc = -ENOMEM;
4086 goto out_free_mem;
4087 }
4088 sglq_entry->sgl = sglq_entry->virt;
4089 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4090 sglq_entry->state = SGL_FREED;
4091 list_add_tail(&sglq_entry->list, &els_sgl_list);
4092 }
4093 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4094 list_splice_init(&els_sgl_list,
4095 &phba->sli4_hba.lpfc_els_sgl_list);
4096 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4097 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4098 /* els xri-sgl shrinked */
4099 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4100 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4101 "3158 ELS xri-sgl count decreased from "
4102 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4103 els_xri_cnt);
4104 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4105 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4106 &els_sgl_list);
4107 /* release extra els sgls from list */
4108 for (i = 0; i < xri_cnt; i++) {
4109 list_remove_head(&els_sgl_list,
4110 sglq_entry, struct lpfc_sglq, list);
4111 if (sglq_entry) {
4112 __lpfc_mbuf_free(phba, sglq_entry->virt,
4113 sglq_entry->phys);
4114 kfree(sglq_entry);
4115 }
4116 }
4117 list_splice_init(&els_sgl_list,
4118 &phba->sli4_hba.lpfc_els_sgl_list);
4119 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4120 } else
4121 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4122 "3163 ELS xri-sgl count unchanged: %d\n",
4123 els_xri_cnt);
4124 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4125
4126 /* update xris to els sgls on the list */
4127 sglq_entry = NULL;
4128 sglq_entry_next = NULL;
4129 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4130 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4131 lxri = lpfc_sli4_next_xritag(phba);
4132 if (lxri == NO_XRI) {
4133 lpfc_printf_log(phba, KERN_ERR,
4134 LOG_TRACE_EVENT,
4135 "2400 Failed to allocate xri for "
4136 "ELS sgl\n");
4137 rc = -ENOMEM;
4138 goto out_free_mem;
4139 }
4140 sglq_entry->sli4_lxritag = lxri;
4141 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4142 }
4143 return 0;
4144
4145 out_free_mem:
4146 lpfc_free_els_sgl_list(phba);
4147 return rc;
4148 }
4149
4150 /**
4151 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4152 * @phba: pointer to lpfc hba data structure.
4153 *
4154 * This routine first calculates the sizes of the current els and allocated
4155 * scsi sgl lists, and then goes through all sgls to updates the physical
4156 * XRIs assigned due to port function reset. During port initialization, the
4157 * current els and allocated scsi sgl lists are 0s.
4158 *
4159 * Return codes
4160 * 0 - successful (for now, it always returns 0)
4161 **/
4162 int
lpfc_sli4_nvmet_sgl_update(struct lpfc_hba * phba)4163 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4164 {
4165 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4166 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4167 uint16_t nvmet_xri_cnt;
4168 LIST_HEAD(nvmet_sgl_list);
4169 int rc;
4170
4171 /*
4172 * update on pci function's nvmet xri-sgl list
4173 */
4174 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4175
4176 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4177 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4178 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4179 /* els xri-sgl expanded */
4180 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4181 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4182 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
4183 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4184 /* allocate the additional nvmet sgls */
4185 for (i = 0; i < xri_cnt; i++) {
4186 sglq_entry = kzalloc_obj(struct lpfc_sglq);
4187 if (sglq_entry == NULL) {
4188 lpfc_printf_log(phba, KERN_ERR,
4189 LOG_TRACE_EVENT,
4190 "6303 Failure to allocate an "
4191 "NVMET sgl entry:%d\n", i);
4192 rc = -ENOMEM;
4193 goto out_free_mem;
4194 }
4195 sglq_entry->buff_type = NVMET_BUFF_TYPE;
4196 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4197 &sglq_entry->phys);
4198 if (sglq_entry->virt == NULL) {
4199 kfree(sglq_entry);
4200 lpfc_printf_log(phba, KERN_ERR,
4201 LOG_TRACE_EVENT,
4202 "6304 Failure to allocate an "
4203 "NVMET buf:%d\n", i);
4204 rc = -ENOMEM;
4205 goto out_free_mem;
4206 }
4207 sglq_entry->sgl = sglq_entry->virt;
4208 memset(sglq_entry->sgl, 0,
4209 phba->cfg_sg_dma_buf_size);
4210 sglq_entry->state = SGL_FREED;
4211 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4212 }
4213 spin_lock_irq(&phba->hbalock);
4214 spin_lock(&phba->sli4_hba.sgl_list_lock);
4215 list_splice_init(&nvmet_sgl_list,
4216 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4217 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4218 spin_unlock_irq(&phba->hbalock);
4219 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4220 /* nvmet xri-sgl shrunk */
4221 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4222 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4223 "6305 NVMET xri-sgl count decreased from "
4224 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4225 nvmet_xri_cnt);
4226 spin_lock_irq(&phba->hbalock);
4227 spin_lock(&phba->sli4_hba.sgl_list_lock);
4228 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4229 &nvmet_sgl_list);
4230 /* release extra nvmet sgls from list */
4231 for (i = 0; i < xri_cnt; i++) {
4232 list_remove_head(&nvmet_sgl_list,
4233 sglq_entry, struct lpfc_sglq, list);
4234 if (sglq_entry) {
4235 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4236 sglq_entry->phys);
4237 kfree(sglq_entry);
4238 }
4239 }
4240 list_splice_init(&nvmet_sgl_list,
4241 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4242 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4243 spin_unlock_irq(&phba->hbalock);
4244 } else
4245 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4246 "6306 NVMET xri-sgl count unchanged: %d\n",
4247 nvmet_xri_cnt);
4248 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4249
4250 /* update xris to nvmet sgls on the list */
4251 sglq_entry = NULL;
4252 sglq_entry_next = NULL;
4253 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4254 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4255 lxri = lpfc_sli4_next_xritag(phba);
4256 if (lxri == NO_XRI) {
4257 lpfc_printf_log(phba, KERN_ERR,
4258 LOG_TRACE_EVENT,
4259 "6307 Failed to allocate xri for "
4260 "NVMET sgl\n");
4261 rc = -ENOMEM;
4262 goto out_free_mem;
4263 }
4264 sglq_entry->sli4_lxritag = lxri;
4265 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4266 }
4267 return 0;
4268
4269 out_free_mem:
4270 lpfc_free_nvmet_sgl_list(phba);
4271 return rc;
4272 }
4273
4274 int
lpfc_io_buf_flush(struct lpfc_hba * phba,struct list_head * cbuf)4275 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4276 {
4277 LIST_HEAD(blist);
4278 struct lpfc_sli4_hdw_queue *qp;
4279 struct lpfc_io_buf *lpfc_cmd;
4280 struct lpfc_io_buf *iobufp, *prev_iobufp;
4281 int idx, cnt, xri, inserted;
4282
4283 cnt = 0;
4284 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4285 qp = &phba->sli4_hba.hdwq[idx];
4286 spin_lock_irq(&qp->io_buf_list_get_lock);
4287 spin_lock(&qp->io_buf_list_put_lock);
4288
4289 /* Take everything off the get and put lists */
4290 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4291 list_splice(&qp->lpfc_io_buf_list_put, &blist);
4292 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4293 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4294 cnt += qp->get_io_bufs + qp->put_io_bufs;
4295 qp->get_io_bufs = 0;
4296 qp->put_io_bufs = 0;
4297 qp->total_io_bufs = 0;
4298 spin_unlock(&qp->io_buf_list_put_lock);
4299 spin_unlock_irq(&qp->io_buf_list_get_lock);
4300 }
4301
4302 /*
4303 * Take IO buffers off blist and put on cbuf sorted by XRI.
4304 * This is because POST_SGL takes a sequential range of XRIs
4305 * to post to the firmware.
4306 */
4307 for (idx = 0; idx < cnt; idx++) {
4308 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4309 if (!lpfc_cmd)
4310 return cnt;
4311 if (idx == 0) {
4312 list_add_tail(&lpfc_cmd->list, cbuf);
4313 continue;
4314 }
4315 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4316 inserted = 0;
4317 prev_iobufp = NULL;
4318 list_for_each_entry(iobufp, cbuf, list) {
4319 if (xri < iobufp->cur_iocbq.sli4_xritag) {
4320 if (prev_iobufp)
4321 list_add(&lpfc_cmd->list,
4322 &prev_iobufp->list);
4323 else
4324 list_add(&lpfc_cmd->list, cbuf);
4325 inserted = 1;
4326 break;
4327 }
4328 prev_iobufp = iobufp;
4329 }
4330 if (!inserted)
4331 list_add_tail(&lpfc_cmd->list, cbuf);
4332 }
4333 return cnt;
4334 }
4335
4336 int
lpfc_io_buf_replenish(struct lpfc_hba * phba,struct list_head * cbuf)4337 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4338 {
4339 struct lpfc_sli4_hdw_queue *qp;
4340 struct lpfc_io_buf *lpfc_cmd;
4341 int idx, cnt;
4342 unsigned long iflags;
4343
4344 qp = phba->sli4_hba.hdwq;
4345 cnt = 0;
4346 while (!list_empty(cbuf)) {
4347 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4348 list_remove_head(cbuf, lpfc_cmd,
4349 struct lpfc_io_buf, list);
4350 if (!lpfc_cmd)
4351 return cnt;
4352 cnt++;
4353 qp = &phba->sli4_hba.hdwq[idx];
4354 lpfc_cmd->hdwq_no = idx;
4355 lpfc_cmd->hdwq = qp;
4356 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4357 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags);
4358 list_add_tail(&lpfc_cmd->list,
4359 &qp->lpfc_io_buf_list_put);
4360 qp->put_io_bufs++;
4361 qp->total_io_bufs++;
4362 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
4363 iflags);
4364 }
4365 }
4366 return cnt;
4367 }
4368
4369 /**
4370 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4371 * @phba: pointer to lpfc hba data structure.
4372 *
4373 * This routine first calculates the sizes of the current els and allocated
4374 * scsi sgl lists, and then goes through all sgls to updates the physical
4375 * XRIs assigned due to port function reset. During port initialization, the
4376 * current els and allocated scsi sgl lists are 0s.
4377 *
4378 * Return codes
4379 * 0 - successful (for now, it always returns 0)
4380 **/
4381 int
lpfc_sli4_io_sgl_update(struct lpfc_hba * phba)4382 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4383 {
4384 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4385 uint16_t i, lxri, els_xri_cnt;
4386 uint16_t io_xri_cnt, io_xri_max;
4387 LIST_HEAD(io_sgl_list);
4388 int rc, cnt;
4389
4390 /*
4391 * update on pci function's allocated nvme xri-sgl list
4392 */
4393
4394 /* maximum number of xris available for nvme buffers */
4395 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4396 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4397 phba->sli4_hba.io_xri_max = io_xri_max;
4398
4399 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4400 "6074 Current allocated XRI sgl count:%d, "
4401 "maximum XRI count:%d els_xri_cnt:%d\n\n",
4402 phba->sli4_hba.io_xri_cnt,
4403 phba->sli4_hba.io_xri_max,
4404 els_xri_cnt);
4405
4406 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4407
4408 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4409 /* max nvme xri shrunk below the allocated nvme buffers */
4410 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4411 phba->sli4_hba.io_xri_max;
4412 /* release the extra allocated nvme buffers */
4413 for (i = 0; i < io_xri_cnt; i++) {
4414 list_remove_head(&io_sgl_list, lpfc_ncmd,
4415 struct lpfc_io_buf, list);
4416 if (lpfc_ncmd) {
4417 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4418 lpfc_ncmd->data,
4419 lpfc_ncmd->dma_handle);
4420 kfree(lpfc_ncmd);
4421 }
4422 }
4423 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4424 }
4425
4426 /* update xris associated to remaining allocated nvme buffers */
4427 lpfc_ncmd = NULL;
4428 lpfc_ncmd_next = NULL;
4429 phba->sli4_hba.io_xri_cnt = cnt;
4430 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4431 &io_sgl_list, list) {
4432 lxri = lpfc_sli4_next_xritag(phba);
4433 if (lxri == NO_XRI) {
4434 lpfc_printf_log(phba, KERN_ERR,
4435 LOG_TRACE_EVENT,
4436 "6075 Failed to allocate xri for "
4437 "nvme buffer\n");
4438 rc = -ENOMEM;
4439 goto out_free_mem;
4440 }
4441 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4442 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4443 }
4444 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4445 return 0;
4446
4447 out_free_mem:
4448 lpfc_io_free(phba);
4449 return rc;
4450 }
4451
4452 /**
4453 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4454 * @phba: Pointer to lpfc hba data structure.
4455 * @num_to_alloc: The requested number of buffers to allocate.
4456 *
4457 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4458 * the nvme buffer contains all the necessary information needed to initiate
4459 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4460 * them on a list, it post them to the port by using SGL block post.
4461 *
4462 * Return codes:
4463 * int - number of IO buffers that were allocated and posted.
4464 * 0 = failure, less than num_to_alloc is a partial failure.
4465 **/
4466 int
lpfc_new_io_buf(struct lpfc_hba * phba,int num_to_alloc)4467 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4468 {
4469 struct lpfc_io_buf *lpfc_ncmd;
4470 struct lpfc_iocbq *pwqeq;
4471 uint16_t iotag, lxri = 0;
4472 int bcnt, num_posted;
4473 LIST_HEAD(prep_nblist);
4474 LIST_HEAD(post_nblist);
4475 LIST_HEAD(nvme_nblist);
4476
4477 phba->sli4_hba.io_xri_cnt = 0;
4478 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4479 lpfc_ncmd = kzalloc_obj(*lpfc_ncmd);
4480 if (!lpfc_ncmd)
4481 break;
4482 /*
4483 * Get memory from the pci pool to map the virt space to
4484 * pci bus space for an I/O. The DMA buffer includes the
4485 * number of SGE's necessary to support the sg_tablesize.
4486 */
4487 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4488 GFP_KERNEL,
4489 &lpfc_ncmd->dma_handle);
4490 if (!lpfc_ncmd->data) {
4491 kfree(lpfc_ncmd);
4492 break;
4493 }
4494
4495 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4496 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4497 } else {
4498 /*
4499 * 4K Page alignment is CRITICAL to BlockGuard, double
4500 * check to be sure.
4501 */
4502 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4503 (((unsigned long)(lpfc_ncmd->data) &
4504 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4505 lpfc_printf_log(phba, KERN_ERR,
4506 LOG_TRACE_EVENT,
4507 "3369 Memory alignment err: "
4508 "addr=%lx\n",
4509 (unsigned long)lpfc_ncmd->data);
4510 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4511 lpfc_ncmd->data,
4512 lpfc_ncmd->dma_handle);
4513 kfree(lpfc_ncmd);
4514 break;
4515 }
4516 }
4517
4518 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4519
4520 lxri = lpfc_sli4_next_xritag(phba);
4521 if (lxri == NO_XRI) {
4522 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4523 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4524 kfree(lpfc_ncmd);
4525 break;
4526 }
4527 pwqeq = &lpfc_ncmd->cur_iocbq;
4528
4529 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4530 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4531 if (iotag == 0) {
4532 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4533 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4534 kfree(lpfc_ncmd);
4535 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4536 "6121 Failed to allocate IOTAG for"
4537 " XRI:0x%x\n", lxri);
4538 lpfc_sli4_free_xri(phba, lxri);
4539 break;
4540 }
4541 pwqeq->sli4_lxritag = lxri;
4542 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4543
4544 /* Initialize local short-hand pointers. */
4545 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4546 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4547 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4548 spin_lock_init(&lpfc_ncmd->buf_lock);
4549
4550 /* add the nvme buffer to a post list */
4551 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4552 phba->sli4_hba.io_xri_cnt++;
4553 }
4554 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4555 "6114 Allocate %d out of %d requested new NVME "
4556 "buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4557 sizeof(*lpfc_ncmd));
4558
4559
4560 /* post the list of nvme buffer sgls to port if available */
4561 if (!list_empty(&post_nblist))
4562 num_posted = lpfc_sli4_post_io_sgl_list(
4563 phba, &post_nblist, bcnt);
4564 else
4565 num_posted = 0;
4566
4567 return num_posted;
4568 }
4569
4570 static uint64_t
lpfc_get_wwpn(struct lpfc_hba * phba)4571 lpfc_get_wwpn(struct lpfc_hba *phba)
4572 {
4573 uint64_t wwn;
4574 int rc;
4575 LPFC_MBOXQ_t *mboxq;
4576 MAILBOX_t *mb;
4577
4578 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4579 GFP_KERNEL);
4580 if (!mboxq)
4581 return (uint64_t)-1;
4582
4583 /* First get WWN of HBA instance */
4584 lpfc_read_nv(phba, mboxq);
4585 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4586 if (rc != MBX_SUCCESS) {
4587 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4588 "6019 Mailbox failed , mbxCmd x%x "
4589 "READ_NV, mbxStatus x%x\n",
4590 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4591 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4592 mempool_free(mboxq, phba->mbox_mem_pool);
4593 return (uint64_t) -1;
4594 }
4595 mb = &mboxq->u.mb;
4596 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4597 /* wwn is WWPN of HBA instance */
4598 mempool_free(mboxq, phba->mbox_mem_pool);
4599 if (phba->sli_rev == LPFC_SLI_REV4)
4600 return be64_to_cpu(wwn);
4601 else
4602 return rol64(wwn, 32);
4603 }
4604
lpfc_get_sg_tablesize(struct lpfc_hba * phba)4605 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4606 {
4607 if (phba->sli_rev == LPFC_SLI_REV4)
4608 if (phba->cfg_xpsgl && !phba->nvmet_support)
4609 return LPFC_MAX_SG_TABLESIZE;
4610 else
4611 return phba->cfg_scsi_seg_cnt;
4612 else
4613 return phba->cfg_sg_seg_cnt;
4614 }
4615
4616 /**
4617 * lpfc_vmid_res_alloc - Allocates resources for VMID
4618 * @phba: pointer to lpfc hba data structure.
4619 * @vport: pointer to vport data structure
4620 *
4621 * This routine allocated the resources needed for the VMID.
4622 *
4623 * Return codes
4624 * 0 on Success
4625 * Non-0 on Failure
4626 */
4627 static int
lpfc_vmid_res_alloc(struct lpfc_hba * phba,struct lpfc_vport * vport)4628 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4629 {
4630 /* VMID feature is supported only on SLI4 */
4631 if (phba->sli_rev == LPFC_SLI_REV3) {
4632 phba->cfg_vmid_app_header = 0;
4633 phba->cfg_vmid_priority_tagging = 0;
4634 }
4635
4636 if (lpfc_is_vmid_enabled(phba)) {
4637 vport->vmid =
4638 kzalloc_objs(struct lpfc_vmid, phba->cfg_max_vmid);
4639 if (!vport->vmid)
4640 return -ENOMEM;
4641
4642 rwlock_init(&vport->vmid_lock);
4643
4644 /* Set the VMID parameters for the vport */
4645 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4646 vport->vmid_inactivity_timeout =
4647 phba->cfg_vmid_inactivity_timeout;
4648 vport->max_vmid = phba->cfg_max_vmid;
4649 vport->cur_vmid_cnt = 0;
4650
4651 vport->vmid_priority_range = bitmap_zalloc
4652 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4653
4654 if (!vport->vmid_priority_range) {
4655 kfree(vport->vmid);
4656 return -ENOMEM;
4657 }
4658
4659 hash_init(vport->hash_table);
4660 }
4661 return 0;
4662 }
4663
4664 /**
4665 * lpfc_create_port - Create an FC port
4666 * @phba: pointer to lpfc hba data structure.
4667 * @instance: a unique integer ID to this FC port.
4668 * @dev: pointer to the device data structure.
4669 *
4670 * This routine creates a FC port for the upper layer protocol. The FC port
4671 * can be created on top of either a physical port or a virtual port provided
4672 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4673 * and associates the FC port created before adding the shost into the SCSI
4674 * layer.
4675 *
4676 * Return codes
4677 * @vport - pointer to the virtual N_Port data structure.
4678 * NULL - port create failed.
4679 **/
4680 struct lpfc_vport *
lpfc_create_port(struct lpfc_hba * phba,int instance,struct device * dev)4681 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4682 {
4683 struct lpfc_vport *vport;
4684 struct Scsi_Host *shost = NULL;
4685 struct scsi_host_template *template;
4686 int error = 0;
4687 int i;
4688 uint64_t wwn;
4689 bool use_no_reset_hba = false;
4690 int rc;
4691 u8 if_type;
4692
4693 if (lpfc_no_hba_reset_cnt) {
4694 if (phba->sli_rev < LPFC_SLI_REV4 &&
4695 dev == &phba->pcidev->dev) {
4696 /* Reset the port first */
4697 lpfc_sli_brdrestart(phba);
4698 rc = lpfc_sli_chipset_init(phba);
4699 if (rc)
4700 return NULL;
4701 }
4702 wwn = lpfc_get_wwpn(phba);
4703 }
4704
4705 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4706 if (wwn == lpfc_no_hba_reset[i]) {
4707 lpfc_printf_log(phba, KERN_ERR,
4708 LOG_TRACE_EVENT,
4709 "6020 Setting use_no_reset port=%llx\n",
4710 wwn);
4711 use_no_reset_hba = true;
4712 break;
4713 }
4714 }
4715
4716 /* Seed template for SCSI host registration */
4717 if (dev == &phba->pcidev->dev) {
4718 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4719 /* Seed physical port template */
4720 template = &lpfc_template;
4721
4722 if (use_no_reset_hba)
4723 /* template is for a no reset SCSI Host */
4724 template->eh_host_reset_handler = NULL;
4725
4726 /* Seed updated value of sg_tablesize */
4727 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4728 } else {
4729 /* NVMET is for physical port only */
4730 template = &lpfc_template_nvme;
4731 }
4732 } else {
4733 /* Seed vport template */
4734 template = &lpfc_vport_template;
4735
4736 /* Seed updated value of sg_tablesize */
4737 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4738 }
4739
4740 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4741 if (!shost)
4742 goto out;
4743
4744 vport = (struct lpfc_vport *) shost->hostdata;
4745 vport->phba = phba;
4746 set_bit(FC_LOADING, &vport->load_flag);
4747 set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag);
4748 vport->fc_rscn_flush = 0;
4749 atomic_set(&vport->fc_plogi_cnt, 0);
4750 atomic_set(&vport->fc_adisc_cnt, 0);
4751 atomic_set(&vport->fc_reglogin_cnt, 0);
4752 atomic_set(&vport->fc_prli_cnt, 0);
4753 atomic_set(&vport->fc_unmap_cnt, 0);
4754 atomic_set(&vport->fc_map_cnt, 0);
4755 atomic_set(&vport->fc_npr_cnt, 0);
4756 atomic_set(&vport->fc_unused_cnt, 0);
4757 lpfc_get_vport_cfgparam(vport);
4758
4759 /* Adjust value in vport */
4760 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4761
4762 shost->unique_id = instance;
4763 shost->max_id = LPFC_MAX_TARGET;
4764 shost->max_lun = vport->cfg_max_luns;
4765 shost->this_id = -1;
4766
4767 /* Set max_cmd_len applicable to ASIC support */
4768 if (phba->sli_rev == LPFC_SLI_REV4) {
4769 if_type = bf_get(lpfc_sli_intf_if_type,
4770 &phba->sli4_hba.sli_intf);
4771 switch (if_type) {
4772 case LPFC_SLI_INTF_IF_TYPE_2:
4773 fallthrough;
4774 case LPFC_SLI_INTF_IF_TYPE_6:
4775 shost->max_cmd_len = LPFC_FCP_CDB_LEN_32;
4776 break;
4777 default:
4778 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4779 break;
4780 }
4781 } else {
4782 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4783 }
4784
4785 if (phba->sli_rev == LPFC_SLI_REV4) {
4786 if (!phba->cfg_fcp_mq_threshold ||
4787 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4788 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4789
4790 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4791 phba->cfg_fcp_mq_threshold);
4792
4793 shost->dma_boundary =
4794 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4795 } else
4796 /* SLI-3 has a limited number of hardware queues (3),
4797 * thus there is only one for FCP processing.
4798 */
4799 shost->nr_hw_queues = 1;
4800
4801 /*
4802 * Set initial can_queue value since 0 is no longer supported and
4803 * scsi_add_host will fail. This will be adjusted later based on the
4804 * max xri value determined in hba setup.
4805 */
4806 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4807 if (dev != &phba->pcidev->dev) {
4808 shost->transportt = lpfc_vport_transport_template;
4809 vport->port_type = LPFC_NPIV_PORT;
4810 } else {
4811 shost->transportt = lpfc_transport_template;
4812 vport->port_type = LPFC_PHYSICAL_PORT;
4813 }
4814
4815 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4816 "9081 CreatePort TMPLATE type %x TBLsize %d "
4817 "SEGcnt %d/%d\n",
4818 vport->port_type, shost->sg_tablesize,
4819 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4820
4821 /* Allocate the resources for VMID */
4822 rc = lpfc_vmid_res_alloc(phba, vport);
4823
4824 if (rc)
4825 goto out_put_shost;
4826
4827 /* Initialize all internally managed lists. */
4828 INIT_LIST_HEAD(&vport->fc_nodes);
4829 spin_lock_init(&vport->fc_nodes_list_lock);
4830 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4831 spin_lock_init(&vport->work_port_lock);
4832
4833 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4834
4835 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4836
4837 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4838
4839 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4840 lpfc_setup_bg(phba, shost);
4841
4842 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4843 if (error)
4844 goto out_free_vmid;
4845
4846 spin_lock_irq(&phba->port_list_lock);
4847 list_add_tail(&vport->listentry, &phba->port_list);
4848 spin_unlock_irq(&phba->port_list_lock);
4849 return vport;
4850
4851 out_free_vmid:
4852 kfree(vport->vmid);
4853 bitmap_free(vport->vmid_priority_range);
4854 out_put_shost:
4855 scsi_host_put(shost);
4856 out:
4857 return NULL;
4858 }
4859
4860 /**
4861 * destroy_port - destroy an FC port
4862 * @vport: pointer to an lpfc virtual N_Port data structure.
4863 *
4864 * This routine destroys a FC port from the upper layer protocol. All the
4865 * resources associated with the port are released.
4866 **/
4867 void
destroy_port(struct lpfc_vport * vport)4868 destroy_port(struct lpfc_vport *vport)
4869 {
4870 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4871 struct lpfc_hba *phba = vport->phba;
4872
4873 lpfc_debugfs_terminate(vport);
4874 fc_remove_host(shost);
4875 scsi_remove_host(shost);
4876
4877 spin_lock_irq(&phba->port_list_lock);
4878 list_del_init(&vport->listentry);
4879 spin_unlock_irq(&phba->port_list_lock);
4880
4881 lpfc_cleanup(vport);
4882 return;
4883 }
4884
4885 /**
4886 * lpfc_get_instance - Get a unique integer ID
4887 *
4888 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4889 * uses the kernel idr facility to perform the task.
4890 *
4891 * Return codes:
4892 * instance - a unique integer ID allocated as the new instance.
4893 * -1 - lpfc get instance failed.
4894 **/
4895 int
lpfc_get_instance(void)4896 lpfc_get_instance(void)
4897 {
4898 int ret;
4899
4900 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4901 return ret < 0 ? -1 : ret;
4902 }
4903
4904 /**
4905 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4906 * @shost: pointer to SCSI host data structure.
4907 * @time: elapsed time of the scan in jiffies.
4908 *
4909 * This routine is called by the SCSI layer with a SCSI host to determine
4910 * whether the scan host is finished.
4911 *
4912 * Note: there is no scan_start function as adapter initialization will have
4913 * asynchronously kicked off the link initialization.
4914 *
4915 * Return codes
4916 * 0 - SCSI host scan is not over yet.
4917 * 1 - SCSI host scan is over.
4918 **/
lpfc_scan_finished(struct Scsi_Host * shost,unsigned long time)4919 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4920 {
4921 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4922 struct lpfc_hba *phba = vport->phba;
4923 int stat = 0;
4924
4925 spin_lock_irq(shost->host_lock);
4926
4927 if (test_bit(FC_UNLOADING, &vport->load_flag)) {
4928 stat = 1;
4929 goto finished;
4930 }
4931 if (time >= secs_to_jiffies(30)) {
4932 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4933 "0461 Scanning longer than 30 "
4934 "seconds. Continuing initialization\n");
4935 stat = 1;
4936 goto finished;
4937 }
4938 if (time >= secs_to_jiffies(15) &&
4939 phba->link_state <= LPFC_LINK_DOWN) {
4940 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4941 "0465 Link down longer than 15 "
4942 "seconds. Continuing initialization\n");
4943 stat = 1;
4944 goto finished;
4945 }
4946
4947 if (vport->port_state != LPFC_VPORT_READY)
4948 goto finished;
4949 if (vport->num_disc_nodes || vport->fc_prli_sent)
4950 goto finished;
4951 if (!atomic_read(&vport->fc_map_cnt) &&
4952 time < secs_to_jiffies(2))
4953 goto finished;
4954 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4955 goto finished;
4956
4957 stat = 1;
4958
4959 finished:
4960 spin_unlock_irq(shost->host_lock);
4961 return stat;
4962 }
4963
lpfc_host_supported_speeds_set(struct Scsi_Host * shost)4964 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4965 {
4966 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4967 struct lpfc_hba *phba = vport->phba;
4968
4969 fc_host_supported_speeds(shost) = 0;
4970 /*
4971 * Avoid reporting supported link speed for FCoE as it can't be
4972 * controlled via FCoE.
4973 */
4974 if (test_bit(HBA_FCOE_MODE, &phba->hba_flag))
4975 return;
4976
4977 if (phba->lmt & LMT_256Gb)
4978 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4979 if (phba->lmt & LMT_128Gb)
4980 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4981 if (phba->lmt & LMT_64Gb)
4982 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4983 if (phba->lmt & LMT_32Gb)
4984 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4985 if (phba->lmt & LMT_16Gb)
4986 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4987 if (phba->lmt & LMT_10Gb)
4988 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4989 if (phba->lmt & LMT_8Gb)
4990 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4991 if (phba->lmt & LMT_4Gb)
4992 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4993 if (phba->lmt & LMT_2Gb)
4994 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4995 if (phba->lmt & LMT_1Gb)
4996 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4997 }
4998
4999 /**
5000 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
5001 * @shost: pointer to SCSI host data structure.
5002 *
5003 * This routine initializes a given SCSI host attributes on a FC port. The
5004 * SCSI host can be either on top of a physical port or a virtual port.
5005 **/
lpfc_host_attrib_init(struct Scsi_Host * shost)5006 void lpfc_host_attrib_init(struct Scsi_Host *shost)
5007 {
5008 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
5009 struct lpfc_hba *phba = vport->phba;
5010 /*
5011 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
5012 */
5013
5014 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5015 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5016 fc_host_supported_classes(shost) = FC_COS_CLASS3;
5017
5018 memset(fc_host_supported_fc4s(shost), 0,
5019 sizeof(fc_host_supported_fc4s(shost)));
5020 fc_host_supported_fc4s(shost)[2] = 1;
5021 fc_host_supported_fc4s(shost)[7] = 1;
5022
5023 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5024 sizeof fc_host_symbolic_name(shost));
5025
5026 lpfc_host_supported_speeds_set(shost);
5027
5028 fc_host_maxframe_size(shost) =
5029 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5030 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5031
5032 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5033
5034 /* This value is also unchanging */
5035 memset(fc_host_active_fc4s(shost), 0,
5036 sizeof(fc_host_active_fc4s(shost)));
5037 fc_host_active_fc4s(shost)[2] = 1;
5038 fc_host_active_fc4s(shost)[7] = 1;
5039
5040 fc_host_max_npiv_vports(shost) = phba->max_vpi;
5041 clear_bit(FC_LOADING, &vport->load_flag);
5042 }
5043
5044 /**
5045 * lpfc_stop_port_s3 - Stop SLI3 device port
5046 * @phba: pointer to lpfc hba data structure.
5047 *
5048 * This routine is invoked to stop an SLI3 device port, it stops the device
5049 * from generating interrupts and stops the device driver's timers for the
5050 * device.
5051 **/
5052 static void
lpfc_stop_port_s3(struct lpfc_hba * phba)5053 lpfc_stop_port_s3(struct lpfc_hba *phba)
5054 {
5055 /* Clear all interrupt enable conditions */
5056 writel(0, phba->HCregaddr);
5057 readl(phba->HCregaddr); /* flush */
5058 /* Clear all pending interrupts */
5059 writel(0xffffffff, phba->HAregaddr);
5060 readl(phba->HAregaddr); /* flush */
5061
5062 /* Reset some HBA SLI setup states */
5063 lpfc_stop_hba_timers(phba);
5064 phba->pport->work_port_events = 0;
5065 }
5066
5067 /**
5068 * lpfc_stop_port_s4 - Stop SLI4 device port
5069 * @phba: pointer to lpfc hba data structure.
5070 *
5071 * This routine is invoked to stop an SLI4 device port, it stops the device
5072 * from generating interrupts and stops the device driver's timers for the
5073 * device.
5074 **/
5075 static void
lpfc_stop_port_s4(struct lpfc_hba * phba)5076 lpfc_stop_port_s4(struct lpfc_hba *phba)
5077 {
5078 /* Reset some HBA SLI4 setup states */
5079 lpfc_stop_hba_timers(phba);
5080 if (phba->pport)
5081 phba->pport->work_port_events = 0;
5082 phba->sli4_hba.intr_enable = 0;
5083 }
5084
5085 /**
5086 * lpfc_stop_port - Wrapper function for stopping hba port
5087 * @phba: Pointer to HBA context object.
5088 *
5089 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5090 * the API jump table function pointer from the lpfc_hba struct.
5091 **/
5092 void
lpfc_stop_port(struct lpfc_hba * phba)5093 lpfc_stop_port(struct lpfc_hba *phba)
5094 {
5095 phba->lpfc_stop_port(phba);
5096
5097 if (phba->wq)
5098 flush_workqueue(phba->wq);
5099 }
5100
5101 /**
5102 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5103 * @phba: Pointer to hba for which this call is being executed.
5104 *
5105 * This routine starts the timer waiting for the FCF rediscovery to complete.
5106 **/
5107 void
lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba * phba)5108 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5109 {
5110 unsigned long fcf_redisc_wait_tmo =
5111 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5112 /* Start fcf rediscovery wait period timer */
5113 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5114 spin_lock_irq(&phba->hbalock);
5115 /* Allow action to new fcf asynchronous event */
5116 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5117 /* Mark the FCF rediscovery pending state */
5118 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5119 spin_unlock_irq(&phba->hbalock);
5120 }
5121
5122 /**
5123 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5124 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5125 *
5126 * This routine is invoked when waiting for FCF table rediscover has been
5127 * timed out. If new FCF record(s) has (have) been discovered during the
5128 * wait period, a new FCF event shall be added to the FCOE async event
5129 * list, and then worker thread shall be waked up for processing from the
5130 * worker thread context.
5131 **/
5132 static void
lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list * t)5133 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5134 {
5135 struct lpfc_hba *phba = timer_container_of(phba, t, fcf.redisc_wait);
5136
5137 /* Don't send FCF rediscovery event if timer cancelled */
5138 spin_lock_irq(&phba->hbalock);
5139 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5140 spin_unlock_irq(&phba->hbalock);
5141 return;
5142 }
5143 /* Clear FCF rediscovery timer pending flag */
5144 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5145 /* FCF rediscovery event to worker thread */
5146 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5147 spin_unlock_irq(&phba->hbalock);
5148 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5149 "2776 FCF rediscover quiescent timer expired\n");
5150 /* wake up worker thread */
5151 lpfc_worker_wake_up(phba);
5152 }
5153
5154 /**
5155 * lpfc_vmid_poll - VMID timeout detection
5156 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5157 *
5158 * This routine is invoked when there is no I/O on by a VM for the specified
5159 * amount of time. When this situation is detected, the VMID has to be
5160 * deregistered from the switch and all the local resources freed. The VMID
5161 * will be reassigned to the VM once the I/O begins.
5162 **/
5163 static void
lpfc_vmid_poll(struct timer_list * t)5164 lpfc_vmid_poll(struct timer_list *t)
5165 {
5166 struct lpfc_hba *phba = timer_container_of(phba, t,
5167 inactive_vmid_poll);
5168 u32 wake_up = 0;
5169
5170 /* check if there is a need to issue QFPA */
5171 if (phba->pport->vmid_priority_tagging) {
5172 wake_up = 1;
5173 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5174 }
5175
5176 /* Is the vmid inactivity timer enabled */
5177 if (phba->pport->vmid_inactivity_timeout ||
5178 test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) {
5179 wake_up = 1;
5180 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5181 }
5182
5183 if (wake_up)
5184 lpfc_worker_wake_up(phba);
5185
5186 /* restart the timer for the next iteration */
5187 mod_timer(&phba->inactive_vmid_poll,
5188 jiffies + secs_to_jiffies(LPFC_VMID_TIMER));
5189 }
5190
5191 /**
5192 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5193 * @phba: pointer to lpfc hba data structure.
5194 * @acqe_link: pointer to the async link completion queue entry.
5195 *
5196 * This routine is to parse the SLI4 link-attention link fault code.
5197 **/
5198 static void
lpfc_sli4_parse_latt_fault(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5199 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5200 struct lpfc_acqe_link *acqe_link)
5201 {
5202 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) {
5203 case LPFC_FC_LA_TYPE_LINK_DOWN:
5204 case LPFC_FC_LA_TYPE_TRUNKING_EVENT:
5205 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
5206 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
5207 break;
5208 default:
5209 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5210 case LPFC_ASYNC_LINK_FAULT_NONE:
5211 case LPFC_ASYNC_LINK_FAULT_LOCAL:
5212 case LPFC_ASYNC_LINK_FAULT_REMOTE:
5213 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5214 break;
5215 default:
5216 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5217 "0398 Unknown link fault code: x%x\n",
5218 bf_get(lpfc_acqe_link_fault, acqe_link));
5219 break;
5220 }
5221 break;
5222 }
5223 }
5224
5225 /**
5226 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5227 * @phba: pointer to lpfc hba data structure.
5228 * @acqe_link: pointer to the async link completion queue entry.
5229 *
5230 * This routine is to parse the SLI4 link attention type and translate it
5231 * into the base driver's link attention type coding.
5232 *
5233 * Return: Link attention type in terms of base driver's coding.
5234 **/
5235 static uint8_t
lpfc_sli4_parse_latt_type(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5236 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5237 struct lpfc_acqe_link *acqe_link)
5238 {
5239 uint8_t att_type;
5240
5241 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5242 case LPFC_ASYNC_LINK_STATUS_DOWN:
5243 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5244 att_type = LPFC_ATT_LINK_DOWN;
5245 break;
5246 case LPFC_ASYNC_LINK_STATUS_UP:
5247 /* Ignore physical link up events - wait for logical link up */
5248 att_type = LPFC_ATT_RESERVED;
5249 break;
5250 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5251 att_type = LPFC_ATT_LINK_UP;
5252 break;
5253 default:
5254 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5255 "0399 Invalid link attention type: x%x\n",
5256 bf_get(lpfc_acqe_link_status, acqe_link));
5257 att_type = LPFC_ATT_RESERVED;
5258 break;
5259 }
5260 return att_type;
5261 }
5262
5263 /**
5264 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5265 * @phba: pointer to lpfc hba data structure.
5266 *
5267 * This routine is to get an SLI3 FC port's link speed in Mbps.
5268 *
5269 * Return: link speed in terms of Mbps.
5270 **/
5271 uint32_t
lpfc_sli_port_speed_get(struct lpfc_hba * phba)5272 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5273 {
5274 uint32_t link_speed;
5275
5276 if (!lpfc_is_link_up(phba))
5277 return 0;
5278
5279 if (phba->sli_rev <= LPFC_SLI_REV3) {
5280 switch (phba->fc_linkspeed) {
5281 case LPFC_LINK_SPEED_1GHZ:
5282 link_speed = 1000;
5283 break;
5284 case LPFC_LINK_SPEED_2GHZ:
5285 link_speed = 2000;
5286 break;
5287 case LPFC_LINK_SPEED_4GHZ:
5288 link_speed = 4000;
5289 break;
5290 case LPFC_LINK_SPEED_8GHZ:
5291 link_speed = 8000;
5292 break;
5293 case LPFC_LINK_SPEED_10GHZ:
5294 link_speed = 10000;
5295 break;
5296 case LPFC_LINK_SPEED_16GHZ:
5297 link_speed = 16000;
5298 break;
5299 default:
5300 link_speed = 0;
5301 }
5302 } else {
5303 if (phba->sli4_hba.link_state.logical_speed)
5304 link_speed =
5305 phba->sli4_hba.link_state.logical_speed;
5306 else
5307 link_speed = phba->sli4_hba.link_state.speed;
5308 }
5309 return link_speed;
5310 }
5311
5312 /**
5313 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5314 * @phba: pointer to lpfc hba data structure.
5315 * @evt_code: asynchronous event code.
5316 * @speed_code: asynchronous event link speed code.
5317 *
5318 * This routine is to parse the giving SLI4 async event link speed code into
5319 * value of Mbps for the link speed.
5320 *
5321 * Return: link speed in terms of Mbps.
5322 **/
5323 static uint32_t
lpfc_sli4_port_speed_parse(struct lpfc_hba * phba,uint32_t evt_code,uint8_t speed_code)5324 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5325 uint8_t speed_code)
5326 {
5327 uint32_t port_speed;
5328
5329 switch (evt_code) {
5330 case LPFC_TRAILER_CODE_LINK:
5331 switch (speed_code) {
5332 case LPFC_ASYNC_LINK_SPEED_ZERO:
5333 port_speed = 0;
5334 break;
5335 case LPFC_ASYNC_LINK_SPEED_10MBPS:
5336 port_speed = 10;
5337 break;
5338 case LPFC_ASYNC_LINK_SPEED_100MBPS:
5339 port_speed = 100;
5340 break;
5341 case LPFC_ASYNC_LINK_SPEED_1GBPS:
5342 port_speed = 1000;
5343 break;
5344 case LPFC_ASYNC_LINK_SPEED_10GBPS:
5345 port_speed = 10000;
5346 break;
5347 case LPFC_ASYNC_LINK_SPEED_20GBPS:
5348 port_speed = 20000;
5349 break;
5350 case LPFC_ASYNC_LINK_SPEED_25GBPS:
5351 port_speed = 25000;
5352 break;
5353 case LPFC_ASYNC_LINK_SPEED_40GBPS:
5354 port_speed = 40000;
5355 break;
5356 case LPFC_ASYNC_LINK_SPEED_100GBPS:
5357 port_speed = 100000;
5358 break;
5359 default:
5360 port_speed = 0;
5361 }
5362 break;
5363 case LPFC_TRAILER_CODE_FC:
5364 switch (speed_code) {
5365 case LPFC_FC_LA_SPEED_UNKNOWN:
5366 port_speed = 0;
5367 break;
5368 case LPFC_FC_LA_SPEED_1G:
5369 port_speed = 1000;
5370 break;
5371 case LPFC_FC_LA_SPEED_2G:
5372 port_speed = 2000;
5373 break;
5374 case LPFC_FC_LA_SPEED_4G:
5375 port_speed = 4000;
5376 break;
5377 case LPFC_FC_LA_SPEED_8G:
5378 port_speed = 8000;
5379 break;
5380 case LPFC_FC_LA_SPEED_10G:
5381 port_speed = 10000;
5382 break;
5383 case LPFC_FC_LA_SPEED_16G:
5384 port_speed = 16000;
5385 break;
5386 case LPFC_FC_LA_SPEED_32G:
5387 port_speed = 32000;
5388 break;
5389 case LPFC_FC_LA_SPEED_64G:
5390 port_speed = 64000;
5391 break;
5392 case LPFC_FC_LA_SPEED_128G:
5393 port_speed = 128000;
5394 break;
5395 case LPFC_FC_LA_SPEED_256G:
5396 port_speed = 256000;
5397 break;
5398 default:
5399 port_speed = 0;
5400 }
5401 break;
5402 default:
5403 port_speed = 0;
5404 }
5405 return port_speed;
5406 }
5407
5408 /**
5409 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5410 * @phba: pointer to lpfc hba data structure.
5411 * @acqe_link: pointer to the async link completion queue entry.
5412 *
5413 * This routine is to handle the SLI4 asynchronous FCoE link event.
5414 **/
5415 static void
lpfc_sli4_async_link_evt(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5416 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5417 struct lpfc_acqe_link *acqe_link)
5418 {
5419 LPFC_MBOXQ_t *pmb;
5420 MAILBOX_t *mb;
5421 struct lpfc_mbx_read_top *la;
5422 uint8_t att_type;
5423 int rc;
5424
5425 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5426 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5427 return;
5428 phba->fcoe_eventtag = acqe_link->event_tag;
5429 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5430 if (!pmb) {
5431 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5432 "0395 The mboxq allocation failed\n");
5433 return;
5434 }
5435
5436 rc = lpfc_mbox_rsrc_prep(phba, pmb);
5437 if (rc) {
5438 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5439 "0396 mailbox allocation failed\n");
5440 goto out_free_pmb;
5441 }
5442
5443 /* Cleanup any outstanding ELS commands */
5444 lpfc_els_flush_all_cmd(phba);
5445
5446 /* Block ELS IOCBs until we have done process link event */
5447 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5448
5449 /* Update link event statistics */
5450 phba->sli.slistat.link_event++;
5451
5452 /* Create lpfc_handle_latt mailbox command from link ACQE */
5453 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
5454 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5455 pmb->vport = phba->pport;
5456
5457 /* Keep the link status for extra SLI4 state machine reference */
5458 phba->sli4_hba.link_state.speed =
5459 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5460 bf_get(lpfc_acqe_link_speed, acqe_link));
5461 phba->sli4_hba.link_state.duplex =
5462 bf_get(lpfc_acqe_link_duplex, acqe_link);
5463 phba->sli4_hba.link_state.status =
5464 bf_get(lpfc_acqe_link_status, acqe_link);
5465 phba->sli4_hba.link_state.type =
5466 bf_get(lpfc_acqe_link_type, acqe_link);
5467 phba->sli4_hba.link_state.number =
5468 bf_get(lpfc_acqe_link_number, acqe_link);
5469 phba->sli4_hba.link_state.fault =
5470 bf_get(lpfc_acqe_link_fault, acqe_link);
5471 phba->sli4_hba.link_state.logical_speed =
5472 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5473
5474 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5475 "2900 Async FC/FCoE Link event - Speed:%dGBit "
5476 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5477 "Logical speed:%dMbps Fault:%d\n",
5478 phba->sli4_hba.link_state.speed,
5479 phba->sli4_hba.link_state.topology,
5480 phba->sli4_hba.link_state.status,
5481 phba->sli4_hba.link_state.type,
5482 phba->sli4_hba.link_state.number,
5483 phba->sli4_hba.link_state.logical_speed,
5484 phba->sli4_hba.link_state.fault);
5485 /*
5486 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5487 * topology info. Note: Optional for non FC-AL ports.
5488 */
5489 if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) {
5490 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5491 if (rc == MBX_NOT_FINISHED)
5492 goto out_free_pmb;
5493 return;
5494 }
5495 /*
5496 * For FCoE Mode: fill in all the topology information we need and call
5497 * the READ_TOPOLOGY completion routine to continue without actually
5498 * sending the READ_TOPOLOGY mailbox command to the port.
5499 */
5500 /* Initialize completion status */
5501 mb = &pmb->u.mb;
5502 mb->mbxStatus = MBX_SUCCESS;
5503
5504 /* Parse port fault information field */
5505 lpfc_sli4_parse_latt_fault(phba, acqe_link);
5506
5507 /* Parse and translate link attention fields */
5508 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5509 la->eventTag = acqe_link->event_tag;
5510 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5511 bf_set(lpfc_mbx_read_top_link_spd, la,
5512 (bf_get(lpfc_acqe_link_speed, acqe_link)));
5513
5514 /* Fake the following irrelevant fields */
5515 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5516 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5517 bf_set(lpfc_mbx_read_top_il, la, 0);
5518 bf_set(lpfc_mbx_read_top_pb, la, 0);
5519 bf_set(lpfc_mbx_read_top_fa, la, 0);
5520 bf_set(lpfc_mbx_read_top_mm, la, 0);
5521
5522 /* Invoke the lpfc_handle_latt mailbox command callback function */
5523 lpfc_mbx_cmpl_read_topology(phba, pmb);
5524
5525 return;
5526
5527 out_free_pmb:
5528 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5529 }
5530
5531 /**
5532 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5533 * topology.
5534 * @phba: pointer to lpfc hba data structure.
5535 * @speed_code: asynchronous event link speed code.
5536 *
5537 * This routine is to parse the giving SLI4 async event link speed code into
5538 * value of Read topology link speed.
5539 *
5540 * Return: link speed in terms of Read topology.
5541 **/
5542 static uint8_t
lpfc_async_link_speed_to_read_top(struct lpfc_hba * phba,uint8_t speed_code)5543 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5544 {
5545 uint8_t port_speed;
5546
5547 switch (speed_code) {
5548 case LPFC_FC_LA_SPEED_1G:
5549 port_speed = LPFC_LINK_SPEED_1GHZ;
5550 break;
5551 case LPFC_FC_LA_SPEED_2G:
5552 port_speed = LPFC_LINK_SPEED_2GHZ;
5553 break;
5554 case LPFC_FC_LA_SPEED_4G:
5555 port_speed = LPFC_LINK_SPEED_4GHZ;
5556 break;
5557 case LPFC_FC_LA_SPEED_8G:
5558 port_speed = LPFC_LINK_SPEED_8GHZ;
5559 break;
5560 case LPFC_FC_LA_SPEED_16G:
5561 port_speed = LPFC_LINK_SPEED_16GHZ;
5562 break;
5563 case LPFC_FC_LA_SPEED_32G:
5564 port_speed = LPFC_LINK_SPEED_32GHZ;
5565 break;
5566 case LPFC_FC_LA_SPEED_64G:
5567 port_speed = LPFC_LINK_SPEED_64GHZ;
5568 break;
5569 case LPFC_FC_LA_SPEED_128G:
5570 port_speed = LPFC_LINK_SPEED_128GHZ;
5571 break;
5572 case LPFC_FC_LA_SPEED_256G:
5573 port_speed = LPFC_LINK_SPEED_256GHZ;
5574 break;
5575 default:
5576 port_speed = 0;
5577 break;
5578 }
5579
5580 return port_speed;
5581 }
5582
5583 void
lpfc_cgn_dump_rxmonitor(struct lpfc_hba * phba)5584 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5585 {
5586 if (!phba->rx_monitor) {
5587 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5588 "4411 Rx Monitor Info is empty.\n");
5589 } else {
5590 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5591 LPFC_MAX_RXMONITOR_DUMP);
5592 }
5593 }
5594
5595 /**
5596 * lpfc_cgn_update_stat - Save data into congestion stats buffer
5597 * @phba: pointer to lpfc hba data structure.
5598 * @dtag: FPIN descriptor received
5599 *
5600 * Increment the FPIN received counter/time when it happens.
5601 */
5602 void
lpfc_cgn_update_stat(struct lpfc_hba * phba,uint32_t dtag)5603 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5604 {
5605 struct lpfc_cgn_info *cp;
5606 u32 value;
5607
5608 /* Make sure we have a congestion info buffer */
5609 if (!phba->cgn_i)
5610 return;
5611 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5612
5613 /* Update congestion statistics */
5614 switch (dtag) {
5615 case ELS_DTAG_LNK_INTEGRITY:
5616 le32_add_cpu(&cp->link_integ_notification, 1);
5617 lpfc_cgn_update_tstamp(phba, &cp->stat_lnk);
5618 break;
5619 case ELS_DTAG_DELIVERY:
5620 le32_add_cpu(&cp->delivery_notification, 1);
5621 lpfc_cgn_update_tstamp(phba, &cp->stat_delivery);
5622 break;
5623 case ELS_DTAG_PEER_CONGEST:
5624 le32_add_cpu(&cp->cgn_peer_notification, 1);
5625 lpfc_cgn_update_tstamp(phba, &cp->stat_peer);
5626 break;
5627 case ELS_DTAG_CONGESTION:
5628 le32_add_cpu(&cp->cgn_notification, 1);
5629 lpfc_cgn_update_tstamp(phba, &cp->stat_fpin);
5630 }
5631 if (phba->cgn_fpin_frequency &&
5632 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5633 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5634 cp->cgn_stat_npm = value;
5635 }
5636
5637 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5638 LPFC_CGN_CRC32_SEED);
5639 cp->cgn_info_crc = cpu_to_le32(value);
5640 }
5641
5642 /**
5643 * lpfc_cgn_update_tstamp - Update cmf timestamp
5644 * @phba: pointer to lpfc hba data structure.
5645 * @ts: structure to write the timestamp to.
5646 */
5647 void
lpfc_cgn_update_tstamp(struct lpfc_hba * phba,struct lpfc_cgn_ts * ts)5648 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts)
5649 {
5650 struct timespec64 cur_time;
5651 struct tm tm_val;
5652
5653 ktime_get_real_ts64(&cur_time);
5654 time64_to_tm(cur_time.tv_sec, 0, &tm_val);
5655
5656 ts->month = tm_val.tm_mon + 1;
5657 ts->day = tm_val.tm_mday;
5658 ts->year = tm_val.tm_year - 100;
5659 ts->hour = tm_val.tm_hour;
5660 ts->minute = tm_val.tm_min;
5661 ts->second = tm_val.tm_sec;
5662
5663 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5664 "2646 Updated CMF timestamp : "
5665 "%u/%u/%u %u:%u:%u\n",
5666 ts->day, ts->month,
5667 ts->year, ts->hour,
5668 ts->minute, ts->second);
5669 }
5670
5671 /**
5672 * lpfc_cmf_stats_timer - Save data into registered congestion buffer
5673 * @timer: Timer cookie to access lpfc private data
5674 *
5675 * Save the congestion event data every minute.
5676 * On the hour collapse all the minute data into hour data. Every day
5677 * collapse all the hour data into daily data. Separate driver
5678 * and fabrc congestion event counters that will be saved out
5679 * to the registered congestion buffer every minute.
5680 */
5681 static enum hrtimer_restart
lpfc_cmf_stats_timer(struct hrtimer * timer)5682 lpfc_cmf_stats_timer(struct hrtimer *timer)
5683 {
5684 struct lpfc_hba *phba;
5685 struct lpfc_cgn_info *cp;
5686 uint32_t i, index;
5687 uint16_t value, mvalue;
5688 uint64_t bps;
5689 uint32_t mbps;
5690 uint32_t dvalue, wvalue, lvalue, avalue;
5691 uint64_t latsum;
5692 __le16 *ptr;
5693 __le32 *lptr;
5694 __le16 *mptr;
5695
5696 phba = container_of(timer, struct lpfc_hba, cmf_stats_timer);
5697 /* Make sure we have a congestion info buffer */
5698 if (!phba->cgn_i)
5699 return HRTIMER_NORESTART;
5700 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5701
5702 phba->cgn_evt_timestamp = jiffies +
5703 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5704 phba->cgn_evt_minute++;
5705
5706 /* We should get to this point in the routine on 1 minute intervals */
5707 lpfc_cgn_update_tstamp(phba, &cp->base_time);
5708
5709 if (phba->cgn_fpin_frequency &&
5710 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5711 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5712 cp->cgn_stat_npm = value;
5713 }
5714
5715 /* Read and clear the latency counters for this minute */
5716 lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5717 latsum = atomic64_read(&phba->cgn_latency_evt);
5718 atomic_set(&phba->cgn_latency_evt_cnt, 0);
5719 atomic64_set(&phba->cgn_latency_evt, 0);
5720
5721 /* We need to store MB/sec bandwidth in the congestion information.
5722 * block_cnt is count of 512 byte blocks for the entire minute,
5723 * bps will get bytes per sec before finally converting to MB/sec.
5724 */
5725 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5726 phba->rx_block_cnt = 0;
5727 mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5728
5729 /* Every minute */
5730 /* cgn parameters */
5731 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5732 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5733 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5734 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5735
5736 /* Fill in default LUN qdepth */
5737 value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5738 cp->cgn_lunq = cpu_to_le16(value);
5739
5740 /* Record congestion buffer info - every minute
5741 * cgn_driver_evt_cnt (Driver events)
5742 * cgn_fabric_warn_cnt (Congestion Warnings)
5743 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5744 * cgn_fabric_alarm_cnt (Congestion Alarms)
5745 */
5746 index = ++cp->cgn_index_minute;
5747 if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5748 cp->cgn_index_minute = 0;
5749 index = 0;
5750 }
5751
5752 /* Get the number of driver events in this sample and reset counter */
5753 dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5754 atomic_set(&phba->cgn_driver_evt_cnt, 0);
5755
5756 /* Get the number of warning events - FPIN and Signal for this minute */
5757 wvalue = 0;
5758 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5759 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5760 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5761 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5762 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5763
5764 /* Get the number of alarm events - FPIN and Signal for this minute */
5765 avalue = 0;
5766 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5767 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5768 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5769 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5770
5771 /* Collect the driver, warning, alarm and latency counts for this
5772 * minute into the driver congestion buffer.
5773 */
5774 ptr = &cp->cgn_drvr_min[index];
5775 value = (uint16_t)dvalue;
5776 *ptr = cpu_to_le16(value);
5777
5778 ptr = &cp->cgn_warn_min[index];
5779 value = (uint16_t)wvalue;
5780 *ptr = cpu_to_le16(value);
5781
5782 ptr = &cp->cgn_alarm_min[index];
5783 value = (uint16_t)avalue;
5784 *ptr = cpu_to_le16(value);
5785
5786 lptr = &cp->cgn_latency_min[index];
5787 if (lvalue) {
5788 lvalue = (uint32_t)div_u64(latsum, lvalue);
5789 *lptr = cpu_to_le32(lvalue);
5790 } else {
5791 *lptr = 0;
5792 }
5793
5794 /* Collect the bandwidth value into the driver's congesion buffer. */
5795 mptr = &cp->cgn_bw_min[index];
5796 *mptr = cpu_to_le16(mvalue);
5797
5798 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5799 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5800 index, dvalue, wvalue, *lptr, mvalue, avalue);
5801
5802 /* Every hour */
5803 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5804 /* Record congestion buffer info - every hour
5805 * Collapse all minutes into an hour
5806 */
5807 index = ++cp->cgn_index_hour;
5808 if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5809 cp->cgn_index_hour = 0;
5810 index = 0;
5811 }
5812
5813 dvalue = 0;
5814 wvalue = 0;
5815 lvalue = 0;
5816 avalue = 0;
5817 mvalue = 0;
5818 mbps = 0;
5819 for (i = 0; i < LPFC_MIN_HOUR; i++) {
5820 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5821 wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5822 lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5823 mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5824 avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5825 }
5826 if (lvalue) /* Avg of latency averages */
5827 lvalue /= LPFC_MIN_HOUR;
5828 if (mbps) /* Avg of Bandwidth averages */
5829 mvalue = mbps / LPFC_MIN_HOUR;
5830
5831 lptr = &cp->cgn_drvr_hr[index];
5832 *lptr = cpu_to_le32(dvalue);
5833 lptr = &cp->cgn_warn_hr[index];
5834 *lptr = cpu_to_le32(wvalue);
5835 lptr = &cp->cgn_latency_hr[index];
5836 *lptr = cpu_to_le32(lvalue);
5837 mptr = &cp->cgn_bw_hr[index];
5838 *mptr = cpu_to_le16(mvalue);
5839 lptr = &cp->cgn_alarm_hr[index];
5840 *lptr = cpu_to_le32(avalue);
5841
5842 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5843 "2419 Congestion Info - hour "
5844 "(%d): %d %d %d %d %d\n",
5845 index, dvalue, wvalue, lvalue, mvalue, avalue);
5846 }
5847
5848 /* Every day */
5849 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5850 /* Record congestion buffer info - every hour
5851 * Collapse all hours into a day. Rotate days
5852 * after LPFC_MAX_CGN_DAYS.
5853 */
5854 index = ++cp->cgn_index_day;
5855 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5856 cp->cgn_index_day = 0;
5857 index = 0;
5858 }
5859
5860 dvalue = 0;
5861 wvalue = 0;
5862 lvalue = 0;
5863 mvalue = 0;
5864 mbps = 0;
5865 avalue = 0;
5866 for (i = 0; i < LPFC_HOUR_DAY; i++) {
5867 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5868 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5869 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5870 mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5871 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5872 }
5873 if (lvalue) /* Avg of latency averages */
5874 lvalue /= LPFC_HOUR_DAY;
5875 if (mbps) /* Avg of Bandwidth averages */
5876 mvalue = mbps / LPFC_HOUR_DAY;
5877
5878 lptr = &cp->cgn_drvr_day[index];
5879 *lptr = cpu_to_le32(dvalue);
5880 lptr = &cp->cgn_warn_day[index];
5881 *lptr = cpu_to_le32(wvalue);
5882 lptr = &cp->cgn_latency_day[index];
5883 *lptr = cpu_to_le32(lvalue);
5884 mptr = &cp->cgn_bw_day[index];
5885 *mptr = cpu_to_le16(mvalue);
5886 lptr = &cp->cgn_alarm_day[index];
5887 *lptr = cpu_to_le32(avalue);
5888
5889 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5890 "2420 Congestion Info - daily (%d): "
5891 "%d %d %d %d %d\n",
5892 index, dvalue, wvalue, lvalue, mvalue, avalue);
5893 }
5894
5895 /* Use the frequency found in the last rcv'ed FPIN */
5896 value = phba->cgn_fpin_frequency;
5897 cp->cgn_warn_freq = cpu_to_le16(value);
5898 cp->cgn_alarm_freq = cpu_to_le16(value);
5899
5900 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5901 LPFC_CGN_CRC32_SEED);
5902 cp->cgn_info_crc = cpu_to_le32(lvalue);
5903
5904 hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC));
5905
5906 return HRTIMER_RESTART;
5907 }
5908
5909 /**
5910 * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5911 * @phba: The Hba for which this call is being executed.
5912 *
5913 * The routine calculates the latency from the beginning of the CMF timer
5914 * interval to the current point in time. It is called from IO completion
5915 * when we exceed our Bandwidth limitation for the time interval.
5916 */
5917 uint32_t
lpfc_calc_cmf_latency(struct lpfc_hba * phba)5918 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5919 {
5920 struct timespec64 cmpl_time;
5921 uint32_t msec = 0;
5922
5923 ktime_get_real_ts64(&cmpl_time);
5924
5925 /* This routine works on a ms granularity so sec and usec are
5926 * converted accordingly.
5927 */
5928 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5929 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5930 NSEC_PER_MSEC;
5931 } else {
5932 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5933 msec = (cmpl_time.tv_sec -
5934 phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5935 msec += ((cmpl_time.tv_nsec -
5936 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5937 } else {
5938 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5939 1) * MSEC_PER_SEC;
5940 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5941 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5942 }
5943 }
5944 return msec;
5945 }
5946
5947 /**
5948 * lpfc_cmf_timer - This is the timer function for one congestion
5949 * rate interval.
5950 * @timer: Pointer to the high resolution timer that expired
5951 */
5952 static enum hrtimer_restart
lpfc_cmf_timer(struct hrtimer * timer)5953 lpfc_cmf_timer(struct hrtimer *timer)
5954 {
5955 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5956 cmf_timer);
5957 struct rx_info_entry entry;
5958 uint32_t io_cnt;
5959 uint32_t busy, max_read;
5960 uint64_t total, rcv, lat, mbpi, extra, cnt;
5961 int timer_interval = LPFC_CMF_INTERVAL;
5962 uint32_t ms;
5963 struct lpfc_cgn_stat *cgs;
5964 int cpu;
5965
5966 /* Only restart the timer if congestion mgmt is on */
5967 if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5968 !phba->cmf_latency.tv_sec) {
5969 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5970 "6224 CMF timer exit: %d %lld\n",
5971 phba->cmf_active_mode,
5972 (uint64_t)phba->cmf_latency.tv_sec);
5973 return HRTIMER_NORESTART;
5974 }
5975
5976 /* If pport is not ready yet, just exit and wait for
5977 * the next timer cycle to hit.
5978 */
5979 if (!phba->pport)
5980 goto skip;
5981
5982 /* Do not block SCSI IO while in the timer routine since
5983 * total_bytes will be cleared
5984 */
5985 atomic_set(&phba->cmf_stop_io, 1);
5986
5987 /* First we need to calculate the actual ms between
5988 * the last timer interrupt and this one. We ask for
5989 * LPFC_CMF_INTERVAL, however the actual time may
5990 * vary depending on system overhead.
5991 */
5992 ms = lpfc_calc_cmf_latency(phba);
5993
5994
5995 /* Immediately after we calculate the time since the last
5996 * timer interrupt, set the start time for the next
5997 * interrupt
5998 */
5999 ktime_get_real_ts64(&phba->cmf_latency);
6000
6001 phba->cmf_link_byte_count =
6002 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
6003
6004 /* Collect all the stats from the prior timer interval */
6005 total = 0;
6006 io_cnt = 0;
6007 lat = 0;
6008 rcv = 0;
6009 for_each_present_cpu(cpu) {
6010 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6011 total += atomic64_xchg(&cgs->total_bytes, 0);
6012 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6013 lat += atomic64_xchg(&cgs->rx_latency, 0);
6014 rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6015 }
6016
6017 /* Before we issue another CMF_SYNC_WQE, retrieve the BW
6018 * returned from the last CMF_SYNC_WQE issued, from
6019 * cmf_last_sync_bw. This will be the target BW for
6020 * this next timer interval.
6021 */
6022 if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6023 phba->link_state != LPFC_LINK_DOWN &&
6024 test_bit(HBA_SETUP, &phba->hba_flag)) {
6025 mbpi = phba->cmf_last_sync_bw;
6026 phba->cmf_last_sync_bw = 0;
6027 extra = 0;
6028
6029 /* Calculate any extra bytes needed to account for the
6030 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6031 * calculate the adjustment needed for total to reflect
6032 * a full LPFC_CMF_INTERVAL.
6033 */
6034 if (ms && ms < LPFC_CMF_INTERVAL) {
6035 cnt = div_u64(total, ms); /* bytes per ms */
6036 cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6037 extra = cnt - total;
6038 }
6039 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6040 } else {
6041 /* For Monitor mode or link down we want mbpi
6042 * to be the full link speed
6043 */
6044 mbpi = phba->cmf_link_byte_count;
6045 extra = 0;
6046 }
6047 phba->cmf_timer_cnt++;
6048
6049 if (io_cnt) {
6050 /* Update congestion info buffer latency in us */
6051 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6052 atomic64_add(lat, &phba->cgn_latency_evt);
6053 }
6054 busy = atomic_xchg(&phba->cmf_busy, 0);
6055 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6056
6057 /* Calculate MBPI for the next timer interval */
6058 if (mbpi) {
6059 if (mbpi > phba->cmf_link_byte_count ||
6060 phba->cmf_active_mode == LPFC_CFG_MONITOR)
6061 mbpi = phba->cmf_link_byte_count;
6062
6063 /* Change max_bytes_per_interval to what the prior
6064 * CMF_SYNC_WQE cmpl indicated.
6065 */
6066 if (mbpi != phba->cmf_max_bytes_per_interval)
6067 phba->cmf_max_bytes_per_interval = mbpi;
6068 }
6069
6070 /* Save rxmonitor information for debug */
6071 if (phba->rx_monitor) {
6072 entry.total_bytes = total;
6073 entry.cmf_bytes = total + extra;
6074 entry.rcv_bytes = rcv;
6075 entry.cmf_busy = busy;
6076 entry.cmf_info = phba->cmf_active_info;
6077 if (io_cnt) {
6078 entry.avg_io_latency = div_u64(lat, io_cnt);
6079 entry.avg_io_size = div_u64(rcv, io_cnt);
6080 } else {
6081 entry.avg_io_latency = 0;
6082 entry.avg_io_size = 0;
6083 }
6084 entry.max_read_cnt = max_read;
6085 entry.io_cnt = io_cnt;
6086 entry.max_bytes_per_interval = mbpi;
6087 if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6088 entry.timer_utilization = phba->cmf_last_ts;
6089 else
6090 entry.timer_utilization = ms;
6091 entry.timer_interval = ms;
6092 phba->cmf_last_ts = 0;
6093
6094 lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6095 }
6096
6097 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6098 /* If Monitor mode, check if we are oversubscribed
6099 * against the full line rate.
6100 */
6101 if (mbpi && total > mbpi)
6102 atomic_inc(&phba->cgn_driver_evt_cnt);
6103 }
6104 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */
6105
6106 /* Since total_bytes has already been zero'ed, its okay to unblock
6107 * after max_bytes_per_interval is setup.
6108 */
6109 if (atomic_xchg(&phba->cmf_bw_wait, 0))
6110 queue_work(phba->wq, &phba->unblock_request_work);
6111
6112 /* SCSI IO is now unblocked */
6113 atomic_set(&phba->cmf_stop_io, 0);
6114
6115 skip:
6116 hrtimer_forward_now(timer,
6117 ktime_set(0, timer_interval * NSEC_PER_MSEC));
6118 return HRTIMER_RESTART;
6119 }
6120
6121 #define trunk_link_status(__idx)\
6122 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6123 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6124 "Link up" : "Link down") : "NA"
6125 /* Did port __idx reported an error */
6126 #define trunk_port_fault(__idx)\
6127 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6128 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6129
6130 static void
lpfc_update_trunk_link_status(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6131 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6132 struct lpfc_acqe_fc_la *acqe_fc)
6133 {
6134 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6135 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6136 u8 cnt = 0;
6137
6138 phba->sli4_hba.link_state.speed =
6139 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6140 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6141
6142 phba->sli4_hba.link_state.logical_speed =
6143 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6144 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6145 phba->fc_linkspeed =
6146 lpfc_async_link_speed_to_read_top(
6147 phba,
6148 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6149
6150 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6151 phba->trunk_link.link0.state =
6152 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6153 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6154 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6155 cnt++;
6156 }
6157 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6158 phba->trunk_link.link1.state =
6159 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6160 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6161 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6162 cnt++;
6163 }
6164 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6165 phba->trunk_link.link2.state =
6166 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6167 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6168 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6169 cnt++;
6170 }
6171 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6172 phba->trunk_link.link3.state =
6173 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6174 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6175 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6176 cnt++;
6177 }
6178
6179 if (cnt)
6180 phba->trunk_link.phy_lnk_speed =
6181 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6182 else
6183 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6184
6185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6186 "2910 Async FC Trunking Event - Speed:%d\n"
6187 "\tLogical speed:%d "
6188 "port0: %s port1: %s port2: %s port3: %s\n",
6189 phba->sli4_hba.link_state.speed,
6190 phba->sli4_hba.link_state.logical_speed,
6191 trunk_link_status(0), trunk_link_status(1),
6192 trunk_link_status(2), trunk_link_status(3));
6193
6194 if (phba->cmf_active_mode != LPFC_CFG_OFF)
6195 lpfc_cmf_signal_init(phba);
6196
6197 if (port_fault)
6198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6199 "3202 trunk error:0x%x (%s) seen on port0:%s "
6200 /*
6201 * SLI-4: We have only 0xA error codes
6202 * defined as of now. print an appropriate
6203 * message in case driver needs to be updated.
6204 */
6205 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6206 "UNDEFINED. update driver." : trunk_errmsg[err],
6207 trunk_port_fault(0), trunk_port_fault(1),
6208 trunk_port_fault(2), trunk_port_fault(3));
6209 }
6210
6211
6212 /**
6213 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6214 * @phba: pointer to lpfc hba data structure.
6215 * @acqe_fc: pointer to the async fc completion queue entry.
6216 *
6217 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6218 * that the event was received and then issue a read_topology mailbox command so
6219 * that the rest of the driver will treat it the same as SLI3.
6220 **/
6221 static void
lpfc_sli4_async_fc_evt(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6222 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6223 {
6224 LPFC_MBOXQ_t *pmb;
6225 MAILBOX_t *mb;
6226 struct lpfc_mbx_read_top *la;
6227 char *log_level;
6228 int rc;
6229
6230 if (bf_get(lpfc_trailer_type, acqe_fc) !=
6231 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6232 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6233 "2895 Non FC link Event detected.(%d)\n",
6234 bf_get(lpfc_trailer_type, acqe_fc));
6235 return;
6236 }
6237
6238 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6239 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6240 lpfc_update_trunk_link_status(phba, acqe_fc);
6241 return;
6242 }
6243
6244 /* Keep the link status for extra SLI4 state machine reference */
6245 phba->sli4_hba.link_state.speed =
6246 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6247 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6248 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6249 phba->sli4_hba.link_state.topology =
6250 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6251 phba->sli4_hba.link_state.status =
6252 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6253 phba->sli4_hba.link_state.type =
6254 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6255 phba->sli4_hba.link_state.number =
6256 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6257 phba->sli4_hba.link_state.fault =
6258 bf_get(lpfc_acqe_link_fault, acqe_fc);
6259 phba->sli4_hba.link_state.link_status =
6260 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc);
6261
6262 /*
6263 * Only select attention types need logical speed modification to what
6264 * was previously set.
6265 */
6266 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6267 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6268 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6269 LPFC_FC_LA_TYPE_LINK_DOWN)
6270 phba->sli4_hba.link_state.logical_speed = 0;
6271 else if (!phba->sli4_hba.conf_trunk)
6272 phba->sli4_hba.link_state.logical_speed =
6273 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6274 }
6275
6276 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6277 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
6278 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6279 "%dMbps Fault:x%x Link Status:x%x\n",
6280 phba->sli4_hba.link_state.speed,
6281 phba->sli4_hba.link_state.topology,
6282 phba->sli4_hba.link_state.status,
6283 phba->sli4_hba.link_state.type,
6284 phba->sli4_hba.link_state.number,
6285 phba->sli4_hba.link_state.logical_speed,
6286 phba->sli4_hba.link_state.fault,
6287 phba->sli4_hba.link_state.link_status);
6288
6289 /*
6290 * The following attention types are informational only, providing
6291 * further details about link status. Overwrite the value of
6292 * link_state.status appropriately. No further action is required.
6293 */
6294 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6295 switch (phba->sli4_hba.link_state.status) {
6296 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
6297 log_level = KERN_WARNING;
6298 phba->sli4_hba.link_state.status =
6299 LPFC_FC_LA_TYPE_LINK_DOWN;
6300 break;
6301 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
6302 /*
6303 * During bb credit recovery establishment, receiving
6304 * this attention type is normal. Link Up attention
6305 * type is expected to occur before this informational
6306 * attention type so keep the Link Up status.
6307 */
6308 log_level = KERN_INFO;
6309 phba->sli4_hba.link_state.status =
6310 LPFC_FC_LA_TYPE_LINK_UP;
6311 break;
6312 default:
6313 log_level = KERN_INFO;
6314 break;
6315 }
6316 lpfc_log_msg(phba, log_level, LOG_SLI,
6317 "2992 Async FC event - Informational Link "
6318 "Attention Type x%x\n",
6319 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc));
6320 return;
6321 }
6322
6323 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6324 if (!pmb) {
6325 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6326 "2897 The mboxq allocation failed\n");
6327 return;
6328 }
6329 rc = lpfc_mbox_rsrc_prep(phba, pmb);
6330 if (rc) {
6331 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6332 "2898 The mboxq prep failed\n");
6333 goto out_free_pmb;
6334 }
6335
6336 /* Cleanup any outstanding ELS commands */
6337 lpfc_els_flush_all_cmd(phba);
6338
6339 /* Block ELS IOCBs until we have done process link event */
6340 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6341
6342 /* Update link event statistics */
6343 phba->sli.slistat.link_event++;
6344
6345 /* Create lpfc_handle_latt mailbox command from link ACQE */
6346 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
6347 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6348 pmb->vport = phba->pport;
6349
6350 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6351 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6352
6353 switch (phba->sli4_hba.link_state.status) {
6354 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6355 phba->link_flag |= LS_MDS_LINK_DOWN;
6356 break;
6357 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6358 phba->link_flag |= LS_MDS_LOOPBACK;
6359 break;
6360 default:
6361 break;
6362 }
6363
6364 /* Initialize completion status */
6365 mb = &pmb->u.mb;
6366 mb->mbxStatus = MBX_SUCCESS;
6367
6368 /* Parse port fault information field */
6369 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6370
6371 /* Parse and translate link attention fields */
6372 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6373 la->eventTag = acqe_fc->event_tag;
6374
6375 if (phba->sli4_hba.link_state.status ==
6376 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6377 bf_set(lpfc_mbx_read_top_att_type, la,
6378 LPFC_FC_LA_TYPE_UNEXP_WWPN);
6379 } else {
6380 bf_set(lpfc_mbx_read_top_att_type, la,
6381 LPFC_FC_LA_TYPE_LINK_DOWN);
6382 }
6383 /* Invoke the mailbox command callback function */
6384 lpfc_mbx_cmpl_read_topology(phba, pmb);
6385
6386 return;
6387 }
6388
6389 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6390 if (rc == MBX_NOT_FINISHED)
6391 goto out_free_pmb;
6392 return;
6393
6394 out_free_pmb:
6395 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6396 }
6397
6398 /**
6399 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6400 * @phba: pointer to lpfc hba data structure.
6401 * @acqe_sli: pointer to the async SLI completion queue entry.
6402 *
6403 * This routine is to handle the SLI4 asynchronous SLI events.
6404 **/
6405 static void
lpfc_sli4_async_sli_evt(struct lpfc_hba * phba,struct lpfc_acqe_sli * acqe_sli)6406 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6407 {
6408 char port_name;
6409 char message[128];
6410 uint8_t status;
6411 uint8_t evt_type;
6412 uint8_t operational = 0;
6413 struct temp_event temp_event_data;
6414 struct lpfc_acqe_misconfigured_event *misconfigured;
6415 struct lpfc_acqe_cgn_signal *cgn_signal;
6416 struct Scsi_Host *shost;
6417 struct lpfc_vport **vports;
6418 int rc, i, cnt;
6419
6420 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6421
6422 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6423 "2901 Async SLI event - Type:%d, Event Data: x%08x "
6424 "x%08x x%08x x%08x\n", evt_type,
6425 acqe_sli->event_data1, acqe_sli->event_data2,
6426 acqe_sli->event_data3, acqe_sli->trailer);
6427
6428 port_name = phba->Port[0];
6429 if (port_name == 0x00)
6430 port_name = '?'; /* get port name is empty */
6431
6432 switch (evt_type) {
6433 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6434 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6435 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6436 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6437
6438 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6439 "3190 Over Temperature:%d Celsius- Port Name %c\n",
6440 acqe_sli->event_data1, port_name);
6441
6442 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6443 shost = lpfc_shost_from_vport(phba->pport);
6444 fc_host_post_vendor_event(shost, fc_get_event_number(),
6445 sizeof(temp_event_data),
6446 (char *)&temp_event_data,
6447 SCSI_NL_VID_TYPE_PCI
6448 | PCI_VENDOR_ID_EMULEX);
6449 break;
6450 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6451 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6452 temp_event_data.event_code = LPFC_NORMAL_TEMP;
6453 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6454
6455 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6456 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
6457 acqe_sli->event_data1, port_name);
6458
6459 shost = lpfc_shost_from_vport(phba->pport);
6460 fc_host_post_vendor_event(shost, fc_get_event_number(),
6461 sizeof(temp_event_data),
6462 (char *)&temp_event_data,
6463 SCSI_NL_VID_TYPE_PCI
6464 | PCI_VENDOR_ID_EMULEX);
6465 break;
6466 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6467 misconfigured = (struct lpfc_acqe_misconfigured_event *)
6468 &acqe_sli->event_data1;
6469
6470 /* fetch the status for this port */
6471 switch (phba->sli4_hba.lnk_info.lnk_no) {
6472 case LPFC_LINK_NUMBER_0:
6473 status = bf_get(lpfc_sli_misconfigured_port0_state,
6474 &misconfigured->theEvent);
6475 operational = bf_get(lpfc_sli_misconfigured_port0_op,
6476 &misconfigured->theEvent);
6477 break;
6478 case LPFC_LINK_NUMBER_1:
6479 status = bf_get(lpfc_sli_misconfigured_port1_state,
6480 &misconfigured->theEvent);
6481 operational = bf_get(lpfc_sli_misconfigured_port1_op,
6482 &misconfigured->theEvent);
6483 break;
6484 case LPFC_LINK_NUMBER_2:
6485 status = bf_get(lpfc_sli_misconfigured_port2_state,
6486 &misconfigured->theEvent);
6487 operational = bf_get(lpfc_sli_misconfigured_port2_op,
6488 &misconfigured->theEvent);
6489 break;
6490 case LPFC_LINK_NUMBER_3:
6491 status = bf_get(lpfc_sli_misconfigured_port3_state,
6492 &misconfigured->theEvent);
6493 operational = bf_get(lpfc_sli_misconfigured_port3_op,
6494 &misconfigured->theEvent);
6495 break;
6496 default:
6497 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6498 "3296 "
6499 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6500 "event: Invalid link %d",
6501 phba->sli4_hba.lnk_info.lnk_no);
6502 return;
6503 }
6504
6505 /* Skip if optic state unchanged */
6506 if (phba->sli4_hba.lnk_info.optic_state == status)
6507 return;
6508
6509 switch (status) {
6510 case LPFC_SLI_EVENT_STATUS_VALID:
6511 sprintf(message, "Physical Link is functional");
6512 break;
6513 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6514 sprintf(message, "Optics faulted/incorrectly "
6515 "installed/not installed - Reseat optics, "
6516 "if issue not resolved, replace.");
6517 break;
6518 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6519 sprintf(message,
6520 "Optics of two types installed - Remove one "
6521 "optic or install matching pair of optics.");
6522 break;
6523 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6524 sprintf(message, "Incompatible optics - Replace with "
6525 "compatible optics for card to function.");
6526 break;
6527 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6528 sprintf(message, "Unqualified optics - Replace with "
6529 "Avago optics for Warranty and Technical "
6530 "Support - Link is%s operational",
6531 (operational) ? " not" : "");
6532 break;
6533 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6534 sprintf(message, "Uncertified optics - Replace with "
6535 "Avago-certified optics to enable link "
6536 "operation - Link is%s operational",
6537 (operational) ? " not" : "");
6538 break;
6539 default:
6540 /* firmware is reporting a status we don't know about */
6541 sprintf(message, "Unknown event status x%02x", status);
6542 break;
6543 }
6544
6545 /* Issue READ_CONFIG mbox command to refresh supported speeds */
6546 rc = lpfc_sli4_read_config(phba);
6547 if (rc) {
6548 phba->lmt = 0;
6549 lpfc_printf_log(phba, KERN_ERR,
6550 LOG_TRACE_EVENT,
6551 "3194 Unable to retrieve supported "
6552 "speeds, rc = 0x%x\n", rc);
6553 }
6554 rc = lpfc_sli4_refresh_params(phba);
6555 if (rc) {
6556 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6557 "3174 Unable to update pls support, "
6558 "rc x%x\n", rc);
6559 }
6560 vports = lpfc_create_vport_work_array(phba);
6561 if (vports != NULL) {
6562 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6563 i++) {
6564 shost = lpfc_shost_from_vport(vports[i]);
6565 lpfc_host_supported_speeds_set(shost);
6566 }
6567 }
6568 lpfc_destroy_vport_work_array(phba, vports);
6569
6570 phba->sli4_hba.lnk_info.optic_state = status;
6571 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6572 "3176 Port Name %c %s\n", port_name, message);
6573 break;
6574 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6575 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6576 "3192 Remote DPort Test Initiated - "
6577 "Event Data1:x%08x Event Data2: x%08x\n",
6578 acqe_sli->event_data1, acqe_sli->event_data2);
6579 break;
6580 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6581 /* Call FW to obtain active parms */
6582 lpfc_sli4_cgn_parm_chg_evt(phba);
6583 break;
6584 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6585 /* Misconfigured WWN. Reports that the SLI Port is configured
6586 * to use FA-WWN, but the attached device doesn’t support it.
6587 * Event Data1 - N.A, Event Data2 - N.A
6588 * This event only happens on the physical port.
6589 */
6590 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6591 "2699 Misconfigured FA-PWWN - Attached device "
6592 "does not support FA-PWWN\n");
6593 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6594 memset(phba->pport->fc_portname.u.wwn, 0,
6595 sizeof(struct lpfc_name));
6596 break;
6597 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6598 /* EEPROM failure. No driver action is required */
6599 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6600 "2518 EEPROM failure - "
6601 "Event Data1: x%08x Event Data2: x%08x\n",
6602 acqe_sli->event_data1, acqe_sli->event_data2);
6603 break;
6604 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6605 if (phba->cmf_active_mode == LPFC_CFG_OFF)
6606 break;
6607 cgn_signal = (struct lpfc_acqe_cgn_signal *)
6608 &acqe_sli->event_data1;
6609 phba->cgn_acqe_cnt++;
6610
6611 cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6612 atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6613 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6614
6615 /* no threshold for CMF, even 1 signal will trigger an event */
6616
6617 /* Alarm overrides warning, so check that first */
6618 if (cgn_signal->alarm_cnt) {
6619 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6620 /* Keep track of alarm cnt for CMF_SYNC_WQE */
6621 atomic_add(cgn_signal->alarm_cnt,
6622 &phba->cgn_sync_alarm_cnt);
6623 }
6624 } else if (cnt) {
6625 /* signal action needs to be taken */
6626 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6627 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6628 /* Keep track of warning cnt for CMF_SYNC_WQE */
6629 atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6630 }
6631 }
6632 break;
6633 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6634 /* May be accompanied by a temperature event */
6635 lpfc_printf_log(phba, KERN_INFO,
6636 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6637 "2902 Remote Degrade Signaling: x%08x x%08x "
6638 "x%08x\n",
6639 acqe_sli->event_data1, acqe_sli->event_data2,
6640 acqe_sli->event_data3);
6641 break;
6642 case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS:
6643 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
6644 "2905 Reset CM statistics\n");
6645 lpfc_sli4_async_cmstat_evt(phba);
6646 break;
6647 default:
6648 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6649 "3193 Unrecognized SLI event, type: 0x%x",
6650 evt_type);
6651 break;
6652 }
6653 }
6654
6655 /**
6656 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6657 * @vport: pointer to vport data structure.
6658 *
6659 * This routine is to perform Clear Virtual Link (CVL) on a vport in
6660 * response to a CVL event.
6661 *
6662 * Return the pointer to the ndlp with the vport if successful, otherwise
6663 * return NULL.
6664 **/
6665 static struct lpfc_nodelist *
lpfc_sli4_perform_vport_cvl(struct lpfc_vport * vport)6666 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6667 {
6668 struct lpfc_nodelist *ndlp;
6669 struct Scsi_Host *shost;
6670 struct lpfc_hba *phba;
6671
6672 if (!vport)
6673 return NULL;
6674 phba = vport->phba;
6675 if (!phba)
6676 return NULL;
6677 ndlp = lpfc_findnode_did(vport, Fabric_DID);
6678 if (!ndlp) {
6679 /* Cannot find existing Fabric ndlp, so allocate a new one */
6680 ndlp = lpfc_nlp_init(vport, Fabric_DID);
6681 if (!ndlp)
6682 return NULL;
6683 /* Set the node type */
6684 ndlp->nlp_type |= NLP_FABRIC;
6685 /* Put ndlp onto node list */
6686 lpfc_enqueue_node(vport, ndlp);
6687 }
6688 if ((phba->pport->port_state < LPFC_FLOGI) &&
6689 (phba->pport->port_state != LPFC_VPORT_FAILED))
6690 return NULL;
6691 /* If virtual link is not yet instantiated ignore CVL */
6692 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6693 && (vport->port_state != LPFC_VPORT_FAILED))
6694 return NULL;
6695 shost = lpfc_shost_from_vport(vport);
6696 if (!shost)
6697 return NULL;
6698 lpfc_linkdown_port(vport);
6699 lpfc_cleanup_pending_mbox(vport);
6700 set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag);
6701
6702 return ndlp;
6703 }
6704
6705 /**
6706 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6707 * @phba: pointer to lpfc hba data structure.
6708 *
6709 * This routine is to perform Clear Virtual Link (CVL) on all vports in
6710 * response to a FCF dead event.
6711 **/
6712 static void
lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba * phba)6713 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6714 {
6715 struct lpfc_vport **vports;
6716 int i;
6717
6718 vports = lpfc_create_vport_work_array(phba);
6719 if (vports)
6720 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6721 lpfc_sli4_perform_vport_cvl(vports[i]);
6722 lpfc_destroy_vport_work_array(phba, vports);
6723 }
6724
6725 /**
6726 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6727 * @phba: pointer to lpfc hba data structure.
6728 * @acqe_fip: pointer to the async fcoe completion queue entry.
6729 *
6730 * This routine is to handle the SLI4 asynchronous fcoe event.
6731 **/
6732 static void
lpfc_sli4_async_fip_evt(struct lpfc_hba * phba,struct lpfc_acqe_fip * acqe_fip)6733 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6734 struct lpfc_acqe_fip *acqe_fip)
6735 {
6736 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6737 int rc;
6738 struct lpfc_vport *vport;
6739 struct lpfc_nodelist *ndlp;
6740 int active_vlink_present;
6741 struct lpfc_vport **vports;
6742 int i;
6743
6744 phba->fc_eventTag = acqe_fip->event_tag;
6745 phba->fcoe_eventtag = acqe_fip->event_tag;
6746 switch (event_type) {
6747 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6748 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6749 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6750 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6751 "2546 New FCF event, evt_tag:x%x, "
6752 "index:x%x\n",
6753 acqe_fip->event_tag,
6754 acqe_fip->index);
6755 else
6756 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6757 LOG_DISCOVERY,
6758 "2788 FCF param modified event, "
6759 "evt_tag:x%x, index:x%x\n",
6760 acqe_fip->event_tag,
6761 acqe_fip->index);
6762 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6763 /*
6764 * During period of FCF discovery, read the FCF
6765 * table record indexed by the event to update
6766 * FCF roundrobin failover eligible FCF bmask.
6767 */
6768 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6769 LOG_DISCOVERY,
6770 "2779 Read FCF (x%x) for updating "
6771 "roundrobin FCF failover bmask\n",
6772 acqe_fip->index);
6773 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6774 }
6775
6776 /* If the FCF discovery is in progress, do nothing. */
6777 if (test_bit(FCF_TS_INPROG, &phba->hba_flag))
6778 break;
6779 spin_lock_irq(&phba->hbalock);
6780 /* If fast FCF failover rescan event is pending, do nothing */
6781 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6782 spin_unlock_irq(&phba->hbalock);
6783 break;
6784 }
6785
6786 /* If the FCF has been in discovered state, do nothing. */
6787 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6788 spin_unlock_irq(&phba->hbalock);
6789 break;
6790 }
6791 spin_unlock_irq(&phba->hbalock);
6792
6793 /* Otherwise, scan the entire FCF table and re-discover SAN */
6794 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6795 "2770 Start FCF table scan per async FCF "
6796 "event, evt_tag:x%x, index:x%x\n",
6797 acqe_fip->event_tag, acqe_fip->index);
6798 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6799 LPFC_FCOE_FCF_GET_FIRST);
6800 if (rc)
6801 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6802 "2547 Issue FCF scan read FCF mailbox "
6803 "command failed (x%x)\n", rc);
6804 break;
6805
6806 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6807 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6808 "2548 FCF Table full count 0x%x tag 0x%x\n",
6809 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6810 acqe_fip->event_tag);
6811 break;
6812
6813 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6814 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6815 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6816 "2549 FCF (x%x) disconnected from network, "
6817 "tag:x%x\n", acqe_fip->index,
6818 acqe_fip->event_tag);
6819 /*
6820 * If we are in the middle of FCF failover process, clear
6821 * the corresponding FCF bit in the roundrobin bitmap.
6822 */
6823 spin_lock_irq(&phba->hbalock);
6824 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6825 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6826 spin_unlock_irq(&phba->hbalock);
6827 /* Update FLOGI FCF failover eligible FCF bmask */
6828 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6829 break;
6830 }
6831 spin_unlock_irq(&phba->hbalock);
6832
6833 /* If the event is not for currently used fcf do nothing */
6834 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6835 break;
6836
6837 /*
6838 * Otherwise, request the port to rediscover the entire FCF
6839 * table for a fast recovery from case that the current FCF
6840 * is no longer valid as we are not in the middle of FCF
6841 * failover process already.
6842 */
6843 spin_lock_irq(&phba->hbalock);
6844 /* Mark the fast failover process in progress */
6845 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6846 spin_unlock_irq(&phba->hbalock);
6847
6848 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6849 "2771 Start FCF fast failover process due to "
6850 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6851 "\n", acqe_fip->event_tag, acqe_fip->index);
6852 rc = lpfc_sli4_redisc_fcf_table(phba);
6853 if (rc) {
6854 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6855 LOG_TRACE_EVENT,
6856 "2772 Issue FCF rediscover mailbox "
6857 "command failed, fail through to FCF "
6858 "dead event\n");
6859 spin_lock_irq(&phba->hbalock);
6860 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6861 spin_unlock_irq(&phba->hbalock);
6862 /*
6863 * Last resort will fail over by treating this
6864 * as a link down to FCF registration.
6865 */
6866 lpfc_sli4_fcf_dead_failthrough(phba);
6867 } else {
6868 /* Reset FCF roundrobin bmask for new discovery */
6869 lpfc_sli4_clear_fcf_rr_bmask(phba);
6870 /*
6871 * Handling fast FCF failover to a DEAD FCF event is
6872 * considered equalivant to receiving CVL to all vports.
6873 */
6874 lpfc_sli4_perform_all_vport_cvl(phba);
6875 }
6876 break;
6877 case LPFC_FIP_EVENT_TYPE_CVL:
6878 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6879 lpfc_printf_log(phba, KERN_ERR,
6880 LOG_TRACE_EVENT,
6881 "2718 Clear Virtual Link Received for VPI 0x%x"
6882 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6883
6884 vport = lpfc_find_vport_by_vpid(phba,
6885 acqe_fip->index);
6886 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6887 if (!ndlp)
6888 break;
6889 active_vlink_present = 0;
6890
6891 vports = lpfc_create_vport_work_array(phba);
6892 if (vports) {
6893 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6894 i++) {
6895 if (!test_bit(FC_VPORT_CVL_RCVD,
6896 &vports[i]->fc_flag) &&
6897 vports[i]->port_state > LPFC_FDISC) {
6898 active_vlink_present = 1;
6899 break;
6900 }
6901 }
6902 lpfc_destroy_vport_work_array(phba, vports);
6903 }
6904
6905 /*
6906 * Don't re-instantiate if vport is marked for deletion.
6907 * If we are here first then vport_delete is going to wait
6908 * for discovery to complete.
6909 */
6910 if (!test_bit(FC_UNLOADING, &vport->load_flag) &&
6911 active_vlink_present) {
6912 /*
6913 * If there are other active VLinks present,
6914 * re-instantiate the Vlink using FDISC.
6915 */
6916 mod_timer(&ndlp->nlp_delayfunc,
6917 jiffies + secs_to_jiffies(1));
6918 set_bit(NLP_DELAY_TMO, &ndlp->nlp_flag);
6919 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6920 vport->port_state = LPFC_FDISC;
6921 } else {
6922 /*
6923 * Otherwise, we request port to rediscover
6924 * the entire FCF table for a fast recovery
6925 * from possible case that the current FCF
6926 * is no longer valid if we are not already
6927 * in the FCF failover process.
6928 */
6929 spin_lock_irq(&phba->hbalock);
6930 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6931 spin_unlock_irq(&phba->hbalock);
6932 break;
6933 }
6934 /* Mark the fast failover process in progress */
6935 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6936 spin_unlock_irq(&phba->hbalock);
6937 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6938 LOG_DISCOVERY,
6939 "2773 Start FCF failover per CVL, "
6940 "evt_tag:x%x\n", acqe_fip->event_tag);
6941 rc = lpfc_sli4_redisc_fcf_table(phba);
6942 if (rc) {
6943 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6944 LOG_TRACE_EVENT,
6945 "2774 Issue FCF rediscover "
6946 "mailbox command failed, "
6947 "through to CVL event\n");
6948 spin_lock_irq(&phba->hbalock);
6949 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6950 spin_unlock_irq(&phba->hbalock);
6951 /*
6952 * Last resort will be re-try on the
6953 * the current registered FCF entry.
6954 */
6955 lpfc_retry_pport_discovery(phba);
6956 } else
6957 /*
6958 * Reset FCF roundrobin bmask for new
6959 * discovery.
6960 */
6961 lpfc_sli4_clear_fcf_rr_bmask(phba);
6962 }
6963 break;
6964 default:
6965 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6966 "0288 Unknown FCoE event type 0x%x event tag "
6967 "0x%x\n", event_type, acqe_fip->event_tag);
6968 break;
6969 }
6970 }
6971
6972 /**
6973 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6974 * @phba: pointer to lpfc hba data structure.
6975 * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6976 *
6977 * This routine is to handle the SLI4 asynchronous dcbx event.
6978 **/
6979 static void
lpfc_sli4_async_dcbx_evt(struct lpfc_hba * phba,struct lpfc_acqe_dcbx * acqe_dcbx)6980 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6981 struct lpfc_acqe_dcbx *acqe_dcbx)
6982 {
6983 phba->fc_eventTag = acqe_dcbx->event_tag;
6984 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6985 "0290 The SLI4 DCBX asynchronous event is not "
6986 "handled yet\n");
6987 }
6988
6989 /**
6990 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
6991 * @phba: pointer to lpfc hba data structure.
6992 * @acqe_grp5: pointer to the async grp5 completion queue entry.
6993 *
6994 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
6995 * is an asynchronous notified of a logical link speed change. The Port
6996 * reports the logical link speed in units of 10Mbps.
6997 **/
6998 static void
lpfc_sli4_async_grp5_evt(struct lpfc_hba * phba,struct lpfc_acqe_grp5 * acqe_grp5)6999 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
7000 struct lpfc_acqe_grp5 *acqe_grp5)
7001 {
7002 uint16_t prev_ll_spd;
7003
7004 phba->fc_eventTag = acqe_grp5->event_tag;
7005 phba->fcoe_eventtag = acqe_grp5->event_tag;
7006 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7007 phba->sli4_hba.link_state.logical_speed =
7008 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7009 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7010 "2789 GRP5 Async Event: Updating logical link speed "
7011 "from %dMbps to %dMbps\n", prev_ll_spd,
7012 phba->sli4_hba.link_state.logical_speed);
7013 }
7014
7015 /**
7016 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7017 * @phba: pointer to lpfc hba data structure.
7018 *
7019 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7020 * is an asynchronous notification of a request to reset CM stats.
7021 **/
7022 static void
lpfc_sli4_async_cmstat_evt(struct lpfc_hba * phba)7023 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7024 {
7025 if (!phba->cgn_i)
7026 return;
7027 lpfc_init_congestion_stat(phba);
7028 }
7029
7030 /**
7031 * lpfc_cgn_params_val - Validate FW congestion parameters.
7032 * @phba: pointer to lpfc hba data structure.
7033 * @p_cfg_param: pointer to FW provided congestion parameters.
7034 *
7035 * This routine validates the congestion parameters passed
7036 * by the FW to the driver via an ACQE event.
7037 **/
7038 static void
lpfc_cgn_params_val(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cfg_param)7039 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7040 {
7041 spin_lock_irq(&phba->hbalock);
7042
7043 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7044 LPFC_CFG_MONITOR)) {
7045 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7046 "6225 CMF mode param out of range: %d\n",
7047 p_cfg_param->cgn_param_mode);
7048 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7049 }
7050
7051 spin_unlock_irq(&phba->hbalock);
7052 }
7053
7054 static const char * const lpfc_cmf_mode_to_str[] = {
7055 "OFF",
7056 "MANAGED",
7057 "MONITOR",
7058 };
7059
7060 /**
7061 * lpfc_cgn_params_parse - Process a FW cong parm change event
7062 * @phba: pointer to lpfc hba data structure.
7063 * @p_cgn_param: pointer to a data buffer with the FW cong params.
7064 * @len: the size of pdata in bytes.
7065 *
7066 * This routine validates the congestion management buffer signature
7067 * from the FW, validates the contents and makes corrections for
7068 * valid, in-range values. If the signature magic is correct and
7069 * after parameter validation, the contents are copied to the driver's
7070 * @phba structure. If the magic is incorrect, an error message is
7071 * logged.
7072 **/
7073 static void
lpfc_cgn_params_parse(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cgn_param,uint32_t len)7074 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7075 struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7076 {
7077 struct lpfc_cgn_info *cp;
7078 uint32_t crc, oldmode;
7079 char acr_string[4] = {0};
7080
7081 /* Make sure the FW has encoded the correct magic number to
7082 * validate the congestion parameter in FW memory.
7083 */
7084 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7085 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7086 "4668 FW cgn parm buffer data: "
7087 "magic 0x%x version %d mode %d "
7088 "level0 %d level1 %d "
7089 "level2 %d byte13 %d "
7090 "byte14 %d byte15 %d "
7091 "byte11 %d byte12 %d activeMode %d\n",
7092 p_cgn_param->cgn_param_magic,
7093 p_cgn_param->cgn_param_version,
7094 p_cgn_param->cgn_param_mode,
7095 p_cgn_param->cgn_param_level0,
7096 p_cgn_param->cgn_param_level1,
7097 p_cgn_param->cgn_param_level2,
7098 p_cgn_param->byte13,
7099 p_cgn_param->byte14,
7100 p_cgn_param->byte15,
7101 p_cgn_param->byte11,
7102 p_cgn_param->byte12,
7103 phba->cmf_active_mode);
7104
7105 oldmode = phba->cmf_active_mode;
7106
7107 /* Any parameters out of range are corrected to defaults
7108 * by this routine. No need to fail.
7109 */
7110 lpfc_cgn_params_val(phba, p_cgn_param);
7111
7112 /* Parameters are verified, move them into driver storage */
7113 spin_lock_irq(&phba->hbalock);
7114 memcpy(&phba->cgn_p, p_cgn_param,
7115 sizeof(struct lpfc_cgn_param));
7116
7117 /* Update parameters in congestion info buffer now */
7118 if (phba->cgn_i) {
7119 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7120 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7121 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7122 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7123 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7124 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7125 LPFC_CGN_CRC32_SEED);
7126 cp->cgn_info_crc = cpu_to_le32(crc);
7127 }
7128 spin_unlock_irq(&phba->hbalock);
7129
7130 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7131
7132 switch (oldmode) {
7133 case LPFC_CFG_OFF:
7134 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7135 /* Turning CMF on */
7136 lpfc_cmf_start(phba);
7137
7138 if (phba->link_state >= LPFC_LINK_UP) {
7139 phba->cgn_reg_fpin =
7140 phba->cgn_init_reg_fpin;
7141 phba->cgn_reg_signal =
7142 phba->cgn_init_reg_signal;
7143 lpfc_issue_els_edc(phba->pport, 0);
7144 }
7145 }
7146 break;
7147 case LPFC_CFG_MANAGED:
7148 switch (phba->cgn_p.cgn_param_mode) {
7149 case LPFC_CFG_OFF:
7150 /* Turning CMF off */
7151 lpfc_cmf_stop(phba);
7152 if (phba->link_state >= LPFC_LINK_UP)
7153 lpfc_issue_els_edc(phba->pport, 0);
7154 break;
7155 case LPFC_CFG_MONITOR:
7156 phba->cmf_max_bytes_per_interval =
7157 phba->cmf_link_byte_count;
7158
7159 /* Resume blocked IO - unblock on workqueue */
7160 queue_work(phba->wq,
7161 &phba->unblock_request_work);
7162 break;
7163 }
7164 break;
7165 case LPFC_CFG_MONITOR:
7166 switch (phba->cgn_p.cgn_param_mode) {
7167 case LPFC_CFG_OFF:
7168 /* Turning CMF off */
7169 lpfc_cmf_stop(phba);
7170 if (phba->link_state >= LPFC_LINK_UP)
7171 lpfc_issue_els_edc(phba->pport, 0);
7172 break;
7173 case LPFC_CFG_MANAGED:
7174 lpfc_cmf_signal_init(phba);
7175 break;
7176 }
7177 break;
7178 }
7179 if (oldmode != LPFC_CFG_OFF ||
7180 oldmode != phba->cgn_p.cgn_param_mode) {
7181 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7182 scnprintf(acr_string, sizeof(acr_string), "%u",
7183 phba->cgn_p.cgn_param_level0);
7184 else
7185 scnprintf(acr_string, sizeof(acr_string), "NA");
7186
7187 dev_info(&phba->pcidev->dev, "%d: "
7188 "4663 CMF: Mode %s acr %s\n",
7189 phba->brd_no,
7190 lpfc_cmf_mode_to_str
7191 [phba->cgn_p.cgn_param_mode],
7192 acr_string);
7193 }
7194 } else {
7195 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7196 "4669 FW cgn parm buf wrong magic 0x%x "
7197 "version %d\n", p_cgn_param->cgn_param_magic,
7198 p_cgn_param->cgn_param_version);
7199 }
7200 }
7201
7202 /**
7203 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7204 * @phba: pointer to lpfc hba data structure.
7205 *
7206 * This routine issues a read_object mailbox command to
7207 * get the congestion management parameters from the FW
7208 * parses it and updates the driver maintained values.
7209 *
7210 * Returns
7211 * 0 if the object was empty
7212 * -Eval if an error was encountered
7213 * Count if bytes were read from object
7214 **/
7215 int
lpfc_sli4_cgn_params_read(struct lpfc_hba * phba)7216 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7217 {
7218 int ret = 0;
7219 struct lpfc_cgn_param *p_cgn_param = NULL;
7220 u32 *pdata = NULL;
7221 u32 len = 0;
7222
7223 /* Find out if the FW has a new set of congestion parameters. */
7224 len = sizeof(struct lpfc_cgn_param);
7225 pdata = kzalloc(len, GFP_KERNEL);
7226 if (!pdata)
7227 return -ENOMEM;
7228 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7229 pdata, len);
7230
7231 /* 0 means no data. A negative means error. A positive means
7232 * bytes were copied.
7233 */
7234 if (!ret) {
7235 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7236 "4670 CGN RD OBJ returns no data\n");
7237 goto rd_obj_err;
7238 } else if (ret < 0) {
7239 /* Some error. Just exit and return it to the caller.*/
7240 goto rd_obj_err;
7241 }
7242
7243 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7244 "6234 READ CGN PARAMS Successful %d\n", len);
7245
7246 /* Parse data pointer over len and update the phba congestion
7247 * parameters with values passed back. The receive rate values
7248 * may have been altered in FW, but take no action here.
7249 */
7250 p_cgn_param = (struct lpfc_cgn_param *)pdata;
7251 lpfc_cgn_params_parse(phba, p_cgn_param, len);
7252
7253 rd_obj_err:
7254 kfree(pdata);
7255 return ret;
7256 }
7257
7258 /**
7259 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7260 * @phba: pointer to lpfc hba data structure.
7261 *
7262 * The FW generated Async ACQE SLI event calls this routine when
7263 * the event type is an SLI Internal Port Event and the Event Code
7264 * indicates a change to the FW maintained congestion parameters.
7265 *
7266 * This routine executes a Read_Object mailbox call to obtain the
7267 * current congestion parameters maintained in FW and corrects
7268 * the driver's active congestion parameters.
7269 *
7270 * The acqe event is not passed because there is no further data
7271 * required.
7272 *
7273 * Returns nonzero error if event processing encountered an error.
7274 * Zero otherwise for success.
7275 **/
7276 static int
lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba * phba)7277 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7278 {
7279 int ret = 0;
7280
7281 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7282 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7283 "4664 Cgn Evt when E2E off. Drop event\n");
7284 return -EACCES;
7285 }
7286
7287 /* If the event is claiming an empty object, it's ok. A write
7288 * could have cleared it. Only error is a negative return
7289 * status.
7290 */
7291 ret = lpfc_sli4_cgn_params_read(phba);
7292 if (ret < 0) {
7293 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7294 "4667 Error reading Cgn Params (%d)\n",
7295 ret);
7296 } else if (!ret) {
7297 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7298 "4673 CGN Event empty object.\n");
7299 }
7300 return ret;
7301 }
7302
7303 /**
7304 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7305 * @phba: pointer to lpfc hba data structure.
7306 *
7307 * This routine is invoked by the worker thread to process all the pending
7308 * SLI4 asynchronous events.
7309 **/
lpfc_sli4_async_event_proc(struct lpfc_hba * phba)7310 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7311 {
7312 struct lpfc_cq_event *cq_event;
7313 unsigned long iflags;
7314
7315 /* First, declare the async event has been handled */
7316 clear_bit(ASYNC_EVENT, &phba->hba_flag);
7317
7318 /* Now, handle all the async events */
7319 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7320 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7321 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7322 cq_event, struct lpfc_cq_event, list);
7323 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7324 iflags);
7325
7326 /* Process the asynchronous event */
7327 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7328 case LPFC_TRAILER_CODE_LINK:
7329 lpfc_sli4_async_link_evt(phba,
7330 &cq_event->cqe.acqe_link);
7331 break;
7332 case LPFC_TRAILER_CODE_FCOE:
7333 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7334 break;
7335 case LPFC_TRAILER_CODE_DCBX:
7336 lpfc_sli4_async_dcbx_evt(phba,
7337 &cq_event->cqe.acqe_dcbx);
7338 break;
7339 case LPFC_TRAILER_CODE_GRP5:
7340 lpfc_sli4_async_grp5_evt(phba,
7341 &cq_event->cqe.acqe_grp5);
7342 break;
7343 case LPFC_TRAILER_CODE_FC:
7344 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7345 break;
7346 case LPFC_TRAILER_CODE_SLI:
7347 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7348 break;
7349 default:
7350 lpfc_printf_log(phba, KERN_ERR,
7351 LOG_TRACE_EVENT,
7352 "1804 Invalid asynchronous event code: "
7353 "x%x\n", bf_get(lpfc_trailer_code,
7354 &cq_event->cqe.mcqe_cmpl));
7355 break;
7356 }
7357
7358 /* Free the completion event processed to the free pool */
7359 lpfc_sli4_cq_event_release(phba, cq_event);
7360 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7361 }
7362 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7363 }
7364
7365 /**
7366 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7367 * @phba: pointer to lpfc hba data structure.
7368 *
7369 * This routine is invoked by the worker thread to process FCF table
7370 * rediscovery pending completion event.
7371 **/
lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba * phba)7372 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7373 {
7374 int rc;
7375
7376 spin_lock_irq(&phba->hbalock);
7377 /* Clear FCF rediscovery timeout event */
7378 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7379 /* Clear driver fast failover FCF record flag */
7380 phba->fcf.failover_rec.flag = 0;
7381 /* Set state for FCF fast failover */
7382 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7383 spin_unlock_irq(&phba->hbalock);
7384
7385 /* Scan FCF table from the first entry to re-discover SAN */
7386 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7387 "2777 Start post-quiescent FCF table scan\n");
7388 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7389 if (rc)
7390 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7391 "2747 Issue FCF scan read FCF mailbox "
7392 "command failed 0x%x\n", rc);
7393 }
7394
7395 /**
7396 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7397 * @phba: pointer to lpfc hba data structure.
7398 * @dev_grp: The HBA PCI-Device group number.
7399 *
7400 * This routine is invoked to set up the per HBA PCI-Device group function
7401 * API jump table entries.
7402 *
7403 * Return: 0 if success, otherwise -ENODEV
7404 **/
7405 int
lpfc_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)7406 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7407 {
7408 int rc;
7409
7410 /* Set up lpfc PCI-device group */
7411 phba->pci_dev_grp = dev_grp;
7412
7413 /* The LPFC_PCI_DEV_OC uses SLI4 */
7414 if (dev_grp == LPFC_PCI_DEV_OC)
7415 phba->sli_rev = LPFC_SLI_REV4;
7416
7417 /* Set up device INIT API function jump table */
7418 rc = lpfc_init_api_table_setup(phba, dev_grp);
7419 if (rc)
7420 return -ENODEV;
7421 /* Set up SCSI API function jump table */
7422 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7423 if (rc)
7424 return -ENODEV;
7425 /* Set up SLI API function jump table */
7426 rc = lpfc_sli_api_table_setup(phba, dev_grp);
7427 if (rc)
7428 return -ENODEV;
7429 /* Set up MBOX API function jump table */
7430 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7431 if (rc)
7432 return -ENODEV;
7433
7434 return 0;
7435 }
7436
7437 /**
7438 * lpfc_log_intr_mode - Log the active interrupt mode
7439 * @phba: pointer to lpfc hba data structure.
7440 * @intr_mode: active interrupt mode adopted.
7441 *
7442 * This routine it invoked to log the currently used active interrupt mode
7443 * to the device.
7444 **/
lpfc_log_intr_mode(struct lpfc_hba * phba,uint32_t intr_mode)7445 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7446 {
7447 switch (intr_mode) {
7448 case 0:
7449 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7450 "0470 Enable INTx interrupt mode.\n");
7451 break;
7452 case 1:
7453 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7454 "0481 Enabled MSI interrupt mode.\n");
7455 break;
7456 case 2:
7457 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7458 "0480 Enabled MSI-X interrupt mode.\n");
7459 break;
7460 default:
7461 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7462 "0482 Illegal interrupt mode.\n");
7463 break;
7464 }
7465 return;
7466 }
7467
7468 /**
7469 * lpfc_enable_pci_dev - Enable a generic PCI device.
7470 * @phba: pointer to lpfc hba data structure.
7471 *
7472 * This routine is invoked to enable the PCI device that is common to all
7473 * PCI devices.
7474 *
7475 * Return codes
7476 * 0 - successful
7477 * other values - error
7478 **/
7479 static int
lpfc_enable_pci_dev(struct lpfc_hba * phba)7480 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7481 {
7482 struct pci_dev *pdev;
7483
7484 /* Obtain PCI device reference */
7485 if (!phba->pcidev)
7486 goto out_error;
7487 else
7488 pdev = phba->pcidev;
7489 /* Enable PCI device */
7490 if (pci_enable_device_mem(pdev))
7491 goto out_error;
7492 /* Request PCI resource for the device */
7493 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7494 goto out_disable_device;
7495 /* Set up device as PCI master and save state for EEH */
7496 pci_set_master(pdev);
7497 pci_try_set_mwi(pdev);
7498 pci_save_state(pdev);
7499
7500 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7501 if (pci_is_pcie(pdev))
7502 pdev->needs_freset = 1;
7503
7504 return 0;
7505
7506 out_disable_device:
7507 pci_disable_device(pdev);
7508 out_error:
7509 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7510 "1401 Failed to enable pci device\n");
7511 return -ENODEV;
7512 }
7513
7514 /**
7515 * lpfc_disable_pci_dev - Disable a generic PCI device.
7516 * @phba: pointer to lpfc hba data structure.
7517 *
7518 * This routine is invoked to disable the PCI device that is common to all
7519 * PCI devices.
7520 **/
7521 static void
lpfc_disable_pci_dev(struct lpfc_hba * phba)7522 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7523 {
7524 struct pci_dev *pdev;
7525
7526 /* Obtain PCI device reference */
7527 if (!phba->pcidev)
7528 return;
7529 else
7530 pdev = phba->pcidev;
7531 /* Release PCI resource and disable PCI device */
7532 pci_release_mem_regions(pdev);
7533 pci_disable_device(pdev);
7534
7535 return;
7536 }
7537
7538 /**
7539 * lpfc_reset_hba - Reset a hba
7540 * @phba: pointer to lpfc hba data structure.
7541 *
7542 * This routine is invoked to reset a hba device. It brings the HBA
7543 * offline, performs a board restart, and then brings the board back
7544 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7545 * on outstanding mailbox commands.
7546 **/
7547 void
lpfc_reset_hba(struct lpfc_hba * phba)7548 lpfc_reset_hba(struct lpfc_hba *phba)
7549 {
7550 int rc = 0;
7551
7552 /* If resets are disabled then set error state and return. */
7553 if (!phba->cfg_enable_hba_reset) {
7554 phba->link_state = LPFC_HBA_ERROR;
7555 return;
7556 }
7557
7558 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7559 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7560 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7561 } else {
7562 if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) {
7563 /* Perform a PCI function reset to start from clean */
7564 rc = lpfc_pci_function_reset(phba);
7565 lpfc_els_flush_all_cmd(phba);
7566 }
7567 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7568 lpfc_sli_flush_io_rings(phba);
7569 }
7570 lpfc_offline(phba);
7571 clear_bit(MBX_TMO_ERR, &phba->bit_flags);
7572 if (unlikely(rc)) {
7573 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7574 "8888 PCI function reset failed rc %x\n",
7575 rc);
7576 } else {
7577 lpfc_sli_brdrestart(phba);
7578 lpfc_online(phba);
7579 lpfc_unblock_mgmt_io(phba);
7580 }
7581 }
7582
7583 /**
7584 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7585 * @phba: pointer to lpfc hba data structure.
7586 *
7587 * This function enables the PCI SR-IOV virtual functions to a physical
7588 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7589 * enable the number of virtual functions to the physical function. As
7590 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7591 * API call does not considered as an error condition for most of the device.
7592 **/
7593 uint16_t
lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba * phba)7594 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7595 {
7596 struct pci_dev *pdev = phba->pcidev;
7597 uint16_t nr_virtfn;
7598 int pos;
7599
7600 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7601 if (pos == 0)
7602 return 0;
7603
7604 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7605 return nr_virtfn;
7606 }
7607
7608 /**
7609 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7610 * @phba: pointer to lpfc hba data structure.
7611 * @nr_vfn: number of virtual functions to be enabled.
7612 *
7613 * This function enables the PCI SR-IOV virtual functions to a physical
7614 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7615 * enable the number of virtual functions to the physical function. As
7616 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7617 * API call does not considered as an error condition for most of the device.
7618 **/
7619 int
lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba * phba,int nr_vfn)7620 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7621 {
7622 struct pci_dev *pdev = phba->pcidev;
7623 uint16_t max_nr_vfn;
7624 int rc;
7625
7626 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7627 if (nr_vfn > max_nr_vfn) {
7628 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7629 "3057 Requested vfs (%d) greater than "
7630 "supported vfs (%d)", nr_vfn, max_nr_vfn);
7631 return -EINVAL;
7632 }
7633
7634 rc = pci_enable_sriov(pdev, nr_vfn);
7635 if (rc) {
7636 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7637 "2806 Failed to enable sriov on this device "
7638 "with vfn number nr_vf:%d, rc:%d\n",
7639 nr_vfn, rc);
7640 } else
7641 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7642 "2807 Successful enable sriov on this device "
7643 "with vfn number nr_vf:%d\n", nr_vfn);
7644 return rc;
7645 }
7646
7647 static void
lpfc_unblock_requests_work(struct work_struct * work)7648 lpfc_unblock_requests_work(struct work_struct *work)
7649 {
7650 struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7651 unblock_request_work);
7652
7653 lpfc_unblock_requests(phba);
7654 }
7655
7656 /**
7657 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7658 * @phba: pointer to lpfc hba data structure.
7659 *
7660 * This routine is invoked to set up the driver internal resources before the
7661 * device specific resource setup to support the HBA device it attached to.
7662 *
7663 * Return codes
7664 * 0 - successful
7665 * other values - error
7666 **/
7667 static int
lpfc_setup_driver_resource_phase1(struct lpfc_hba * phba)7668 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7669 {
7670 struct lpfc_sli *psli = &phba->sli;
7671
7672 /*
7673 * Driver resources common to all SLI revisions
7674 */
7675 atomic_set(&phba->fast_event_count, 0);
7676 atomic_set(&phba->dbg_log_idx, 0);
7677 atomic_set(&phba->dbg_log_cnt, 0);
7678 atomic_set(&phba->dbg_log_dmping, 0);
7679 spin_lock_init(&phba->hbalock);
7680
7681 /* Initialize port_list spinlock */
7682 spin_lock_init(&phba->port_list_lock);
7683 INIT_LIST_HEAD(&phba->port_list);
7684
7685 INIT_LIST_HEAD(&phba->work_list);
7686
7687 /* Initialize the wait queue head for the kernel thread */
7688 init_waitqueue_head(&phba->work_waitq);
7689
7690 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7691 "1403 Protocols supported %s %s %s\n",
7692 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7693 "SCSI" : " "),
7694 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7695 "NVME" : " "),
7696 (phba->nvmet_support ? "NVMET" : " "));
7697
7698 /* ras_fwlog state */
7699 spin_lock_init(&phba->ras_fwlog_lock);
7700
7701 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
7702 spin_lock_init(&phba->scsi_buf_list_get_lock);
7703 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7704 spin_lock_init(&phba->scsi_buf_list_put_lock);
7705 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7706
7707 /* Initialize the fabric iocb list */
7708 INIT_LIST_HEAD(&phba->fabric_iocb_list);
7709
7710 /* Initialize list to save ELS buffers */
7711 INIT_LIST_HEAD(&phba->elsbuf);
7712
7713 /* Initialize FCF connection rec list */
7714 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7715
7716 /* Initialize OAS configuration list */
7717 spin_lock_init(&phba->devicelock);
7718 INIT_LIST_HEAD(&phba->luns);
7719
7720 /* MBOX heartbeat timer */
7721 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7722 /* Fabric block timer */
7723 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7724 /* EA polling mode timer */
7725 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7726 /* Heartbeat timer */
7727 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7728
7729 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7730
7731 INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7732 lpfc_idle_stat_delay_work);
7733 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7734 return 0;
7735 }
7736
7737 /**
7738 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7739 * @phba: pointer to lpfc hba data structure.
7740 *
7741 * This routine is invoked to set up the driver internal resources specific to
7742 * support the SLI-3 HBA device it attached to.
7743 *
7744 * Return codes
7745 * 0 - successful
7746 * other values - error
7747 **/
7748 static int
lpfc_sli_driver_resource_setup(struct lpfc_hba * phba)7749 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7750 {
7751 int rc, entry_sz;
7752
7753 /*
7754 * Initialize timers used by driver
7755 */
7756
7757 /* FCP polling mode timer */
7758 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7759
7760 /* Host attention work mask setup */
7761 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7762 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7763
7764 /* Get all the module params for configuring this host */
7765 lpfc_get_cfgparam(phba);
7766 /* Set up phase-1 common device driver resources */
7767
7768 rc = lpfc_setup_driver_resource_phase1(phba);
7769 if (rc)
7770 return -ENODEV;
7771
7772 if (!phba->sli.sli3_ring)
7773 phba->sli.sli3_ring = kzalloc_objs(struct lpfc_sli_ring,
7774 LPFC_SLI3_MAX_RING);
7775 if (!phba->sli.sli3_ring)
7776 return -ENOMEM;
7777
7778 /*
7779 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7780 * used to create the sg_dma_buf_pool must be dynamically calculated.
7781 */
7782
7783 if (phba->sli_rev == LPFC_SLI_REV4)
7784 entry_sz = sizeof(struct sli4_sge);
7785 else
7786 entry_sz = sizeof(struct ulp_bde64);
7787
7788 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7789 if (phba->cfg_enable_bg) {
7790 /*
7791 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7792 * the FCP rsp, and a BDE for each. Sice we have no control
7793 * over how many protection data segments the SCSI Layer
7794 * will hand us (ie: there could be one for every block
7795 * in the IO), we just allocate enough BDEs to accomidate
7796 * our max amount and we need to limit lpfc_sg_seg_cnt to
7797 * minimize the risk of running out.
7798 */
7799 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7800 sizeof(struct fcp_rsp) +
7801 (LPFC_MAX_SG_SEG_CNT * entry_sz);
7802
7803 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7804 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7805
7806 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7807 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7808 } else {
7809 /*
7810 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7811 * the FCP rsp, a BDE for each, and a BDE for up to
7812 * cfg_sg_seg_cnt data segments.
7813 */
7814 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7815 sizeof(struct fcp_rsp) +
7816 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7817
7818 /* Total BDEs in BPL for scsi_sg_list */
7819 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7820 }
7821
7822 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7823 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7824 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7825 phba->cfg_total_seg_cnt);
7826
7827 phba->max_vpi = LPFC_MAX_VPI;
7828 /* This will be set to correct value after config_port mbox */
7829 phba->max_vports = 0;
7830
7831 /*
7832 * Initialize the SLI Layer to run with lpfc HBAs.
7833 */
7834 lpfc_sli_setup(phba);
7835 lpfc_sli_queue_init(phba);
7836
7837 /* Allocate device driver memory */
7838 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7839 return -ENOMEM;
7840
7841 phba->lpfc_sg_dma_buf_pool =
7842 dma_pool_create("lpfc_sg_dma_buf_pool",
7843 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7844 BPL_ALIGN_SZ, 0);
7845
7846 if (!phba->lpfc_sg_dma_buf_pool)
7847 goto fail_free_mem;
7848
7849 phba->lpfc_cmd_rsp_buf_pool =
7850 dma_pool_create("lpfc_cmd_rsp_buf_pool",
7851 &phba->pcidev->dev,
7852 sizeof(struct fcp_cmnd) +
7853 sizeof(struct fcp_rsp),
7854 BPL_ALIGN_SZ, 0);
7855
7856 if (!phba->lpfc_cmd_rsp_buf_pool)
7857 goto fail_free_dma_buf_pool;
7858
7859 /*
7860 * Enable sr-iov virtual functions if supported and configured
7861 * through the module parameter.
7862 */
7863 if (phba->cfg_sriov_nr_virtfn > 0) {
7864 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7865 phba->cfg_sriov_nr_virtfn);
7866 if (rc) {
7867 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7868 "2808 Requested number of SR-IOV "
7869 "virtual functions (%d) is not "
7870 "supported\n",
7871 phba->cfg_sriov_nr_virtfn);
7872 phba->cfg_sriov_nr_virtfn = 0;
7873 }
7874 }
7875
7876 return 0;
7877
7878 fail_free_dma_buf_pool:
7879 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7880 phba->lpfc_sg_dma_buf_pool = NULL;
7881 fail_free_mem:
7882 lpfc_mem_free(phba);
7883 return -ENOMEM;
7884 }
7885
7886 /**
7887 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7888 * @phba: pointer to lpfc hba data structure.
7889 *
7890 * This routine is invoked to unset the driver internal resources set up
7891 * specific for supporting the SLI-3 HBA device it attached to.
7892 **/
7893 static void
lpfc_sli_driver_resource_unset(struct lpfc_hba * phba)7894 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7895 {
7896 /* Free device driver memory allocated */
7897 lpfc_mem_free_all(phba);
7898
7899 return;
7900 }
7901
7902 /**
7903 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7904 * @phba: pointer to lpfc hba data structure.
7905 *
7906 * This routine is invoked to set up the driver internal resources specific to
7907 * support the SLI-4 HBA device it attached to.
7908 *
7909 * Return codes
7910 * 0 - successful
7911 * other values - error
7912 **/
7913 static int
lpfc_sli4_driver_resource_setup(struct lpfc_hba * phba)7914 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7915 {
7916 LPFC_MBOXQ_t *mboxq;
7917 MAILBOX_t *mb;
7918 int rc, i, max_buf_size;
7919 int longs;
7920 int extra;
7921 uint64_t wwn;
7922
7923 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7924 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7925 phba->sli4_hba.curr_disp_cpu = 0;
7926
7927 /* Get all the module params for configuring this host */
7928 lpfc_get_cfgparam(phba);
7929
7930 /* Set up phase-1 common device driver resources */
7931 rc = lpfc_setup_driver_resource_phase1(phba);
7932 if (rc)
7933 return -ENODEV;
7934
7935 /* Before proceed, wait for POST done and device ready */
7936 rc = lpfc_sli4_post_status_check(phba);
7937 if (rc)
7938 return -ENODEV;
7939
7940 /* Allocate all driver workqueues here */
7941
7942 /* The lpfc_wq workqueue for deferred irq use */
7943 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM | WQ_PERCPU, 0);
7944 if (!phba->wq)
7945 return -ENOMEM;
7946
7947 /*
7948 * Initialize timers used by driver
7949 */
7950
7951 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7952
7953 /* FCF rediscover timer */
7954 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7955
7956 /* CMF congestion timer */
7957 hrtimer_setup(&phba->cmf_timer, lpfc_cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7958 /* CMF 1 minute stats collection timer */
7959 hrtimer_setup(&phba->cmf_stats_timer, lpfc_cmf_stats_timer, CLOCK_MONOTONIC,
7960 HRTIMER_MODE_REL);
7961
7962 /*
7963 * Control structure for handling external multi-buffer mailbox
7964 * command pass-through.
7965 */
7966 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7967 sizeof(struct lpfc_mbox_ext_buf_ctx));
7968 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7969
7970 phba->max_vpi = LPFC_MAX_VPI;
7971
7972 /* This will be set to correct value after the read_config mbox */
7973 phba->max_vports = 0;
7974
7975 /* Program the default value of vlan_id and fc_map */
7976 phba->valid_vlan = 0;
7977 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7978 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7979 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7980
7981 /*
7982 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7983 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7984 * The WQ create will allocate the ring.
7985 */
7986
7987 /* Initialize buffer queue management fields */
7988 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7989 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7990 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7991
7992 /* for VMID idle timeout if VMID is enabled */
7993 if (lpfc_is_vmid_enabled(phba))
7994 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7995
7996 /*
7997 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
7998 */
7999 /* Initialize the Abort buffer list used by driver */
8000 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
8001 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8002
8003 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8004 /* Initialize the Abort nvme buffer list used by driver */
8005 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8006 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8007 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8008 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8009 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8010 }
8011
8012 /* This abort list used by worker thread */
8013 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8014 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8015 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8016 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8017
8018 /*
8019 * Initialize driver internal slow-path work queues
8020 */
8021
8022 /* Driver internel slow-path CQ Event pool */
8023 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8024 /* Response IOCB work queue list */
8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8026 /* Asynchronous event CQ Event work queue list */
8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8028 /* Slow-path XRI aborted CQ Event work queue list */
8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8030 /* Receive queue CQ Event work queue list */
8031 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8032
8033 /* Initialize extent block lists. */
8034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8035 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8036 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8037 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8038
8039 /* Initialize mboxq lists. If the early init routines fail
8040 * these lists need to be correctly initialized.
8041 */
8042 INIT_LIST_HEAD(&phba->sli.mboxq);
8043 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8044
8045 /* initialize optic_state to 0xFF */
8046 phba->sli4_hba.lnk_info.optic_state = 0xff;
8047
8048 /* Allocate device driver memory */
8049 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8050 if (rc)
8051 goto out_destroy_workqueue;
8052
8053 /* IF Type 2 ports get initialized now. */
8054 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8055 LPFC_SLI_INTF_IF_TYPE_2) {
8056 rc = lpfc_pci_function_reset(phba);
8057 if (unlikely(rc)) {
8058 rc = -ENODEV;
8059 goto out_free_mem;
8060 }
8061 phba->temp_sensor_support = 1;
8062 }
8063
8064 /* Create the bootstrap mailbox command */
8065 rc = lpfc_create_bootstrap_mbox(phba);
8066 if (unlikely(rc))
8067 goto out_free_mem;
8068
8069 /* Set up the host's endian order with the device. */
8070 rc = lpfc_setup_endian_order(phba);
8071 if (unlikely(rc))
8072 goto out_free_bsmbx;
8073
8074 /* Set up the hba's configuration parameters. */
8075 rc = lpfc_sli4_read_config(phba);
8076 if (unlikely(rc))
8077 goto out_free_bsmbx;
8078
8079 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8080 /* Right now the link is down, if FA-PWWN is configured the
8081 * firmware will try FLOGI before the driver gets a link up.
8082 * If it fails, the driver should get a MISCONFIGURED async
8083 * event which will clear this flag. The only notification
8084 * the driver gets is if it fails, if it succeeds there is no
8085 * notification given. Assume success.
8086 */
8087 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8088 }
8089
8090 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8091 if (unlikely(rc))
8092 goto out_free_bsmbx;
8093
8094 /* IF Type 0 ports get initialized now. */
8095 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8096 LPFC_SLI_INTF_IF_TYPE_0) {
8097 rc = lpfc_pci_function_reset(phba);
8098 if (unlikely(rc))
8099 goto out_free_bsmbx;
8100 }
8101
8102 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8103 GFP_KERNEL);
8104 if (!mboxq) {
8105 rc = -ENOMEM;
8106 goto out_free_bsmbx;
8107 }
8108
8109 /* Check for NVMET being configured */
8110 phba->nvmet_support = 0;
8111 if (lpfc_enable_nvmet_cnt) {
8112
8113 /* First get WWN of HBA instance */
8114 lpfc_read_nv(phba, mboxq);
8115 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8116 if (rc != MBX_SUCCESS) {
8117 lpfc_printf_log(phba, KERN_ERR,
8118 LOG_TRACE_EVENT,
8119 "6016 Mailbox failed , mbxCmd x%x "
8120 "READ_NV, mbxStatus x%x\n",
8121 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8122 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8123 mempool_free(mboxq, phba->mbox_mem_pool);
8124 rc = -EIO;
8125 goto out_free_bsmbx;
8126 }
8127 mb = &mboxq->u.mb;
8128 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8129 sizeof(uint64_t));
8130 wwn = cpu_to_be64(wwn);
8131 phba->sli4_hba.wwnn.u.name = wwn;
8132 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8133 sizeof(uint64_t));
8134 /* wwn is WWPN of HBA instance */
8135 wwn = cpu_to_be64(wwn);
8136 phba->sli4_hba.wwpn.u.name = wwn;
8137
8138 /* Check to see if it matches any module parameter */
8139 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8140 if (wwn == lpfc_enable_nvmet[i]) {
8141 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8142 if (lpfc_nvmet_mem_alloc(phba))
8143 break;
8144
8145 phba->nvmet_support = 1; /* a match */
8146
8147 lpfc_printf_log(phba, KERN_ERR,
8148 LOG_TRACE_EVENT,
8149 "6017 NVME Target %016llx\n",
8150 wwn);
8151 #else
8152 lpfc_printf_log(phba, KERN_ERR,
8153 LOG_TRACE_EVENT,
8154 "6021 Can't enable NVME Target."
8155 " NVME_TARGET_FC infrastructure"
8156 " is not in kernel\n");
8157 #endif
8158 /* Not supported for NVMET */
8159 phba->cfg_xri_rebalancing = 0;
8160 if (phba->irq_chann_mode == NHT_MODE) {
8161 phba->cfg_irq_chann =
8162 phba->sli4_hba.num_present_cpu;
8163 phba->cfg_hdw_queue =
8164 phba->sli4_hba.num_present_cpu;
8165 phba->irq_chann_mode = NORMAL_MODE;
8166 }
8167 break;
8168 }
8169 }
8170 }
8171
8172 lpfc_nvme_mod_param_dep(phba);
8173
8174 /*
8175 * Get sli4 parameters that override parameters from Port capabilities.
8176 * If this call fails, it isn't critical unless the SLI4 parameters come
8177 * back in conflict.
8178 */
8179 rc = lpfc_get_sli4_parameters(phba, mboxq);
8180 if (rc) {
8181 lpfc_log_msg(phba, KERN_WARNING, LOG_INIT,
8182 "2999 Could not get SLI4 parameters\n");
8183 rc = -EIO;
8184 mempool_free(mboxq, phba->mbox_mem_pool);
8185 goto out_free_bsmbx;
8186 }
8187
8188 /*
8189 * 1 for cmd, 1 for rsp, NVME adds an extra one
8190 * for boundary conditions in its max_sgl_segment template.
8191 */
8192 extra = 2;
8193 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8194 extra++;
8195
8196 /*
8197 * It doesn't matter what family our adapter is in, we are
8198 * limited to 2 Pages, 512 SGEs, for our SGL.
8199 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8200 */
8201 max_buf_size = (2 * SLI4_PAGE_SIZE);
8202
8203 /*
8204 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8205 * used to create the sg_dma_buf_pool must be calculated.
8206 */
8207 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8208 /* Both cfg_enable_bg and cfg_external_dif code paths */
8209
8210 /*
8211 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8212 * the FCP rsp, and a SGE. Sice we have no control
8213 * over how many protection segments the SCSI Layer
8214 * will hand us (ie: there could be one for every block
8215 * in the IO), just allocate enough SGEs to accomidate
8216 * our max amount and we need to limit lpfc_sg_seg_cnt
8217 * to minimize the risk of running out.
8218 */
8219 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8220 sizeof(struct fcp_rsp) + max_buf_size;
8221
8222 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8223 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8224
8225 /*
8226 * If supporting DIF, reduce the seg count for scsi to
8227 * allow room for the DIF sges.
8228 */
8229 if (phba->cfg_enable_bg &&
8230 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8231 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8232 else
8233 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8234
8235 } else {
8236 /*
8237 * The scsi_buf for a regular I/O holds the FCP cmnd,
8238 * the FCP rsp, a SGE for each, and a SGE for up to
8239 * cfg_sg_seg_cnt data segments.
8240 */
8241 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8242 sizeof(struct fcp_rsp) +
8243 ((phba->cfg_sg_seg_cnt + extra) *
8244 sizeof(struct sli4_sge));
8245
8246 /* Total SGEs for scsi_sg_list */
8247 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8248 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8249
8250 /*
8251 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8252 * need to post 1 page for the SGL.
8253 */
8254 }
8255
8256 if (phba->cfg_xpsgl && !phba->nvmet_support)
8257 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8258 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
8259 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8260 else
8261 phba->cfg_sg_dma_buf_size =
8262 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8263
8264 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8265 sizeof(struct sli4_sge);
8266
8267 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8268 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8269 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8270 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8271 "6300 Reducing NVME sg segment "
8272 "cnt to %d\n",
8273 LPFC_MAX_NVME_SEG_CNT);
8274 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8275 } else
8276 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8277 }
8278
8279 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8280 "9087 sg_seg_cnt:%d dmabuf_size:%d "
8281 "total:%d scsi:%d nvme:%d\n",
8282 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8283 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
8284 phba->cfg_nvme_seg_cnt);
8285
8286 i = min(phba->cfg_sg_dma_buf_size, SLI4_PAGE_SIZE);
8287
8288 phba->lpfc_sg_dma_buf_pool =
8289 dma_pool_create("lpfc_sg_dma_buf_pool",
8290 &phba->pcidev->dev,
8291 phba->cfg_sg_dma_buf_size,
8292 i, 0);
8293 if (!phba->lpfc_sg_dma_buf_pool) {
8294 rc = -ENOMEM;
8295 goto out_free_bsmbx;
8296 }
8297
8298 phba->lpfc_cmd_rsp_buf_pool =
8299 dma_pool_create("lpfc_cmd_rsp_buf_pool",
8300 &phba->pcidev->dev,
8301 sizeof(struct fcp_cmnd32) +
8302 sizeof(struct fcp_rsp),
8303 i, 0);
8304 if (!phba->lpfc_cmd_rsp_buf_pool) {
8305 rc = -ENOMEM;
8306 goto out_free_sg_dma_buf;
8307 }
8308
8309 mempool_free(mboxq, phba->mbox_mem_pool);
8310
8311 /* Verify OAS is supported */
8312 lpfc_sli4_oas_verify(phba);
8313
8314 /* Verify RAS support on adapter */
8315 lpfc_sli4_ras_init(phba);
8316
8317 /* Verify all the SLI4 queues */
8318 rc = lpfc_sli4_queue_verify(phba);
8319 if (rc)
8320 goto out_free_cmd_rsp_buf;
8321
8322 /* Create driver internal CQE event pool */
8323 rc = lpfc_sli4_cq_event_pool_create(phba);
8324 if (rc)
8325 goto out_free_cmd_rsp_buf;
8326
8327 /* Initialize sgl lists per host */
8328 lpfc_init_sgl_list(phba);
8329
8330 /* Allocate and initialize active sgl array */
8331 rc = lpfc_init_active_sgl_array(phba);
8332 if (rc) {
8333 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8334 "1430 Failed to initialize sgl list.\n");
8335 goto out_destroy_cq_event_pool;
8336 }
8337 rc = lpfc_sli4_init_rpi_hdrs(phba);
8338 if (rc) {
8339 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8340 "1432 Failed to initialize rpi headers.\n");
8341 goto out_free_active_sgl;
8342 }
8343
8344 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8345 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8346 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8347 GFP_KERNEL);
8348 if (!phba->fcf.fcf_rr_bmask) {
8349 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8350 "2759 Failed allocate memory for FCF round "
8351 "robin failover bmask\n");
8352 rc = -ENOMEM;
8353 goto out_remove_rpi_hdrs;
8354 }
8355
8356 phba->sli4_hba.hba_eq_hdl = kzalloc_objs(struct lpfc_hba_eq_hdl,
8357 phba->cfg_irq_chann);
8358 if (!phba->sli4_hba.hba_eq_hdl) {
8359 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8360 "2572 Failed allocate memory for "
8361 "fast-path per-EQ handle array\n");
8362 rc = -ENOMEM;
8363 goto out_free_fcf_rr_bmask;
8364 }
8365
8366 phba->sli4_hba.cpu_map = kzalloc_objs(struct lpfc_vector_map_info,
8367 phba->sli4_hba.num_possible_cpu);
8368 if (!phba->sli4_hba.cpu_map) {
8369 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8370 "3327 Failed allocate memory for msi-x "
8371 "interrupt vector mapping\n");
8372 rc = -ENOMEM;
8373 goto out_free_hba_eq_hdl;
8374 }
8375
8376 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8377 if (!phba->sli4_hba.eq_info) {
8378 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8379 "3321 Failed allocation for per_cpu stats\n");
8380 rc = -ENOMEM;
8381 goto out_free_hba_cpu_map;
8382 }
8383
8384 phba->sli4_hba.idle_stat = kzalloc_objs(*phba->sli4_hba.idle_stat,
8385 phba->sli4_hba.num_possible_cpu);
8386 if (!phba->sli4_hba.idle_stat) {
8387 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8388 "3390 Failed allocation for idle_stat\n");
8389 rc = -ENOMEM;
8390 goto out_free_hba_eq_info;
8391 }
8392
8393 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8394 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8395 if (!phba->sli4_hba.c_stat) {
8396 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8397 "3332 Failed allocating per cpu hdwq stats\n");
8398 rc = -ENOMEM;
8399 goto out_free_hba_idle_stat;
8400 }
8401 #endif
8402
8403 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8404 if (!phba->cmf_stat) {
8405 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8406 "3331 Failed allocating per cpu cgn stats\n");
8407 rc = -ENOMEM;
8408 goto out_free_hba_hdwq_info;
8409 }
8410
8411 /*
8412 * Enable sr-iov virtual functions if supported and configured
8413 * through the module parameter.
8414 */
8415 if (phba->cfg_sriov_nr_virtfn > 0) {
8416 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8417 phba->cfg_sriov_nr_virtfn);
8418 if (rc) {
8419 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8420 "3020 Requested number of SR-IOV "
8421 "virtual functions (%d) is not "
8422 "supported\n",
8423 phba->cfg_sriov_nr_virtfn);
8424 phba->cfg_sriov_nr_virtfn = 0;
8425 }
8426 }
8427
8428 return 0;
8429
8430 out_free_hba_hdwq_info:
8431 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8432 free_percpu(phba->sli4_hba.c_stat);
8433 out_free_hba_idle_stat:
8434 #endif
8435 kfree(phba->sli4_hba.idle_stat);
8436 out_free_hba_eq_info:
8437 free_percpu(phba->sli4_hba.eq_info);
8438 out_free_hba_cpu_map:
8439 kfree(phba->sli4_hba.cpu_map);
8440 out_free_hba_eq_hdl:
8441 kfree(phba->sli4_hba.hba_eq_hdl);
8442 out_free_fcf_rr_bmask:
8443 kfree(phba->fcf.fcf_rr_bmask);
8444 out_remove_rpi_hdrs:
8445 lpfc_sli4_remove_rpi_hdrs(phba);
8446 out_free_active_sgl:
8447 lpfc_free_active_sgl(phba);
8448 out_destroy_cq_event_pool:
8449 lpfc_sli4_cq_event_pool_destroy(phba);
8450 out_free_cmd_rsp_buf:
8451 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8452 phba->lpfc_cmd_rsp_buf_pool = NULL;
8453 out_free_sg_dma_buf:
8454 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8455 phba->lpfc_sg_dma_buf_pool = NULL;
8456 out_free_bsmbx:
8457 lpfc_destroy_bootstrap_mbox(phba);
8458 out_free_mem:
8459 lpfc_mem_free(phba);
8460 out_destroy_workqueue:
8461 destroy_workqueue(phba->wq);
8462 phba->wq = NULL;
8463 return rc;
8464 }
8465
8466 /**
8467 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8468 * @phba: pointer to lpfc hba data structure.
8469 *
8470 * This routine is invoked to unset the driver internal resources set up
8471 * specific for supporting the SLI-4 HBA device it attached to.
8472 **/
8473 static void
lpfc_sli4_driver_resource_unset(struct lpfc_hba * phba)8474 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8475 {
8476 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8477
8478 free_percpu(phba->sli4_hba.eq_info);
8479 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8480 free_percpu(phba->sli4_hba.c_stat);
8481 #endif
8482 free_percpu(phba->cmf_stat);
8483 kfree(phba->sli4_hba.idle_stat);
8484
8485 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
8486 kfree(phba->sli4_hba.cpu_map);
8487 phba->sli4_hba.num_possible_cpu = 0;
8488 phba->sli4_hba.num_present_cpu = 0;
8489 phba->sli4_hba.curr_disp_cpu = 0;
8490 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8491
8492 /* Free memory allocated for fast-path work queue handles */
8493 kfree(phba->sli4_hba.hba_eq_hdl);
8494
8495 /* Free the allocated rpi headers. */
8496 lpfc_sli4_remove_rpi_hdrs(phba);
8497 lpfc_sli4_remove_rpis(phba);
8498
8499 /* Free eligible FCF index bmask */
8500 kfree(phba->fcf.fcf_rr_bmask);
8501
8502 /* Free the ELS sgl list */
8503 lpfc_free_active_sgl(phba);
8504 lpfc_free_els_sgl_list(phba);
8505 lpfc_free_nvmet_sgl_list(phba);
8506
8507 /* Free the completion queue EQ event pool */
8508 lpfc_sli4_cq_event_release_all(phba);
8509 lpfc_sli4_cq_event_pool_destroy(phba);
8510
8511 /* Release resource identifiers. */
8512 lpfc_sli4_dealloc_resource_identifiers(phba);
8513
8514 /* Free the bsmbx region. */
8515 lpfc_destroy_bootstrap_mbox(phba);
8516
8517 /* Free the SLI Layer memory with SLI4 HBAs */
8518 lpfc_mem_free_all(phba);
8519
8520 /* Free the current connect table */
8521 list_for_each_entry_safe(conn_entry, next_conn_entry,
8522 &phba->fcf_conn_rec_list, list) {
8523 list_del_init(&conn_entry->list);
8524 kfree(conn_entry);
8525 }
8526
8527 return;
8528 }
8529
8530 /**
8531 * lpfc_init_api_table_setup - Set up init api function jump table
8532 * @phba: The hba struct for which this call is being executed.
8533 * @dev_grp: The HBA PCI-Device group number.
8534 *
8535 * This routine sets up the device INIT interface API function jump table
8536 * in @phba struct.
8537 *
8538 * Returns: 0 - success, -ENODEV - failure.
8539 **/
8540 int
lpfc_init_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)8541 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8542 {
8543 phba->lpfc_hba_init_link = lpfc_hba_init_link;
8544 phba->lpfc_hba_down_link = lpfc_hba_down_link;
8545 phba->lpfc_selective_reset = lpfc_selective_reset;
8546 switch (dev_grp) {
8547 case LPFC_PCI_DEV_LP:
8548 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8549 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8550 phba->lpfc_stop_port = lpfc_stop_port_s3;
8551 break;
8552 case LPFC_PCI_DEV_OC:
8553 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8554 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8555 phba->lpfc_stop_port = lpfc_stop_port_s4;
8556 break;
8557 default:
8558 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8559 "1431 Invalid HBA PCI-device group: 0x%x\n",
8560 dev_grp);
8561 return -ENODEV;
8562 }
8563 return 0;
8564 }
8565
8566 /**
8567 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8568 * @phba: pointer to lpfc hba data structure.
8569 *
8570 * This routine is invoked to set up the driver internal resources after the
8571 * device specific resource setup to support the HBA device it attached to.
8572 *
8573 * Return codes
8574 * 0 - successful
8575 * other values - error
8576 **/
8577 static int
lpfc_setup_driver_resource_phase2(struct lpfc_hba * phba)8578 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8579 {
8580 int error;
8581
8582 /* Startup the kernel thread for this host adapter. */
8583 phba->worker_thread = kthread_run(lpfc_do_work, phba,
8584 "lpfc_worker_%d", phba->brd_no);
8585 if (IS_ERR(phba->worker_thread)) {
8586 error = PTR_ERR(phba->worker_thread);
8587 return error;
8588 }
8589
8590 return 0;
8591 }
8592
8593 /**
8594 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8595 * @phba: pointer to lpfc hba data structure.
8596 *
8597 * This routine is invoked to unset the driver internal resources set up after
8598 * the device specific resource setup for supporting the HBA device it
8599 * attached to.
8600 **/
8601 static void
lpfc_unset_driver_resource_phase2(struct lpfc_hba * phba)8602 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8603 {
8604 if (phba->wq) {
8605 destroy_workqueue(phba->wq);
8606 phba->wq = NULL;
8607 }
8608
8609 /* Stop kernel worker thread */
8610 if (phba->worker_thread)
8611 kthread_stop(phba->worker_thread);
8612 }
8613
8614 /**
8615 * lpfc_free_iocb_list - Free iocb list.
8616 * @phba: pointer to lpfc hba data structure.
8617 *
8618 * This routine is invoked to free the driver's IOCB list and memory.
8619 **/
8620 void
lpfc_free_iocb_list(struct lpfc_hba * phba)8621 lpfc_free_iocb_list(struct lpfc_hba *phba)
8622 {
8623 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8624
8625 spin_lock_irq(&phba->hbalock);
8626 list_for_each_entry_safe(iocbq_entry, iocbq_next,
8627 &phba->lpfc_iocb_list, list) {
8628 list_del(&iocbq_entry->list);
8629 kfree(iocbq_entry);
8630 phba->total_iocbq_bufs--;
8631 }
8632 spin_unlock_irq(&phba->hbalock);
8633
8634 return;
8635 }
8636
8637 /**
8638 * lpfc_init_iocb_list - Allocate and initialize iocb list.
8639 * @phba: pointer to lpfc hba data structure.
8640 * @iocb_count: number of requested iocbs
8641 *
8642 * This routine is invoked to allocate and initizlize the driver's IOCB
8643 * list and set up the IOCB tag array accordingly.
8644 *
8645 * Return codes
8646 * 0 - successful
8647 * other values - error
8648 **/
8649 int
lpfc_init_iocb_list(struct lpfc_hba * phba,int iocb_count)8650 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8651 {
8652 struct lpfc_iocbq *iocbq_entry = NULL;
8653 uint16_t iotag;
8654 int i;
8655
8656 /* Initialize and populate the iocb list per host. */
8657 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8658 for (i = 0; i < iocb_count; i++) {
8659 iocbq_entry = kzalloc_obj(struct lpfc_iocbq);
8660 if (iocbq_entry == NULL) {
8661 printk(KERN_ERR "%s: only allocated %d iocbs of "
8662 "expected %d count. Unloading driver.\n",
8663 __func__, i, iocb_count);
8664 goto out_free_iocbq;
8665 }
8666
8667 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8668 if (iotag == 0) {
8669 kfree(iocbq_entry);
8670 printk(KERN_ERR "%s: failed to allocate IOTAG. "
8671 "Unloading driver.\n", __func__);
8672 goto out_free_iocbq;
8673 }
8674 iocbq_entry->sli4_lxritag = NO_XRI;
8675 iocbq_entry->sli4_xritag = NO_XRI;
8676
8677 spin_lock_irq(&phba->hbalock);
8678 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8679 phba->total_iocbq_bufs++;
8680 spin_unlock_irq(&phba->hbalock);
8681 }
8682
8683 return 0;
8684
8685 out_free_iocbq:
8686 lpfc_free_iocb_list(phba);
8687
8688 return -ENOMEM;
8689 }
8690
8691 /**
8692 * lpfc_free_sgl_list - Free a given sgl list.
8693 * @phba: pointer to lpfc hba data structure.
8694 * @sglq_list: pointer to the head of sgl list.
8695 *
8696 * This routine is invoked to free a give sgl list and memory.
8697 **/
8698 void
lpfc_free_sgl_list(struct lpfc_hba * phba,struct list_head * sglq_list)8699 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8700 {
8701 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8702
8703 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8704 list_del(&sglq_entry->list);
8705 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8706 kfree(sglq_entry);
8707 }
8708 }
8709
8710 /**
8711 * lpfc_free_els_sgl_list - Free els sgl list.
8712 * @phba: pointer to lpfc hba data structure.
8713 *
8714 * This routine is invoked to free the driver's els sgl list and memory.
8715 **/
8716 static void
lpfc_free_els_sgl_list(struct lpfc_hba * phba)8717 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8718 {
8719 LIST_HEAD(sglq_list);
8720
8721 /* Retrieve all els sgls from driver list */
8722 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8723 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8724 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8725
8726 /* Now free the sgl list */
8727 lpfc_free_sgl_list(phba, &sglq_list);
8728 }
8729
8730 /**
8731 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8732 * @phba: pointer to lpfc hba data structure.
8733 *
8734 * This routine is invoked to free the driver's nvmet sgl list and memory.
8735 **/
8736 static void
lpfc_free_nvmet_sgl_list(struct lpfc_hba * phba)8737 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8738 {
8739 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8740 LIST_HEAD(sglq_list);
8741
8742 /* Retrieve all nvmet sgls from driver list */
8743 spin_lock_irq(&phba->hbalock);
8744 spin_lock(&phba->sli4_hba.sgl_list_lock);
8745 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8746 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8747 spin_unlock_irq(&phba->hbalock);
8748
8749 /* Now free the sgl list */
8750 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8751 list_del(&sglq_entry->list);
8752 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8753 kfree(sglq_entry);
8754 }
8755
8756 /* Update the nvmet_xri_cnt to reflect no current sgls.
8757 * The next initialization cycle sets the count and allocates
8758 * the sgls over again.
8759 */
8760 phba->sli4_hba.nvmet_xri_cnt = 0;
8761 }
8762
8763 /**
8764 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8765 * @phba: pointer to lpfc hba data structure.
8766 *
8767 * This routine is invoked to allocate the driver's active sgl memory.
8768 * This array will hold the sglq_entry's for active IOs.
8769 **/
8770 static int
lpfc_init_active_sgl_array(struct lpfc_hba * phba)8771 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8772 {
8773 int size;
8774 size = sizeof(struct lpfc_sglq *);
8775 size *= phba->sli4_hba.max_cfg_param.max_xri;
8776
8777 phba->sli4_hba.lpfc_sglq_active_list =
8778 kzalloc(size, GFP_KERNEL);
8779 if (!phba->sli4_hba.lpfc_sglq_active_list)
8780 return -ENOMEM;
8781 return 0;
8782 }
8783
8784 /**
8785 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8786 * @phba: pointer to lpfc hba data structure.
8787 *
8788 * This routine is invoked to walk through the array of active sglq entries
8789 * and free all of the resources.
8790 * This is just a place holder for now.
8791 **/
8792 static void
lpfc_free_active_sgl(struct lpfc_hba * phba)8793 lpfc_free_active_sgl(struct lpfc_hba *phba)
8794 {
8795 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8796 }
8797
8798 /**
8799 * lpfc_init_sgl_list - Allocate and initialize sgl list.
8800 * @phba: pointer to lpfc hba data structure.
8801 *
8802 * This routine is invoked to allocate and initizlize the driver's sgl
8803 * list and set up the sgl xritag tag array accordingly.
8804 *
8805 **/
8806 static void
lpfc_init_sgl_list(struct lpfc_hba * phba)8807 lpfc_init_sgl_list(struct lpfc_hba *phba)
8808 {
8809 /* Initialize and populate the sglq list per host/VF. */
8810 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8811 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8812 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8813 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8814
8815 /* els xri-sgl book keeping */
8816 phba->sli4_hba.els_xri_cnt = 0;
8817
8818 /* nvme xri-buffer book keeping */
8819 phba->sli4_hba.io_xri_cnt = 0;
8820 }
8821
8822 /**
8823 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8824 * @phba: pointer to lpfc hba data structure.
8825 *
8826 * This routine is invoked to post rpi header templates to the
8827 * port for those SLI4 ports that do not support extents. This routine
8828 * posts a PAGE_SIZE memory region to the port to hold up to
8829 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
8830 * and should be called only when interrupts are disabled.
8831 *
8832 * Return codes
8833 * 0 - successful
8834 * -ERROR - otherwise.
8835 **/
8836 int
lpfc_sli4_init_rpi_hdrs(struct lpfc_hba * phba)8837 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8838 {
8839 int rc = 0;
8840 struct lpfc_rpi_hdr *rpi_hdr;
8841
8842 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8843 if (!phba->sli4_hba.rpi_hdrs_in_use)
8844 return rc;
8845 if (phba->sli4_hba.extents_in_use)
8846 return -EIO;
8847
8848 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8849 if (!rpi_hdr) {
8850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8851 "0391 Error during rpi post operation\n");
8852 lpfc_sli4_remove_rpis(phba);
8853 rc = -ENODEV;
8854 }
8855
8856 return rc;
8857 }
8858
8859 /**
8860 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8861 * @phba: pointer to lpfc hba data structure.
8862 *
8863 * This routine is invoked to allocate a single 4KB memory region to
8864 * support rpis and stores them in the phba. This single region
8865 * provides support for up to 64 rpis. The region is used globally
8866 * by the device.
8867 *
8868 * Returns:
8869 * A valid rpi hdr on success.
8870 * A NULL pointer on any failure.
8871 **/
8872 struct lpfc_rpi_hdr *
lpfc_sli4_create_rpi_hdr(struct lpfc_hba * phba)8873 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8874 {
8875 uint16_t rpi_limit, curr_rpi_range;
8876 struct lpfc_dmabuf *dmabuf;
8877 struct lpfc_rpi_hdr *rpi_hdr;
8878
8879 /*
8880 * If the SLI4 port supports extents, posting the rpi header isn't
8881 * required. Set the expected maximum count and let the actual value
8882 * get set when extents are fully allocated.
8883 */
8884 if (!phba->sli4_hba.rpi_hdrs_in_use)
8885 return NULL;
8886 if (phba->sli4_hba.extents_in_use)
8887 return NULL;
8888
8889 /* The limit on the logical index is just the max_rpi count. */
8890 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8891
8892 spin_lock_irq(&phba->hbalock);
8893 /*
8894 * Establish the starting RPI in this header block. The starting
8895 * rpi is normalized to a zero base because the physical rpi is
8896 * port based.
8897 */
8898 curr_rpi_range = phba->sli4_hba.next_rpi;
8899 spin_unlock_irq(&phba->hbalock);
8900
8901 /* Reached full RPI range */
8902 if (curr_rpi_range == rpi_limit)
8903 return NULL;
8904
8905 /*
8906 * First allocate the protocol header region for the port. The
8907 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8908 */
8909 dmabuf = kzalloc_obj(struct lpfc_dmabuf);
8910 if (!dmabuf)
8911 return NULL;
8912
8913 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8914 LPFC_HDR_TEMPLATE_SIZE,
8915 &dmabuf->phys, GFP_KERNEL);
8916 if (!dmabuf->virt) {
8917 rpi_hdr = NULL;
8918 goto err_free_dmabuf;
8919 }
8920
8921 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8922 rpi_hdr = NULL;
8923 goto err_free_coherent;
8924 }
8925
8926 /* Save the rpi header data for cleanup later. */
8927 rpi_hdr = kzalloc_obj(struct lpfc_rpi_hdr);
8928 if (!rpi_hdr)
8929 goto err_free_coherent;
8930
8931 rpi_hdr->dmabuf = dmabuf;
8932 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8933 rpi_hdr->page_count = 1;
8934 spin_lock_irq(&phba->hbalock);
8935
8936 /* The rpi_hdr stores the logical index only. */
8937 rpi_hdr->start_rpi = curr_rpi_range;
8938 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8939 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8940
8941 spin_unlock_irq(&phba->hbalock);
8942 return rpi_hdr;
8943
8944 err_free_coherent:
8945 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8946 dmabuf->virt, dmabuf->phys);
8947 err_free_dmabuf:
8948 kfree(dmabuf);
8949 return NULL;
8950 }
8951
8952 /**
8953 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8954 * @phba: pointer to lpfc hba data structure.
8955 *
8956 * This routine is invoked to remove all memory resources allocated
8957 * to support rpis for SLI4 ports not supporting extents. This routine
8958 * presumes the caller has released all rpis consumed by fabric or port
8959 * logins and is prepared to have the header pages removed.
8960 **/
8961 void
lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba * phba)8962 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8963 {
8964 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8965
8966 if (!phba->sli4_hba.rpi_hdrs_in_use)
8967 goto exit;
8968
8969 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8970 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8971 list_del(&rpi_hdr->list);
8972 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8973 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8974 kfree(rpi_hdr->dmabuf);
8975 kfree(rpi_hdr);
8976 }
8977 exit:
8978 /* There are no rpis available to the port now. */
8979 phba->sli4_hba.next_rpi = 0;
8980 }
8981
8982 /**
8983 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
8984 * @pdev: pointer to pci device data structure.
8985 *
8986 * This routine is invoked to allocate the driver hba data structure for an
8987 * HBA device. If the allocation is successful, the phba reference to the
8988 * PCI device data structure is set.
8989 *
8990 * Return codes
8991 * pointer to @phba - successful
8992 * NULL - error
8993 **/
8994 static struct lpfc_hba *
lpfc_hba_alloc(struct pci_dev * pdev)8995 lpfc_hba_alloc(struct pci_dev *pdev)
8996 {
8997 struct lpfc_hba *phba;
8998
8999 /* Allocate memory for HBA structure */
9000 phba = kzalloc_obj(struct lpfc_hba);
9001 if (!phba) {
9002 dev_err(&pdev->dev, "failed to allocate hba struct\n");
9003 return NULL;
9004 }
9005
9006 /* Set reference to PCI device in HBA structure */
9007 phba->pcidev = pdev;
9008
9009 /* Assign an unused board number */
9010 phba->brd_no = lpfc_get_instance();
9011 if (phba->brd_no < 0) {
9012 kfree(phba);
9013 return NULL;
9014 }
9015 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9016
9017 spin_lock_init(&phba->ct_ev_lock);
9018 INIT_LIST_HEAD(&phba->ct_ev_waiters);
9019
9020 return phba;
9021 }
9022
9023 /**
9024 * lpfc_hba_free - Free driver hba data structure with a device.
9025 * @phba: pointer to lpfc hba data structure.
9026 *
9027 * This routine is invoked to free the driver hba data structure with an
9028 * HBA device.
9029 **/
9030 static void
lpfc_hba_free(struct lpfc_hba * phba)9031 lpfc_hba_free(struct lpfc_hba *phba)
9032 {
9033 if (phba->sli_rev == LPFC_SLI_REV4)
9034 kfree(phba->sli4_hba.hdwq);
9035
9036 /* Release the driver assigned board number */
9037 idr_remove(&lpfc_hba_index, phba->brd_no);
9038
9039 /* Free memory allocated with sli3 rings */
9040 kfree(phba->sli.sli3_ring);
9041 phba->sli.sli3_ring = NULL;
9042
9043 kfree(phba);
9044 return;
9045 }
9046
9047 /**
9048 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9049 * @vport: pointer to lpfc vport data structure.
9050 *
9051 * This routine is will setup initial FDMI attribute masks for
9052 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9053 * to get these attributes first before falling back, the attribute
9054 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9055 **/
9056 void
lpfc_setup_fdmi_mask(struct lpfc_vport * vport)9057 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9058 {
9059 struct lpfc_hba *phba = vport->phba;
9060
9061 set_bit(FC_ALLOW_FDMI, &vport->load_flag);
9062 if (phba->cfg_enable_SmartSAN ||
9063 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9064 /* Setup appropriate attribute masks */
9065 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9066 if (phba->cfg_enable_SmartSAN)
9067 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9068 else
9069 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9070 }
9071
9072 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
9073 "6077 Setup FDMI mask: hba x%x port x%x\n",
9074 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9075 }
9076
9077 /**
9078 * lpfc_create_shost - Create hba physical port with associated scsi host.
9079 * @phba: pointer to lpfc hba data structure.
9080 *
9081 * This routine is invoked to create HBA physical port and associate a SCSI
9082 * host with it.
9083 *
9084 * Return codes
9085 * 0 - successful
9086 * other values - error
9087 **/
9088 static int
lpfc_create_shost(struct lpfc_hba * phba)9089 lpfc_create_shost(struct lpfc_hba *phba)
9090 {
9091 struct lpfc_vport *vport;
9092 struct Scsi_Host *shost;
9093
9094 /* Initialize HBA FC structure */
9095 phba->fc_edtov = FF_DEF_EDTOV;
9096 phba->fc_ratov = FF_DEF_RATOV;
9097 phba->fc_altov = FF_DEF_ALTOV;
9098 phba->fc_arbtov = FF_DEF_ARBTOV;
9099
9100 atomic_set(&phba->sdev_cnt, 0);
9101 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9102 if (!vport)
9103 return -ENODEV;
9104
9105 shost = lpfc_shost_from_vport(vport);
9106 phba->pport = vport;
9107
9108 if (phba->nvmet_support) {
9109 /* Only 1 vport (pport) will support NVME target */
9110 phba->targetport = NULL;
9111 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9112 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9113 "6076 NVME Target Found\n");
9114 }
9115
9116 lpfc_debugfs_initialize(vport);
9117 /* Put reference to SCSI host to driver's device private data */
9118 pci_set_drvdata(phba->pcidev, shost);
9119
9120 lpfc_setup_fdmi_mask(vport);
9121
9122 /*
9123 * At this point we are fully registered with PSA. In addition,
9124 * any initial discovery should be completed.
9125 */
9126 return 0;
9127 }
9128
9129 /**
9130 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9131 * @phba: pointer to lpfc hba data structure.
9132 *
9133 * This routine is invoked to destroy HBA physical port and the associated
9134 * SCSI host.
9135 **/
9136 static void
lpfc_destroy_shost(struct lpfc_hba * phba)9137 lpfc_destroy_shost(struct lpfc_hba *phba)
9138 {
9139 struct lpfc_vport *vport = phba->pport;
9140
9141 /* Destroy physical port that associated with the SCSI host */
9142 destroy_port(vport);
9143
9144 return;
9145 }
9146
9147 /**
9148 * lpfc_setup_bg - Setup Block guard structures and debug areas.
9149 * @phba: pointer to lpfc hba data structure.
9150 * @shost: the shost to be used to detect Block guard settings.
9151 *
9152 * This routine sets up the local Block guard protocol settings for @shost.
9153 * This routine also allocates memory for debugging bg buffers.
9154 **/
9155 static void
lpfc_setup_bg(struct lpfc_hba * phba,struct Scsi_Host * shost)9156 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9157 {
9158 uint32_t old_mask;
9159 uint32_t old_guard;
9160
9161 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9162 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9163 "1478 Registering BlockGuard with the "
9164 "SCSI layer\n");
9165
9166 old_mask = phba->cfg_prot_mask;
9167 old_guard = phba->cfg_prot_guard;
9168
9169 /* Only allow supported values */
9170 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9171 SHOST_DIX_TYPE0_PROTECTION |
9172 SHOST_DIX_TYPE1_PROTECTION);
9173 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9174 SHOST_DIX_GUARD_CRC);
9175
9176 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
9177 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9178 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9179
9180 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9181 if ((old_mask != phba->cfg_prot_mask) ||
9182 (old_guard != phba->cfg_prot_guard))
9183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9184 "1475 Registering BlockGuard with the "
9185 "SCSI layer: mask %d guard %d\n",
9186 phba->cfg_prot_mask,
9187 phba->cfg_prot_guard);
9188
9189 scsi_host_set_prot(shost, phba->cfg_prot_mask);
9190 scsi_host_set_guard(shost, phba->cfg_prot_guard);
9191 } else
9192 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9193 "1479 Not Registering BlockGuard with the SCSI "
9194 "layer, Bad protection parameters: %d %d\n",
9195 old_mask, old_guard);
9196 }
9197 }
9198
9199 /**
9200 * lpfc_post_init_setup - Perform necessary device post initialization setup.
9201 * @phba: pointer to lpfc hba data structure.
9202 *
9203 * This routine is invoked to perform all the necessary post initialization
9204 * setup for the device.
9205 **/
9206 static void
lpfc_post_init_setup(struct lpfc_hba * phba)9207 lpfc_post_init_setup(struct lpfc_hba *phba)
9208 {
9209 struct Scsi_Host *shost;
9210 struct lpfc_adapter_event_header adapter_event;
9211
9212 /* Get the default values for Model Name and Description */
9213 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9214
9215 /*
9216 * hba setup may have changed the hba_queue_depth so we need to
9217 * adjust the value of can_queue.
9218 */
9219 shost = pci_get_drvdata(phba->pcidev);
9220 shost->can_queue = phba->cfg_hba_queue_depth - 10;
9221
9222 lpfc_host_attrib_init(shost);
9223
9224 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9225 spin_lock_irq(shost->host_lock);
9226 lpfc_poll_start_timer(phba);
9227 spin_unlock_irq(shost->host_lock);
9228 }
9229
9230 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9231 "0428 Perform SCSI scan\n");
9232 /* Send board arrival event to upper layer */
9233 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9234 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9235 fc_host_post_vendor_event(shost, fc_get_event_number(),
9236 sizeof(adapter_event),
9237 (char *) &adapter_event,
9238 LPFC_NL_VENDOR_ID);
9239 return;
9240 }
9241
9242 /**
9243 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9244 * @phba: pointer to lpfc hba data structure.
9245 *
9246 * This routine is invoked to set up the PCI device memory space for device
9247 * with SLI-3 interface spec.
9248 *
9249 * Return codes
9250 * 0 - successful
9251 * other values - error
9252 **/
9253 static int
lpfc_sli_pci_mem_setup(struct lpfc_hba * phba)9254 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9255 {
9256 struct pci_dev *pdev = phba->pcidev;
9257 unsigned long bar0map_len, bar2map_len;
9258 int i, hbq_count;
9259 void *ptr;
9260 int error;
9261
9262 if (!pdev)
9263 return -ENODEV;
9264
9265 /* Set the device DMA mask size */
9266 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9267 if (error)
9268 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9269 if (error)
9270 return error;
9271 error = -ENODEV;
9272
9273 /* Get the bus address of Bar0 and Bar2 and the number of bytes
9274 * required by each mapping.
9275 */
9276 phba->pci_bar0_map = pci_resource_start(pdev, 0);
9277 bar0map_len = pci_resource_len(pdev, 0);
9278
9279 phba->pci_bar2_map = pci_resource_start(pdev, 2);
9280 bar2map_len = pci_resource_len(pdev, 2);
9281
9282 /* Map HBA SLIM to a kernel virtual address. */
9283 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9284 if (!phba->slim_memmap_p) {
9285 dev_printk(KERN_ERR, &pdev->dev,
9286 "ioremap failed for SLIM memory.\n");
9287 goto out;
9288 }
9289
9290 /* Map HBA Control Registers to a kernel virtual address. */
9291 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9292 if (!phba->ctrl_regs_memmap_p) {
9293 dev_printk(KERN_ERR, &pdev->dev,
9294 "ioremap failed for HBA control registers.\n");
9295 goto out_iounmap_slim;
9296 }
9297
9298 /* Allocate memory for SLI-2 structures */
9299 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9300 &phba->slim2p.phys, GFP_KERNEL);
9301 if (!phba->slim2p.virt)
9302 goto out_iounmap;
9303
9304 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9305 phba->mbox_ext = (phba->slim2p.virt +
9306 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9307 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9308 phba->IOCBs = (phba->slim2p.virt +
9309 offsetof(struct lpfc_sli2_slim, IOCBs));
9310
9311 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9312 lpfc_sli_hbq_size(),
9313 &phba->hbqslimp.phys,
9314 GFP_KERNEL);
9315 if (!phba->hbqslimp.virt)
9316 goto out_free_slim;
9317
9318 hbq_count = lpfc_sli_hbq_count();
9319 ptr = phba->hbqslimp.virt;
9320 for (i = 0; i < hbq_count; ++i) {
9321 phba->hbqs[i].hbq_virt = ptr;
9322 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9323 ptr += (lpfc_hbq_defs[i]->entry_count *
9324 sizeof(struct lpfc_hbq_entry));
9325 }
9326 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9327 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9328
9329 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9330
9331 phba->MBslimaddr = phba->slim_memmap_p;
9332 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9333 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9334 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9335 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9336
9337 return 0;
9338
9339 out_free_slim:
9340 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9341 phba->slim2p.virt, phba->slim2p.phys);
9342 out_iounmap:
9343 iounmap(phba->ctrl_regs_memmap_p);
9344 out_iounmap_slim:
9345 iounmap(phba->slim_memmap_p);
9346 out:
9347 return error;
9348 }
9349
9350 /**
9351 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9352 * @phba: pointer to lpfc hba data structure.
9353 *
9354 * This routine is invoked to unset the PCI device memory space for device
9355 * with SLI-3 interface spec.
9356 **/
9357 static void
lpfc_sli_pci_mem_unset(struct lpfc_hba * phba)9358 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9359 {
9360 struct pci_dev *pdev;
9361
9362 /* Obtain PCI device reference */
9363 if (!phba->pcidev)
9364 return;
9365 else
9366 pdev = phba->pcidev;
9367
9368 /* Free coherent DMA memory allocated */
9369 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9370 phba->hbqslimp.virt, phba->hbqslimp.phys);
9371 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9372 phba->slim2p.virt, phba->slim2p.phys);
9373
9374 /* I/O memory unmap */
9375 iounmap(phba->ctrl_regs_memmap_p);
9376 iounmap(phba->slim_memmap_p);
9377
9378 return;
9379 }
9380
9381 /**
9382 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9383 * @phba: pointer to lpfc hba data structure.
9384 *
9385 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9386 * done and check status.
9387 *
9388 * Return 0 if successful, otherwise -ENODEV.
9389 **/
9390 int
lpfc_sli4_post_status_check(struct lpfc_hba * phba)9391 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9392 {
9393 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9394 struct lpfc_register reg_data;
9395 int i, port_error = 0;
9396 uint32_t if_type;
9397
9398 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9399 memset(®_data, 0, sizeof(reg_data));
9400 if (!phba->sli4_hba.PSMPHRregaddr)
9401 return -ENODEV;
9402
9403 /* Wait up to 30 seconds for the SLI Port POST done and ready */
9404 for (i = 0; i < 3000; i++) {
9405 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9406 &portsmphr_reg.word0) ||
9407 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9408 /* Port has a fatal POST error, break out */
9409 port_error = -ENODEV;
9410 break;
9411 }
9412 if (LPFC_POST_STAGE_PORT_READY ==
9413 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9414 break;
9415 msleep(10);
9416 }
9417
9418 /*
9419 * If there was a port error during POST, then don't proceed with
9420 * other register reads as the data may not be valid. Just exit.
9421 */
9422 if (port_error) {
9423 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9424 "1408 Port Failed POST - portsmphr=0x%x, "
9425 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9426 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9427 portsmphr_reg.word0,
9428 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9429 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9430 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9431 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9432 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9433 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9434 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9435 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9436 } else {
9437 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9438 "2534 Device Info: SLIFamily=0x%x, "
9439 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9440 "SLIHint_2=0x%x, FT=0x%x\n",
9441 bf_get(lpfc_sli_intf_sli_family,
9442 &phba->sli4_hba.sli_intf),
9443 bf_get(lpfc_sli_intf_slirev,
9444 &phba->sli4_hba.sli_intf),
9445 bf_get(lpfc_sli_intf_if_type,
9446 &phba->sli4_hba.sli_intf),
9447 bf_get(lpfc_sli_intf_sli_hint1,
9448 &phba->sli4_hba.sli_intf),
9449 bf_get(lpfc_sli_intf_sli_hint2,
9450 &phba->sli4_hba.sli_intf),
9451 bf_get(lpfc_sli_intf_func_type,
9452 &phba->sli4_hba.sli_intf));
9453 /*
9454 * Check for other Port errors during the initialization
9455 * process. Fail the load if the port did not come up
9456 * correctly.
9457 */
9458 if_type = bf_get(lpfc_sli_intf_if_type,
9459 &phba->sli4_hba.sli_intf);
9460 switch (if_type) {
9461 case LPFC_SLI_INTF_IF_TYPE_0:
9462 phba->sli4_hba.ue_mask_lo =
9463 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9464 phba->sli4_hba.ue_mask_hi =
9465 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9466 uerrlo_reg.word0 =
9467 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9468 uerrhi_reg.word0 =
9469 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9470 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9471 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9472 lpfc_printf_log(phba, KERN_ERR,
9473 LOG_TRACE_EVENT,
9474 "1422 Unrecoverable Error "
9475 "Detected during POST "
9476 "uerr_lo_reg=0x%x, "
9477 "uerr_hi_reg=0x%x, "
9478 "ue_mask_lo_reg=0x%x, "
9479 "ue_mask_hi_reg=0x%x\n",
9480 uerrlo_reg.word0,
9481 uerrhi_reg.word0,
9482 phba->sli4_hba.ue_mask_lo,
9483 phba->sli4_hba.ue_mask_hi);
9484 port_error = -ENODEV;
9485 }
9486 break;
9487 case LPFC_SLI_INTF_IF_TYPE_2:
9488 case LPFC_SLI_INTF_IF_TYPE_6:
9489 /* Final checks. The port status should be clean. */
9490 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9491 ®_data.word0) ||
9492 lpfc_sli4_unrecoverable_port(®_data)) {
9493 phba->work_status[0] =
9494 readl(phba->sli4_hba.u.if_type2.
9495 ERR1regaddr);
9496 phba->work_status[1] =
9497 readl(phba->sli4_hba.u.if_type2.
9498 ERR2regaddr);
9499 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9500 "2888 Unrecoverable port error "
9501 "following POST: port status reg "
9502 "0x%x, port_smphr reg 0x%x, "
9503 "error 1=0x%x, error 2=0x%x\n",
9504 reg_data.word0,
9505 portsmphr_reg.word0,
9506 phba->work_status[0],
9507 phba->work_status[1]);
9508 port_error = -ENODEV;
9509 break;
9510 }
9511
9512 if (lpfc_pldv_detect &&
9513 bf_get(lpfc_sli_intf_sli_family,
9514 &phba->sli4_hba.sli_intf) ==
9515 LPFC_SLI_INTF_FAMILY_G6)
9516 pci_write_config_byte(phba->pcidev,
9517 LPFC_SLI_INTF, CFG_PLD);
9518 break;
9519 case LPFC_SLI_INTF_IF_TYPE_1:
9520 default:
9521 break;
9522 }
9523 }
9524 return port_error;
9525 }
9526
9527 /**
9528 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9529 * @phba: pointer to lpfc hba data structure.
9530 * @if_type: The SLI4 interface type getting configured.
9531 *
9532 * This routine is invoked to set up SLI4 BAR0 PCI config space register
9533 * memory map.
9534 **/
9535 static void
lpfc_sli4_bar0_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9536 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9537 {
9538 switch (if_type) {
9539 case LPFC_SLI_INTF_IF_TYPE_0:
9540 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9541 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9542 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9543 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9544 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9545 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9546 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9547 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9548 phba->sli4_hba.SLIINTFregaddr =
9549 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9550 break;
9551 case LPFC_SLI_INTF_IF_TYPE_2:
9552 phba->sli4_hba.u.if_type2.EQDregaddr =
9553 phba->sli4_hba.conf_regs_memmap_p +
9554 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9555 phba->sli4_hba.u.if_type2.ERR1regaddr =
9556 phba->sli4_hba.conf_regs_memmap_p +
9557 LPFC_CTL_PORT_ER1_OFFSET;
9558 phba->sli4_hba.u.if_type2.ERR2regaddr =
9559 phba->sli4_hba.conf_regs_memmap_p +
9560 LPFC_CTL_PORT_ER2_OFFSET;
9561 phba->sli4_hba.u.if_type2.CTRLregaddr =
9562 phba->sli4_hba.conf_regs_memmap_p +
9563 LPFC_CTL_PORT_CTL_OFFSET;
9564 phba->sli4_hba.u.if_type2.STATUSregaddr =
9565 phba->sli4_hba.conf_regs_memmap_p +
9566 LPFC_CTL_PORT_STA_OFFSET;
9567 phba->sli4_hba.SLIINTFregaddr =
9568 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9569 phba->sli4_hba.PSMPHRregaddr =
9570 phba->sli4_hba.conf_regs_memmap_p +
9571 LPFC_CTL_PORT_SEM_OFFSET;
9572 phba->sli4_hba.RQDBregaddr =
9573 phba->sli4_hba.conf_regs_memmap_p +
9574 LPFC_ULP0_RQ_DOORBELL;
9575 phba->sli4_hba.WQDBregaddr =
9576 phba->sli4_hba.conf_regs_memmap_p +
9577 LPFC_ULP0_WQ_DOORBELL;
9578 phba->sli4_hba.CQDBregaddr =
9579 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9580 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9581 phba->sli4_hba.MQDBregaddr =
9582 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9583 phba->sli4_hba.BMBXregaddr =
9584 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9585 break;
9586 case LPFC_SLI_INTF_IF_TYPE_6:
9587 phba->sli4_hba.u.if_type2.EQDregaddr =
9588 phba->sli4_hba.conf_regs_memmap_p +
9589 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9590 phba->sli4_hba.u.if_type2.ERR1regaddr =
9591 phba->sli4_hba.conf_regs_memmap_p +
9592 LPFC_CTL_PORT_ER1_OFFSET;
9593 phba->sli4_hba.u.if_type2.ERR2regaddr =
9594 phba->sli4_hba.conf_regs_memmap_p +
9595 LPFC_CTL_PORT_ER2_OFFSET;
9596 phba->sli4_hba.u.if_type2.CTRLregaddr =
9597 phba->sli4_hba.conf_regs_memmap_p +
9598 LPFC_CTL_PORT_CTL_OFFSET;
9599 phba->sli4_hba.u.if_type2.STATUSregaddr =
9600 phba->sli4_hba.conf_regs_memmap_p +
9601 LPFC_CTL_PORT_STA_OFFSET;
9602 phba->sli4_hba.PSMPHRregaddr =
9603 phba->sli4_hba.conf_regs_memmap_p +
9604 LPFC_CTL_PORT_SEM_OFFSET;
9605 phba->sli4_hba.BMBXregaddr =
9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9607 break;
9608 case LPFC_SLI_INTF_IF_TYPE_1:
9609 default:
9610 dev_printk(KERN_ERR, &phba->pcidev->dev,
9611 "FATAL - unsupported SLI4 interface type - %d\n",
9612 if_type);
9613 break;
9614 }
9615 }
9616
9617 /**
9618 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9619 * @phba: pointer to lpfc hba data structure.
9620 * @if_type: sli if type to operate on.
9621 *
9622 * This routine is invoked to set up SLI4 BAR1 register memory map.
9623 **/
9624 static void
lpfc_sli4_bar1_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9625 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9626 {
9627 switch (if_type) {
9628 case LPFC_SLI_INTF_IF_TYPE_0:
9629 phba->sli4_hba.PSMPHRregaddr =
9630 phba->sli4_hba.ctrl_regs_memmap_p +
9631 LPFC_SLIPORT_IF0_SMPHR;
9632 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9633 LPFC_HST_ISR0;
9634 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9635 LPFC_HST_IMR0;
9636 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9637 LPFC_HST_ISCR0;
9638 break;
9639 case LPFC_SLI_INTF_IF_TYPE_6:
9640 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9641 LPFC_IF6_RQ_DOORBELL;
9642 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9643 LPFC_IF6_WQ_DOORBELL;
9644 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9645 LPFC_IF6_CQ_DOORBELL;
9646 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9647 LPFC_IF6_EQ_DOORBELL;
9648 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9649 LPFC_IF6_MQ_DOORBELL;
9650 break;
9651 case LPFC_SLI_INTF_IF_TYPE_2:
9652 case LPFC_SLI_INTF_IF_TYPE_1:
9653 default:
9654 dev_err(&phba->pcidev->dev,
9655 "FATAL - unsupported SLI4 interface type - %d\n",
9656 if_type);
9657 break;
9658 }
9659 }
9660
9661 /**
9662 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9663 * @phba: pointer to lpfc hba data structure.
9664 * @vf: virtual function number
9665 *
9666 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9667 * based on the given viftual function number, @vf.
9668 *
9669 * Return 0 if successful, otherwise -ENODEV.
9670 **/
9671 static int
lpfc_sli4_bar2_register_memmap(struct lpfc_hba * phba,uint32_t vf)9672 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9673 {
9674 if (vf > LPFC_VIR_FUNC_MAX)
9675 return -ENODEV;
9676
9677 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9678 vf * LPFC_VFR_PAGE_SIZE +
9679 LPFC_ULP0_RQ_DOORBELL);
9680 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9681 vf * LPFC_VFR_PAGE_SIZE +
9682 LPFC_ULP0_WQ_DOORBELL);
9683 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9684 vf * LPFC_VFR_PAGE_SIZE +
9685 LPFC_EQCQ_DOORBELL);
9686 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9687 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9688 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9689 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9690 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9691 return 0;
9692 }
9693
9694 /**
9695 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9696 * @phba: pointer to lpfc hba data structure.
9697 *
9698 * This routine is invoked to create the bootstrap mailbox
9699 * region consistent with the SLI-4 interface spec. This
9700 * routine allocates all memory necessary to communicate
9701 * mailbox commands to the port and sets up all alignment
9702 * needs. No locks are expected to be held when calling
9703 * this routine.
9704 *
9705 * Return codes
9706 * 0 - successful
9707 * -ENOMEM - could not allocated memory.
9708 **/
9709 static int
lpfc_create_bootstrap_mbox(struct lpfc_hba * phba)9710 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9711 {
9712 uint32_t bmbx_size;
9713 struct lpfc_dmabuf *dmabuf;
9714 struct dma_address *dma_address;
9715 uint32_t pa_addr;
9716 uint64_t phys_addr;
9717
9718 dmabuf = kzalloc_obj(struct lpfc_dmabuf);
9719 if (!dmabuf)
9720 return -ENOMEM;
9721
9722 /*
9723 * The bootstrap mailbox region is comprised of 2 parts
9724 * plus an alignment restriction of 16 bytes.
9725 */
9726 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9727 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9728 &dmabuf->phys, GFP_KERNEL);
9729 if (!dmabuf->virt) {
9730 kfree(dmabuf);
9731 return -ENOMEM;
9732 }
9733
9734 /*
9735 * Initialize the bootstrap mailbox pointers now so that the register
9736 * operations are simple later. The mailbox dma address is required
9737 * to be 16-byte aligned. Also align the virtual memory as each
9738 * maibox is copied into the bmbx mailbox region before issuing the
9739 * command to the port.
9740 */
9741 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9742 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9743
9744 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9745 LPFC_ALIGN_16_BYTE);
9746 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9747 LPFC_ALIGN_16_BYTE);
9748
9749 /*
9750 * Set the high and low physical addresses now. The SLI4 alignment
9751 * requirement is 16 bytes and the mailbox is posted to the port
9752 * as two 30-bit addresses. The other data is a bit marking whether
9753 * the 30-bit address is the high or low address.
9754 * Upcast bmbx aphys to 64bits so shift instruction compiles
9755 * clean on 32 bit machines.
9756 */
9757 dma_address = &phba->sli4_hba.bmbx.dma_address;
9758 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9759 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9760 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9761 LPFC_BMBX_BIT1_ADDR_HI);
9762
9763 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9764 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9765 LPFC_BMBX_BIT1_ADDR_LO);
9766 return 0;
9767 }
9768
9769 /**
9770 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9771 * @phba: pointer to lpfc hba data structure.
9772 *
9773 * This routine is invoked to teardown the bootstrap mailbox
9774 * region and release all host resources. This routine requires
9775 * the caller to ensure all mailbox commands recovered, no
9776 * additional mailbox comands are sent, and interrupts are disabled
9777 * before calling this routine.
9778 *
9779 **/
9780 static void
lpfc_destroy_bootstrap_mbox(struct lpfc_hba * phba)9781 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9782 {
9783 dma_free_coherent(&phba->pcidev->dev,
9784 phba->sli4_hba.bmbx.bmbx_size,
9785 phba->sli4_hba.bmbx.dmabuf->virt,
9786 phba->sli4_hba.bmbx.dmabuf->phys);
9787
9788 kfree(phba->sli4_hba.bmbx.dmabuf);
9789 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9790 }
9791
9792 static const char * const lpfc_topo_to_str[] = {
9793 "Loop then P2P",
9794 "Loopback",
9795 "P2P Only",
9796 "Unsupported",
9797 "Loop Only",
9798 "Unsupported",
9799 "P2P then Loop",
9800 };
9801
9802 #define LINK_FLAGS_DEF 0x0
9803 #define LINK_FLAGS_P2P 0x1
9804 #define LINK_FLAGS_LOOP 0x2
9805 /**
9806 * lpfc_map_topology - Map the topology read from READ_CONFIG
9807 * @phba: pointer to lpfc hba data structure.
9808 * @rd_config: pointer to read config data
9809 *
9810 * This routine is invoked to map the topology values as read
9811 * from the read config mailbox command. If the persistent
9812 * topology feature is supported, the firmware will provide the
9813 * saved topology information to be used in INIT_LINK
9814 **/
9815 static void
lpfc_map_topology(struct lpfc_hba * phba,struct lpfc_mbx_read_config * rd_config)9816 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9817 {
9818 u8 ptv, tf, pt;
9819
9820 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9821 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9822 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9823
9824 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9825 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9826 ptv, tf, pt);
9827 if (!ptv) {
9828 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9829 "2019 FW does not support persistent topology "
9830 "Using driver parameter defined value [%s]",
9831 lpfc_topo_to_str[phba->cfg_topology]);
9832 return;
9833 }
9834 /* FW supports persistent topology - override module parameter value */
9835 set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9836
9837 /* if ASIC_GEN_NUM >= 0xC) */
9838 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9839 LPFC_SLI_INTF_IF_TYPE_6) ||
9840 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9841 LPFC_SLI_INTF_FAMILY_G6)) {
9842 if (!tf)
9843 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9844 ? FLAGS_TOPOLOGY_MODE_LOOP
9845 : FLAGS_TOPOLOGY_MODE_PT_PT);
9846 else
9847 clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9848 } else { /* G5 */
9849 if (tf)
9850 /* If topology failover set - pt is '0' or '1' */
9851 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9852 FLAGS_TOPOLOGY_MODE_LOOP_PT);
9853 else
9854 phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9855 ? FLAGS_TOPOLOGY_MODE_PT_PT
9856 : FLAGS_TOPOLOGY_MODE_LOOP);
9857 }
9858 if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag))
9859 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9860 "2020 Using persistent topology value [%s]",
9861 lpfc_topo_to_str[phba->cfg_topology]);
9862 else
9863 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9864 "2021 Invalid topology values from FW "
9865 "Using driver parameter defined value [%s]",
9866 lpfc_topo_to_str[phba->cfg_topology]);
9867 }
9868
9869 /**
9870 * lpfc_sli4_read_config - Get the config parameters.
9871 * @phba: pointer to lpfc hba data structure.
9872 *
9873 * This routine is invoked to read the configuration parameters from the HBA.
9874 * The configuration parameters are used to set the base and maximum values
9875 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9876 * allocation for the port.
9877 *
9878 * Return codes
9879 * 0 - successful
9880 * -ENOMEM - No available memory
9881 * -EIO - The mailbox failed to complete successfully.
9882 **/
9883 int
lpfc_sli4_read_config(struct lpfc_hba * phba)9884 lpfc_sli4_read_config(struct lpfc_hba *phba)
9885 {
9886 LPFC_MBOXQ_t *pmb;
9887 struct lpfc_mbx_read_config *rd_config;
9888 union lpfc_sli4_cfg_shdr *shdr;
9889 uint32_t shdr_status, shdr_add_status;
9890 struct lpfc_mbx_get_func_cfg *get_func_cfg;
9891 struct lpfc_rsrc_desc_fcfcoe *desc;
9892 char *pdesc_0;
9893 uint16_t forced_link_speed;
9894 uint32_t if_type, qmin, fawwpn;
9895 int length, i, rc = 0, rc2;
9896
9897 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9898 if (!pmb) {
9899 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9900 "2011 Unable to allocate memory for issuing "
9901 "SLI_CONFIG_SPECIAL mailbox command\n");
9902 return -ENOMEM;
9903 }
9904
9905 lpfc_read_config(phba, pmb);
9906
9907 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9908 if (rc != MBX_SUCCESS) {
9909 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9910 "2012 Mailbox failed , mbxCmd x%x "
9911 "READ_CONFIG, mbxStatus x%x\n",
9912 bf_get(lpfc_mqe_command, &pmb->u.mqe),
9913 bf_get(lpfc_mqe_status, &pmb->u.mqe));
9914 rc = -EIO;
9915 } else {
9916 rd_config = &pmb->u.mqe.un.rd_config;
9917 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9918 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9919 phba->sli4_hba.lnk_info.lnk_tp =
9920 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9921 phba->sli4_hba.lnk_info.lnk_no =
9922 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9923 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9924 "3081 lnk_type:%d, lnk_numb:%d\n",
9925 phba->sli4_hba.lnk_info.lnk_tp,
9926 phba->sli4_hba.lnk_info.lnk_no);
9927 } else
9928 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9929 "3082 Mailbox (x%x) returned ldv:x0\n",
9930 bf_get(lpfc_mqe_command, &pmb->u.mqe));
9931 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9932 phba->bbcredit_support = 1;
9933 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9934 }
9935
9936 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9937
9938 if (fawwpn) {
9939 lpfc_printf_log(phba, KERN_INFO,
9940 LOG_INIT | LOG_DISCOVERY,
9941 "2702 READ_CONFIG: FA-PWWN is "
9942 "configured on\n");
9943 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9944 } else {
9945 /* Clear FW configured flag, preserve driver flag */
9946 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9947 }
9948
9949 phba->sli4_hba.conf_trunk =
9950 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9951 phba->sli4_hba.extents_in_use =
9952 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9953
9954 phba->sli4_hba.max_cfg_param.max_xri =
9955 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9956 /* Reduce resource usage in kdump environment */
9957 if (is_kdump_kernel() &&
9958 phba->sli4_hba.max_cfg_param.max_xri > 512)
9959 phba->sli4_hba.max_cfg_param.max_xri = 512;
9960 phba->sli4_hba.max_cfg_param.xri_base =
9961 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9962 phba->sli4_hba.max_cfg_param.max_vpi =
9963 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9964 /* Limit the max we support */
9965 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9966 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9967 phba->sli4_hba.max_cfg_param.vpi_base =
9968 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9969 phba->sli4_hba.max_cfg_param.max_rpi =
9970 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9971 phba->sli4_hba.max_cfg_param.rpi_base =
9972 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9973 phba->sli4_hba.max_cfg_param.max_vfi =
9974 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
9975 phba->sli4_hba.max_cfg_param.vfi_base =
9976 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
9977 phba->sli4_hba.max_cfg_param.max_fcfi =
9978 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
9979 phba->sli4_hba.max_cfg_param.max_eq =
9980 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
9981 phba->sli4_hba.max_cfg_param.max_rq =
9982 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
9983 phba->sli4_hba.max_cfg_param.max_wq =
9984 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
9985 phba->sli4_hba.max_cfg_param.max_cq =
9986 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
9987 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
9988 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
9989 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
9990 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
9991 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
9992 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
9993 phba->max_vports = phba->max_vpi;
9994
9995 if (bf_get(lpfc_mbx_rd_conf_fedif, rd_config))
9996 phba->sli4_hba.encryption_support = true;
9997 else
9998 phba->sli4_hba.encryption_support = false;
9999
10000 /* Next decide on FPIN or Signal E2E CGN support
10001 * For congestion alarms and warnings valid combination are:
10002 * 1. FPIN alarms / FPIN warnings
10003 * 2. Signal alarms / Signal warnings
10004 * 3. FPIN alarms / Signal warnings
10005 * 4. Signal alarms / FPIN warnings
10006 *
10007 * Initialize the adapter frequency to 100 mSecs
10008 */
10009 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10010 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10011 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10012
10013 if (lpfc_use_cgn_signal) {
10014 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10015 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10016 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10017 }
10018 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10019 /* MUST support both alarm and warning
10020 * because EDC does not support alarm alone.
10021 */
10022 if (phba->cgn_reg_signal !=
10023 EDC_CG_SIG_WARN_ONLY) {
10024 /* Must support both or none */
10025 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10026 phba->cgn_reg_signal =
10027 EDC_CG_SIG_NOTSUPPORTED;
10028 } else {
10029 phba->cgn_reg_signal =
10030 EDC_CG_SIG_WARN_ALARM;
10031 phba->cgn_reg_fpin =
10032 LPFC_CGN_FPIN_NONE;
10033 }
10034 }
10035 }
10036
10037 /* Set the congestion initial signal and fpin values. */
10038 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10039 phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10040
10041 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10042 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10043 phba->cgn_reg_signal, phba->cgn_reg_fpin);
10044
10045 lpfc_map_topology(phba, rd_config);
10046 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10047 "2003 cfg params Extents? %d "
10048 "XRI(B:%d M:%d), "
10049 "VPI(B:%d M:%d) "
10050 "VFI(B:%d M:%d) "
10051 "RPI(B:%d M:%d) "
10052 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10053 phba->sli4_hba.extents_in_use,
10054 phba->sli4_hba.max_cfg_param.xri_base,
10055 phba->sli4_hba.max_cfg_param.max_xri,
10056 phba->sli4_hba.max_cfg_param.vpi_base,
10057 phba->sli4_hba.max_cfg_param.max_vpi,
10058 phba->sli4_hba.max_cfg_param.vfi_base,
10059 phba->sli4_hba.max_cfg_param.max_vfi,
10060 phba->sli4_hba.max_cfg_param.rpi_base,
10061 phba->sli4_hba.max_cfg_param.max_rpi,
10062 phba->sli4_hba.max_cfg_param.max_fcfi,
10063 phba->sli4_hba.max_cfg_param.max_eq,
10064 phba->sli4_hba.max_cfg_param.max_cq,
10065 phba->sli4_hba.max_cfg_param.max_wq,
10066 phba->sli4_hba.max_cfg_param.max_rq,
10067 phba->lmt);
10068
10069 /*
10070 * Calculate queue resources based on how
10071 * many WQ/CQ/EQs are available.
10072 */
10073 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10074 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10075 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10076 /*
10077 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and
10078 * the remainder can be used for NVME / FCP.
10079 */
10080 qmin -= 4;
10081 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10082 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10083
10084 /* Check to see if there is enough for default cfg */
10085 if ((phba->cfg_irq_chann > qmin) ||
10086 (phba->cfg_hdw_queue > qmin)) {
10087 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10088 "2005 Reducing Queues - "
10089 "FW resource limitation: "
10090 "WQ %d CQ %d EQ %d: min %d: "
10091 "IRQ %d HDWQ %d\n",
10092 phba->sli4_hba.max_cfg_param.max_wq,
10093 phba->sli4_hba.max_cfg_param.max_cq,
10094 phba->sli4_hba.max_cfg_param.max_eq,
10095 qmin, phba->cfg_irq_chann,
10096 phba->cfg_hdw_queue);
10097
10098 if (phba->cfg_irq_chann > qmin)
10099 phba->cfg_irq_chann = qmin;
10100 if (phba->cfg_hdw_queue > qmin)
10101 phba->cfg_hdw_queue = qmin;
10102 }
10103 }
10104
10105 if (rc)
10106 goto read_cfg_out;
10107
10108 /* Update link speed if forced link speed is supported */
10109 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10110 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10111 forced_link_speed =
10112 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10113 if (forced_link_speed) {
10114 set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag);
10115
10116 switch (forced_link_speed) {
10117 case LINK_SPEED_1G:
10118 phba->cfg_link_speed =
10119 LPFC_USER_LINK_SPEED_1G;
10120 break;
10121 case LINK_SPEED_2G:
10122 phba->cfg_link_speed =
10123 LPFC_USER_LINK_SPEED_2G;
10124 break;
10125 case LINK_SPEED_4G:
10126 phba->cfg_link_speed =
10127 LPFC_USER_LINK_SPEED_4G;
10128 break;
10129 case LINK_SPEED_8G:
10130 phba->cfg_link_speed =
10131 LPFC_USER_LINK_SPEED_8G;
10132 break;
10133 case LINK_SPEED_10G:
10134 phba->cfg_link_speed =
10135 LPFC_USER_LINK_SPEED_10G;
10136 break;
10137 case LINK_SPEED_16G:
10138 phba->cfg_link_speed =
10139 LPFC_USER_LINK_SPEED_16G;
10140 break;
10141 case LINK_SPEED_32G:
10142 phba->cfg_link_speed =
10143 LPFC_USER_LINK_SPEED_32G;
10144 break;
10145 case LINK_SPEED_64G:
10146 phba->cfg_link_speed =
10147 LPFC_USER_LINK_SPEED_64G;
10148 break;
10149 case 0xffff:
10150 phba->cfg_link_speed =
10151 LPFC_USER_LINK_SPEED_AUTO;
10152 break;
10153 default:
10154 lpfc_printf_log(phba, KERN_ERR,
10155 LOG_TRACE_EVENT,
10156 "0047 Unrecognized link "
10157 "speed : %d\n",
10158 forced_link_speed);
10159 phba->cfg_link_speed =
10160 LPFC_USER_LINK_SPEED_AUTO;
10161 }
10162 }
10163 }
10164
10165 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
10166 length = phba->sli4_hba.max_cfg_param.max_xri -
10167 lpfc_sli4_get_els_iocb_cnt(phba);
10168 if (phba->cfg_hba_queue_depth > length) {
10169 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10170 "3361 HBA queue depth changed from %d to %d\n",
10171 phba->cfg_hba_queue_depth, length);
10172 phba->cfg_hba_queue_depth = length;
10173 }
10174
10175 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10176 LPFC_SLI_INTF_IF_TYPE_2)
10177 goto read_cfg_out;
10178
10179 /* get the pf# and vf# for SLI4 if_type 2 port */
10180 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10181 sizeof(struct lpfc_sli4_cfg_mhdr));
10182 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10183 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10184 length, LPFC_SLI4_MBX_EMBED);
10185
10186 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10187 shdr = (union lpfc_sli4_cfg_shdr *)
10188 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10189 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10190 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10191 if (rc2 || shdr_status || shdr_add_status) {
10192 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10193 "3026 Mailbox failed , mbxCmd x%x "
10194 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10195 bf_get(lpfc_mqe_command, &pmb->u.mqe),
10196 bf_get(lpfc_mqe_status, &pmb->u.mqe));
10197 goto read_cfg_out;
10198 }
10199
10200 /* search for fc_fcoe resrouce descriptor */
10201 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10202
10203 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10204 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10205 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10206 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10207 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10208 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10209 goto read_cfg_out;
10210
10211 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10212 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10213 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10214 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10215 phba->sli4_hba.iov.pf_number =
10216 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10217 phba->sli4_hba.iov.vf_number =
10218 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10219 break;
10220 }
10221 }
10222
10223 if (i < LPFC_RSRC_DESC_MAX_NUM)
10224 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10225 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10226 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10227 phba->sli4_hba.iov.vf_number);
10228 else
10229 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10230 "3028 GET_FUNCTION_CONFIG: failed to find "
10231 "Resource Descriptor:x%x\n",
10232 LPFC_RSRC_DESC_TYPE_FCFCOE);
10233
10234 read_cfg_out:
10235 mempool_free(pmb, phba->mbox_mem_pool);
10236 return rc;
10237 }
10238
10239 /**
10240 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10241 * @phba: pointer to lpfc hba data structure.
10242 *
10243 * This routine is invoked to setup the port-side endian order when
10244 * the port if_type is 0. This routine has no function for other
10245 * if_types.
10246 *
10247 * Return codes
10248 * 0 - successful
10249 * -ENOMEM - No available memory
10250 * -EIO - The mailbox failed to complete successfully.
10251 **/
10252 static int
lpfc_setup_endian_order(struct lpfc_hba * phba)10253 lpfc_setup_endian_order(struct lpfc_hba *phba)
10254 {
10255 LPFC_MBOXQ_t *mboxq;
10256 uint32_t if_type, rc = 0;
10257 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10258 HOST_ENDIAN_HIGH_WORD1};
10259
10260 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10261 switch (if_type) {
10262 case LPFC_SLI_INTF_IF_TYPE_0:
10263 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10264 GFP_KERNEL);
10265 if (!mboxq) {
10266 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10267 "0492 Unable to allocate memory for "
10268 "issuing SLI_CONFIG_SPECIAL mailbox "
10269 "command\n");
10270 return -ENOMEM;
10271 }
10272
10273 /*
10274 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10275 * two words to contain special data values and no other data.
10276 */
10277 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10278 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10279 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10280 if (rc != MBX_SUCCESS) {
10281 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10282 "0493 SLI_CONFIG_SPECIAL mailbox "
10283 "failed with status x%x\n",
10284 rc);
10285 rc = -EIO;
10286 }
10287 mempool_free(mboxq, phba->mbox_mem_pool);
10288 break;
10289 case LPFC_SLI_INTF_IF_TYPE_6:
10290 case LPFC_SLI_INTF_IF_TYPE_2:
10291 case LPFC_SLI_INTF_IF_TYPE_1:
10292 default:
10293 break;
10294 }
10295 return rc;
10296 }
10297
10298 /**
10299 * lpfc_sli4_queue_verify - Verify and update EQ counts
10300 * @phba: pointer to lpfc hba data structure.
10301 *
10302 * This routine is invoked to check the user settable queue counts for EQs.
10303 * After this routine is called the counts will be set to valid values that
10304 * adhere to the constraints of the system's interrupt vectors and the port's
10305 * queue resources.
10306 *
10307 * Return codes
10308 * 0 - successful
10309 * -ENOMEM - No available memory
10310 **/
10311 static int
lpfc_sli4_queue_verify(struct lpfc_hba * phba)10312 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10313 {
10314 /*
10315 * Sanity check for configured queue parameters against the run-time
10316 * device parameters
10317 */
10318
10319 if (phba->nvmet_support) {
10320 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10321 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10322 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10323 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10324 }
10325
10326 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10327 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10328 phba->cfg_hdw_queue, phba->cfg_irq_chann,
10329 phba->cfg_nvmet_mrq);
10330
10331 /* Get EQ depth from module parameter, fake the default for now */
10332 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10333 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10334
10335 /* Get CQ depth from module parameter, fake the default for now */
10336 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10337 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10338 return 0;
10339 }
10340
10341 static int
lpfc_alloc_io_wq_cq(struct lpfc_hba * phba,int idx)10342 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10343 {
10344 struct lpfc_queue *qdesc;
10345 u32 wqesize;
10346 int cpu;
10347
10348 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10349 /* Create Fast Path IO CQs */
10350 if (phba->enab_exp_wqcq_pages)
10351 /* Increase the CQ size when WQEs contain an embedded cdb */
10352 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10353 phba->sli4_hba.cq_esize,
10354 LPFC_CQE_EXP_COUNT, cpu);
10355
10356 else
10357 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10358 phba->sli4_hba.cq_esize,
10359 phba->sli4_hba.cq_ecount, cpu);
10360 if (!qdesc) {
10361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10362 "0499 Failed allocate fast-path IO CQ (%d)\n",
10363 idx);
10364 return 1;
10365 }
10366 qdesc->qe_valid = 1;
10367 qdesc->hdwq = idx;
10368 qdesc->chann = cpu;
10369 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10370
10371 /* Create Fast Path IO WQs */
10372 if (phba->enab_exp_wqcq_pages) {
10373 /* Increase the WQ size when WQEs contain an embedded cdb */
10374 wqesize = (phba->fcp_embed_io) ?
10375 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10376 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10377 wqesize,
10378 LPFC_WQE_EXP_COUNT, cpu);
10379 } else
10380 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10381 phba->sli4_hba.wq_esize,
10382 phba->sli4_hba.wq_ecount, cpu);
10383
10384 if (!qdesc) {
10385 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10386 "0503 Failed allocate fast-path IO WQ (%d)\n",
10387 idx);
10388 return 1;
10389 }
10390 qdesc->hdwq = idx;
10391 qdesc->chann = cpu;
10392 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10393 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10394 return 0;
10395 }
10396
10397 /**
10398 * lpfc_sli4_queue_create - Create all the SLI4 queues
10399 * @phba: pointer to lpfc hba data structure.
10400 *
10401 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10402 * operation. For each SLI4 queue type, the parameters such as queue entry
10403 * count (queue depth) shall be taken from the module parameter. For now,
10404 * we just use some constant number as place holder.
10405 *
10406 * Return codes
10407 * 0 - successful
10408 * -ENOMEM - No availble memory
10409 * -EIO - The mailbox failed to complete successfully.
10410 **/
10411 int
lpfc_sli4_queue_create(struct lpfc_hba * phba)10412 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10413 {
10414 struct lpfc_queue *qdesc;
10415 int idx, cpu, eqcpu;
10416 struct lpfc_sli4_hdw_queue *qp;
10417 struct lpfc_vector_map_info *cpup;
10418 struct lpfc_vector_map_info *eqcpup;
10419 struct lpfc_eq_intr_info *eqi;
10420 u32 wqesize;
10421
10422 /*
10423 * Create HBA Record arrays.
10424 * Both NVME and FCP will share that same vectors / EQs
10425 */
10426 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10427 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10428 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10429 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10430 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10431 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10432 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10433 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10434 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10435 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10436
10437 if (!phba->sli4_hba.hdwq) {
10438 phba->sli4_hba.hdwq = kzalloc_objs(struct lpfc_sli4_hdw_queue,
10439 phba->cfg_hdw_queue);
10440 if (!phba->sli4_hba.hdwq) {
10441 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10442 "6427 Failed allocate memory for "
10443 "fast-path Hardware Queue array\n");
10444 goto out_error;
10445 }
10446 /* Prepare hardware queues to take IO buffers */
10447 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10448 qp = &phba->sli4_hba.hdwq[idx];
10449 spin_lock_init(&qp->io_buf_list_get_lock);
10450 spin_lock_init(&qp->io_buf_list_put_lock);
10451 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10452 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10453 qp->get_io_bufs = 0;
10454 qp->put_io_bufs = 0;
10455 qp->total_io_bufs = 0;
10456 spin_lock_init(&qp->abts_io_buf_list_lock);
10457 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10458 qp->abts_scsi_io_bufs = 0;
10459 qp->abts_nvme_io_bufs = 0;
10460 INIT_LIST_HEAD(&qp->sgl_list);
10461 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10462 spin_lock_init(&qp->hdwq_lock);
10463 }
10464 }
10465
10466 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10467 if (phba->nvmet_support) {
10468 phba->sli4_hba.nvmet_cqset = kzalloc_objs(struct lpfc_queue *,
10469 phba->cfg_nvmet_mrq);
10470 if (!phba->sli4_hba.nvmet_cqset) {
10471 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10472 "3121 Fail allocate memory for "
10473 "fast-path CQ set array\n");
10474 goto out_error;
10475 }
10476 phba->sli4_hba.nvmet_mrq_hdr = kzalloc_objs(struct lpfc_queue *,
10477 phba->cfg_nvmet_mrq);
10478 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10479 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10480 "3122 Fail allocate memory for "
10481 "fast-path RQ set hdr array\n");
10482 goto out_error;
10483 }
10484 phba->sli4_hba.nvmet_mrq_data = kzalloc_objs(struct lpfc_queue *,
10485 phba->cfg_nvmet_mrq);
10486 if (!phba->sli4_hba.nvmet_mrq_data) {
10487 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10488 "3124 Fail allocate memory for "
10489 "fast-path RQ set data array\n");
10490 goto out_error;
10491 }
10492 }
10493 }
10494
10495 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10496
10497 /* Create HBA Event Queues (EQs) */
10498 for_each_present_cpu(cpu) {
10499 /* We only want to create 1 EQ per vector, even though
10500 * multiple CPUs might be using that vector. so only
10501 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10502 */
10503 cpup = &phba->sli4_hba.cpu_map[cpu];
10504 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10505 continue;
10506
10507 /* Get a ptr to the Hardware Queue associated with this CPU */
10508 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10509
10510 /* Allocate an EQ */
10511 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10512 phba->sli4_hba.eq_esize,
10513 phba->sli4_hba.eq_ecount, cpu);
10514 if (!qdesc) {
10515 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10516 "0497 Failed allocate EQ (%d)\n",
10517 cpup->hdwq);
10518 goto out_error;
10519 }
10520 qdesc->qe_valid = 1;
10521 qdesc->hdwq = cpup->hdwq;
10522 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10523 qdesc->last_cpu = qdesc->chann;
10524
10525 /* Save the allocated EQ in the Hardware Queue */
10526 qp->hba_eq = qdesc;
10527
10528 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10529 list_add(&qdesc->cpu_list, &eqi->list);
10530 }
10531
10532 /* Now we need to populate the other Hardware Queues, that share
10533 * an IRQ vector, with the associated EQ ptr.
10534 */
10535 for_each_present_cpu(cpu) {
10536 cpup = &phba->sli4_hba.cpu_map[cpu];
10537
10538 /* Check for EQ already allocated in previous loop */
10539 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10540 continue;
10541
10542 /* Check for multiple CPUs per hdwq */
10543 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10544 if (qp->hba_eq)
10545 continue;
10546
10547 /* We need to share an EQ for this hdwq */
10548 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10549 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10550 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10551 }
10552
10553 /* Allocate IO Path SLI4 CQ/WQs */
10554 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10555 if (lpfc_alloc_io_wq_cq(phba, idx))
10556 goto out_error;
10557 }
10558
10559 if (phba->nvmet_support) {
10560 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10561 cpu = lpfc_find_cpu_handle(phba, idx,
10562 LPFC_FIND_BY_HDWQ);
10563 qdesc = lpfc_sli4_queue_alloc(phba,
10564 LPFC_DEFAULT_PAGE_SIZE,
10565 phba->sli4_hba.cq_esize,
10566 phba->sli4_hba.cq_ecount,
10567 cpu);
10568 if (!qdesc) {
10569 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10570 "3142 Failed allocate NVME "
10571 "CQ Set (%d)\n", idx);
10572 goto out_error;
10573 }
10574 qdesc->qe_valid = 1;
10575 qdesc->hdwq = idx;
10576 qdesc->chann = cpu;
10577 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10578 }
10579 }
10580
10581 /*
10582 * Create Slow Path Completion Queues (CQs)
10583 */
10584
10585 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10586 /* Create slow-path Mailbox Command Complete Queue */
10587 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10588 phba->sli4_hba.cq_esize,
10589 phba->sli4_hba.cq_ecount, cpu);
10590 if (!qdesc) {
10591 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10592 "0500 Failed allocate slow-path mailbox CQ\n");
10593 goto out_error;
10594 }
10595 qdesc->qe_valid = 1;
10596 phba->sli4_hba.mbx_cq = qdesc;
10597
10598 /* Create slow-path ELS Complete Queue */
10599 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10600 phba->sli4_hba.cq_esize,
10601 phba->sli4_hba.cq_ecount, cpu);
10602 if (!qdesc) {
10603 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10604 "0501 Failed allocate slow-path ELS CQ\n");
10605 goto out_error;
10606 }
10607 qdesc->qe_valid = 1;
10608 qdesc->chann = cpu;
10609 phba->sli4_hba.els_cq = qdesc;
10610
10611
10612 /*
10613 * Create Slow Path Work Queues (WQs)
10614 */
10615
10616 /* Create Mailbox Command Queue */
10617
10618 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10619 phba->sli4_hba.mq_esize,
10620 phba->sli4_hba.mq_ecount, cpu);
10621 if (!qdesc) {
10622 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10623 "0505 Failed allocate slow-path MQ\n");
10624 goto out_error;
10625 }
10626 qdesc->chann = cpu;
10627 phba->sli4_hba.mbx_wq = qdesc;
10628
10629 /*
10630 * Create ELS Work Queues
10631 */
10632
10633 /*
10634 * Create slow-path ELS Work Queue.
10635 * Increase the ELS WQ size when WQEs contain an embedded cdb
10636 */
10637 wqesize = (phba->fcp_embed_io) ?
10638 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10639
10640 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10641 wqesize,
10642 phba->sli4_hba.wq_ecount, cpu);
10643 if (!qdesc) {
10644 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10645 "0504 Failed allocate slow-path ELS WQ\n");
10646 goto out_error;
10647 }
10648 qdesc->chann = cpu;
10649 phba->sli4_hba.els_wq = qdesc;
10650 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10651
10652 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10653 /* Create NVME LS Complete Queue */
10654 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10655 phba->sli4_hba.cq_esize,
10656 phba->sli4_hba.cq_ecount, cpu);
10657 if (!qdesc) {
10658 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10659 "6079 Failed allocate NVME LS CQ\n");
10660 goto out_error;
10661 }
10662 qdesc->chann = cpu;
10663 qdesc->qe_valid = 1;
10664 phba->sli4_hba.nvmels_cq = qdesc;
10665
10666 /* Create NVME LS Work Queue */
10667 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10668 phba->sli4_hba.wq_esize,
10669 phba->sli4_hba.wq_ecount, cpu);
10670 if (!qdesc) {
10671 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10672 "6080 Failed allocate NVME LS WQ\n");
10673 goto out_error;
10674 }
10675 qdesc->chann = cpu;
10676 phba->sli4_hba.nvmels_wq = qdesc;
10677 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10678 }
10679
10680 /*
10681 * Create Receive Queue (RQ)
10682 */
10683
10684 /* Create Receive Queue for header */
10685 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10686 phba->sli4_hba.rq_esize,
10687 phba->sli4_hba.rq_ecount, cpu);
10688 if (!qdesc) {
10689 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10690 "0506 Failed allocate receive HRQ\n");
10691 goto out_error;
10692 }
10693 phba->sli4_hba.hdr_rq = qdesc;
10694
10695 /* Create Receive Queue for data */
10696 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10697 phba->sli4_hba.rq_esize,
10698 phba->sli4_hba.rq_ecount, cpu);
10699 if (!qdesc) {
10700 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10701 "0507 Failed allocate receive DRQ\n");
10702 goto out_error;
10703 }
10704 phba->sli4_hba.dat_rq = qdesc;
10705
10706 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10707 phba->nvmet_support) {
10708 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10709 cpu = lpfc_find_cpu_handle(phba, idx,
10710 LPFC_FIND_BY_HDWQ);
10711 /* Create NVMET Receive Queue for header */
10712 qdesc = lpfc_sli4_queue_alloc(phba,
10713 LPFC_DEFAULT_PAGE_SIZE,
10714 phba->sli4_hba.rq_esize,
10715 LPFC_NVMET_RQE_DEF_COUNT,
10716 cpu);
10717 if (!qdesc) {
10718 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10719 "3146 Failed allocate "
10720 "receive HRQ\n");
10721 goto out_error;
10722 }
10723 qdesc->hdwq = idx;
10724 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10725
10726 /* Only needed for header of RQ pair */
10727 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10728 GFP_KERNEL,
10729 cpu_to_node(cpu));
10730 if (qdesc->rqbp == NULL) {
10731 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10732 "6131 Failed allocate "
10733 "Header RQBP\n");
10734 goto out_error;
10735 }
10736
10737 /* Put list in known state in case driver load fails. */
10738 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10739
10740 /* Create NVMET Receive Queue for data */
10741 qdesc = lpfc_sli4_queue_alloc(phba,
10742 LPFC_DEFAULT_PAGE_SIZE,
10743 phba->sli4_hba.rq_esize,
10744 LPFC_NVMET_RQE_DEF_COUNT,
10745 cpu);
10746 if (!qdesc) {
10747 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10748 "3156 Failed allocate "
10749 "receive DRQ\n");
10750 goto out_error;
10751 }
10752 qdesc->hdwq = idx;
10753 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10754 }
10755 }
10756
10757 /* Clear NVME stats */
10758 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10759 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10760 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10761 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10762 }
10763 }
10764
10765 /* Clear SCSI stats */
10766 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10767 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10768 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10769 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10770 }
10771 }
10772
10773 return 0;
10774
10775 out_error:
10776 lpfc_sli4_queue_destroy(phba);
10777 return -ENOMEM;
10778 }
10779
10780 static inline void
__lpfc_sli4_release_queue(struct lpfc_queue ** qp)10781 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10782 {
10783 if (*qp != NULL) {
10784 lpfc_sli4_queue_free(*qp);
10785 *qp = NULL;
10786 }
10787 }
10788
10789 static inline void
lpfc_sli4_release_queues(struct lpfc_queue *** qs,int max)10790 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10791 {
10792 int idx;
10793
10794 if (*qs == NULL)
10795 return;
10796
10797 for (idx = 0; idx < max; idx++)
10798 __lpfc_sli4_release_queue(&(*qs)[idx]);
10799
10800 kfree(*qs);
10801 *qs = NULL;
10802 }
10803
10804 static inline void
lpfc_sli4_release_hdwq(struct lpfc_hba * phba)10805 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10806 {
10807 struct lpfc_sli4_hdw_queue *hdwq;
10808 struct lpfc_queue *eq;
10809 uint32_t idx;
10810
10811 hdwq = phba->sli4_hba.hdwq;
10812
10813 /* Loop thru all Hardware Queues */
10814 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10815 /* Free the CQ/WQ corresponding to the Hardware Queue */
10816 lpfc_sli4_queue_free(hdwq[idx].io_cq);
10817 lpfc_sli4_queue_free(hdwq[idx].io_wq);
10818 hdwq[idx].hba_eq = NULL;
10819 hdwq[idx].io_cq = NULL;
10820 hdwq[idx].io_wq = NULL;
10821 if (phba->cfg_xpsgl && !phba->nvmet_support)
10822 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10823 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10824 }
10825 /* Loop thru all IRQ vectors */
10826 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10827 /* Free the EQ corresponding to the IRQ vector */
10828 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10829 lpfc_sli4_queue_free(eq);
10830 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10831 }
10832 }
10833
10834 /**
10835 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10836 * @phba: pointer to lpfc hba data structure.
10837 *
10838 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10839 * operation.
10840 *
10841 * Return codes
10842 * 0 - successful
10843 * -ENOMEM - No available memory
10844 * -EIO - The mailbox failed to complete successfully.
10845 **/
10846 void
lpfc_sli4_queue_destroy(struct lpfc_hba * phba)10847 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10848 {
10849 /*
10850 * Set FREE_INIT before beginning to free the queues.
10851 * Wait until the users of queues to acknowledge to
10852 * release queues by clearing FREE_WAIT.
10853 */
10854 spin_lock_irq(&phba->hbalock);
10855 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10856 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10857 spin_unlock_irq(&phba->hbalock);
10858 msleep(20);
10859 spin_lock_irq(&phba->hbalock);
10860 }
10861 spin_unlock_irq(&phba->hbalock);
10862
10863 lpfc_sli4_cleanup_poll_list(phba);
10864
10865 /* Release HBA eqs */
10866 if (phba->sli4_hba.hdwq)
10867 lpfc_sli4_release_hdwq(phba);
10868
10869 if (phba->nvmet_support) {
10870 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10871 phba->cfg_nvmet_mrq);
10872
10873 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10874 phba->cfg_nvmet_mrq);
10875 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10876 phba->cfg_nvmet_mrq);
10877 }
10878
10879 /* Release mailbox command work queue */
10880 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10881
10882 /* Release ELS work queue */
10883 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10884
10885 /* Release ELS work queue */
10886 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10887
10888 /* Release unsolicited receive queue */
10889 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10890 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10891
10892 /* Release ELS complete queue */
10893 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10894
10895 /* Release NVME LS complete queue */
10896 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10897
10898 /* Release mailbox command complete queue */
10899 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10900
10901 /* Everything on this list has been freed */
10902 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10903
10904 /* Done with freeing the queues */
10905 spin_lock_irq(&phba->hbalock);
10906 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10907 spin_unlock_irq(&phba->hbalock);
10908 }
10909
10910 int
lpfc_free_rq_buffer(struct lpfc_hba * phba,struct lpfc_queue * rq)10911 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10912 {
10913 struct lpfc_rqb *rqbp;
10914 struct lpfc_dmabuf *h_buf;
10915 struct rqb_dmabuf *rqb_buffer;
10916
10917 rqbp = rq->rqbp;
10918 while (!list_empty(&rqbp->rqb_buffer_list)) {
10919 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10920 struct lpfc_dmabuf, list);
10921
10922 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10923 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
10924 rqbp->buffer_count--;
10925 }
10926 return 1;
10927 }
10928
10929 static int
lpfc_create_wq_cq(struct lpfc_hba * phba,struct lpfc_queue * eq,struct lpfc_queue * cq,struct lpfc_queue * wq,uint16_t * cq_map,int qidx,uint32_t qtype)10930 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10931 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10932 int qidx, uint32_t qtype)
10933 {
10934 struct lpfc_sli_ring *pring;
10935 int rc;
10936
10937 if (!eq || !cq || !wq) {
10938 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10939 "6085 Fast-path %s (%d) not allocated\n",
10940 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10941 return -ENOMEM;
10942 }
10943
10944 /* create the Cq first */
10945 rc = lpfc_cq_create(phba, cq, eq,
10946 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10947 if (rc) {
10948 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10949 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
10950 qidx, (uint32_t)rc);
10951 return rc;
10952 }
10953
10954 if (qtype != LPFC_MBOX) {
10955 /* Setup cq_map for fast lookup */
10956 if (cq_map)
10957 *cq_map = cq->queue_id;
10958
10959 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10960 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10961 qidx, cq->queue_id, qidx, eq->queue_id);
10962
10963 /* create the wq */
10964 rc = lpfc_wq_create(phba, wq, cq, qtype);
10965 if (rc) {
10966 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10967 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10968 qidx, (uint32_t)rc);
10969 /* no need to tear down cq - caller will do so */
10970 return rc;
10971 }
10972
10973 /* Bind this CQ/WQ to the NVME ring */
10974 pring = wq->pring;
10975 pring->sli.sli4.wqp = (void *)wq;
10976 cq->pring = pring;
10977
10978 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10979 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
10980 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
10981 } else {
10982 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
10983 if (rc) {
10984 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10985 "0539 Failed setup of slow-path MQ: "
10986 "rc = 0x%x\n", rc);
10987 /* no need to tear down cq - caller will do so */
10988 return rc;
10989 }
10990
10991 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10992 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
10993 phba->sli4_hba.mbx_wq->queue_id,
10994 phba->sli4_hba.mbx_cq->queue_id);
10995 }
10996
10997 return 0;
10998 }
10999
11000 /**
11001 * lpfc_setup_cq_lookup - Setup the CQ lookup table
11002 * @phba: pointer to lpfc hba data structure.
11003 *
11004 * This routine will populate the cq_lookup table by all
11005 * available CQ queue_id's.
11006 **/
11007 static void
lpfc_setup_cq_lookup(struct lpfc_hba * phba)11008 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11009 {
11010 struct lpfc_queue *eq, *childq;
11011 int qidx;
11012
11013 memset(phba->sli4_hba.cq_lookup, 0,
11014 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11015 /* Loop thru all IRQ vectors */
11016 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11017 /* Get the EQ corresponding to the IRQ vector */
11018 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11019 if (!eq)
11020 continue;
11021 /* Loop through all CQs associated with that EQ */
11022 list_for_each_entry(childq, &eq->child_list, list) {
11023 if (childq->queue_id > phba->sli4_hba.cq_max)
11024 continue;
11025 if (childq->subtype == LPFC_IO)
11026 phba->sli4_hba.cq_lookup[childq->queue_id] =
11027 childq;
11028 }
11029 }
11030 }
11031
11032 /**
11033 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11034 * @phba: pointer to lpfc hba data structure.
11035 *
11036 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11037 * operation.
11038 *
11039 * Return codes
11040 * 0 - successful
11041 * -ENOMEM - No available memory
11042 * -EIO - The mailbox failed to complete successfully.
11043 **/
11044 int
lpfc_sli4_queue_setup(struct lpfc_hba * phba)11045 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11046 {
11047 uint32_t shdr_status, shdr_add_status;
11048 union lpfc_sli4_cfg_shdr *shdr;
11049 struct lpfc_vector_map_info *cpup;
11050 struct lpfc_sli4_hdw_queue *qp;
11051 LPFC_MBOXQ_t *mboxq;
11052 int qidx, cpu;
11053 uint32_t length, usdelay;
11054 int rc = -ENOMEM;
11055
11056 /* Check for dual-ULP support */
11057 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11058 if (!mboxq) {
11059 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11060 "3249 Unable to allocate memory for "
11061 "QUERY_FW_CFG mailbox command\n");
11062 return -ENOMEM;
11063 }
11064 length = (sizeof(struct lpfc_mbx_query_fw_config) -
11065 sizeof(struct lpfc_sli4_cfg_mhdr));
11066 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11067 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11068 length, LPFC_SLI4_MBX_EMBED);
11069
11070 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11071
11072 shdr = (union lpfc_sli4_cfg_shdr *)
11073 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11074 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11075 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11076 if (shdr_status || shdr_add_status || rc) {
11077 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11078 "3250 QUERY_FW_CFG mailbox failed with status "
11079 "x%x add_status x%x, mbx status x%x\n",
11080 shdr_status, shdr_add_status, rc);
11081 mempool_free(mboxq, phba->mbox_mem_pool);
11082 rc = -ENXIO;
11083 goto out_error;
11084 }
11085
11086 phba->sli4_hba.fw_func_mode =
11087 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11088 phba->sli4_hba.physical_port =
11089 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11090 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11091 "3251 QUERY_FW_CFG: func_mode:x%x\n",
11092 phba->sli4_hba.fw_func_mode);
11093
11094 mempool_free(mboxq, phba->mbox_mem_pool);
11095
11096 /*
11097 * Set up HBA Event Queues (EQs)
11098 */
11099 qp = phba->sli4_hba.hdwq;
11100
11101 /* Set up HBA event queue */
11102 if (!qp) {
11103 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11104 "3147 Fast-path EQs not allocated\n");
11105 rc = -ENOMEM;
11106 goto out_error;
11107 }
11108
11109 /* Loop thru all IRQ vectors */
11110 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11111 /* Create HBA Event Queues (EQs) in order */
11112 for_each_present_cpu(cpu) {
11113 cpup = &phba->sli4_hba.cpu_map[cpu];
11114
11115 /* Look for the CPU thats using that vector with
11116 * LPFC_CPU_FIRST_IRQ set.
11117 */
11118 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11119 continue;
11120 if (qidx != cpup->eq)
11121 continue;
11122
11123 /* Create an EQ for that vector */
11124 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11125 phba->cfg_fcp_imax);
11126 if (rc) {
11127 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11128 "0523 Failed setup of fast-path"
11129 " EQ (%d), rc = 0x%x\n",
11130 cpup->eq, (uint32_t)rc);
11131 goto out_destroy;
11132 }
11133
11134 /* Save the EQ for that vector in the hba_eq_hdl */
11135 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11136 qp[cpup->hdwq].hba_eq;
11137
11138 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11139 "2584 HBA EQ setup: queue[%d]-id=%d\n",
11140 cpup->eq,
11141 qp[cpup->hdwq].hba_eq->queue_id);
11142 }
11143 }
11144
11145 /* Loop thru all Hardware Queues */
11146 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11147 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11148 cpup = &phba->sli4_hba.cpu_map[cpu];
11149
11150 /* Create the CQ/WQ corresponding to the Hardware Queue */
11151 rc = lpfc_create_wq_cq(phba,
11152 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11153 qp[qidx].io_cq,
11154 qp[qidx].io_wq,
11155 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11156 qidx,
11157 LPFC_IO);
11158 if (rc) {
11159 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11160 "0535 Failed to setup fastpath "
11161 "IO WQ/CQ (%d), rc = 0x%x\n",
11162 qidx, (uint32_t)rc);
11163 goto out_destroy;
11164 }
11165 }
11166
11167 /*
11168 * Set up Slow Path Complete Queues (CQs)
11169 */
11170
11171 /* Set up slow-path MBOX CQ/MQ */
11172
11173 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11174 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11175 "0528 %s not allocated\n",
11176 phba->sli4_hba.mbx_cq ?
11177 "Mailbox WQ" : "Mailbox CQ");
11178 rc = -ENOMEM;
11179 goto out_destroy;
11180 }
11181
11182 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11183 phba->sli4_hba.mbx_cq,
11184 phba->sli4_hba.mbx_wq,
11185 NULL, 0, LPFC_MBOX);
11186 if (rc) {
11187 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11188 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11189 (uint32_t)rc);
11190 goto out_destroy;
11191 }
11192 if (phba->nvmet_support) {
11193 if (!phba->sli4_hba.nvmet_cqset) {
11194 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11195 "3165 Fast-path NVME CQ Set "
11196 "array not allocated\n");
11197 rc = -ENOMEM;
11198 goto out_destroy;
11199 }
11200 if (phba->cfg_nvmet_mrq > 1) {
11201 rc = lpfc_cq_create_set(phba,
11202 phba->sli4_hba.nvmet_cqset,
11203 qp,
11204 LPFC_WCQ, LPFC_NVMET);
11205 if (rc) {
11206 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11207 "3164 Failed setup of NVME CQ "
11208 "Set, rc = 0x%x\n",
11209 (uint32_t)rc);
11210 goto out_destroy;
11211 }
11212 } else {
11213 /* Set up NVMET Receive Complete Queue */
11214 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11215 qp[0].hba_eq,
11216 LPFC_WCQ, LPFC_NVMET);
11217 if (rc) {
11218 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11219 "6089 Failed setup NVMET CQ: "
11220 "rc = 0x%x\n", (uint32_t)rc);
11221 goto out_destroy;
11222 }
11223 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11224
11225 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11226 "6090 NVMET CQ setup: cq-id=%d, "
11227 "parent eq-id=%d\n",
11228 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11229 qp[0].hba_eq->queue_id);
11230 }
11231 }
11232
11233 /* Set up slow-path ELS WQ/CQ */
11234 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11235 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11236 "0530 ELS %s not allocated\n",
11237 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11238 rc = -ENOMEM;
11239 goto out_destroy;
11240 }
11241 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11242 phba->sli4_hba.els_cq,
11243 phba->sli4_hba.els_wq,
11244 NULL, 0, LPFC_ELS);
11245 if (rc) {
11246 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11247 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11248 (uint32_t)rc);
11249 goto out_destroy;
11250 }
11251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11252 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11253 phba->sli4_hba.els_wq->queue_id,
11254 phba->sli4_hba.els_cq->queue_id);
11255
11256 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11257 /* Set up NVME LS Complete Queue */
11258 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11259 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11260 "6091 LS %s not allocated\n",
11261 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11262 rc = -ENOMEM;
11263 goto out_destroy;
11264 }
11265 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11266 phba->sli4_hba.nvmels_cq,
11267 phba->sli4_hba.nvmels_wq,
11268 NULL, 0, LPFC_NVME_LS);
11269 if (rc) {
11270 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11271 "0526 Failed setup of NVVME LS WQ/CQ: "
11272 "rc = 0x%x\n", (uint32_t)rc);
11273 goto out_destroy;
11274 }
11275
11276 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11277 "6096 ELS WQ setup: wq-id=%d, "
11278 "parent cq-id=%d\n",
11279 phba->sli4_hba.nvmels_wq->queue_id,
11280 phba->sli4_hba.nvmels_cq->queue_id);
11281 }
11282
11283 /*
11284 * Create NVMET Receive Queue (RQ)
11285 */
11286 if (phba->nvmet_support) {
11287 if ((!phba->sli4_hba.nvmet_cqset) ||
11288 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11289 (!phba->sli4_hba.nvmet_mrq_data)) {
11290 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11291 "6130 MRQ CQ Queues not "
11292 "allocated\n");
11293 rc = -ENOMEM;
11294 goto out_destroy;
11295 }
11296 if (phba->cfg_nvmet_mrq > 1) {
11297 rc = lpfc_mrq_create(phba,
11298 phba->sli4_hba.nvmet_mrq_hdr,
11299 phba->sli4_hba.nvmet_mrq_data,
11300 phba->sli4_hba.nvmet_cqset,
11301 LPFC_NVMET);
11302 if (rc) {
11303 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11304 "6098 Failed setup of NVMET "
11305 "MRQ: rc = 0x%x\n",
11306 (uint32_t)rc);
11307 goto out_destroy;
11308 }
11309
11310 } else {
11311 rc = lpfc_rq_create(phba,
11312 phba->sli4_hba.nvmet_mrq_hdr[0],
11313 phba->sli4_hba.nvmet_mrq_data[0],
11314 phba->sli4_hba.nvmet_cqset[0],
11315 LPFC_NVMET);
11316 if (rc) {
11317 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11318 "6057 Failed setup of NVMET "
11319 "Receive Queue: rc = 0x%x\n",
11320 (uint32_t)rc);
11321 goto out_destroy;
11322 }
11323
11324 lpfc_printf_log(
11325 phba, KERN_INFO, LOG_INIT,
11326 "6099 NVMET RQ setup: hdr-rq-id=%d, "
11327 "dat-rq-id=%d parent cq-id=%d\n",
11328 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11329 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11330 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11331
11332 }
11333 }
11334
11335 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11336 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11337 "0540 Receive Queue not allocated\n");
11338 rc = -ENOMEM;
11339 goto out_destroy;
11340 }
11341
11342 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11343 phba->sli4_hba.els_cq, LPFC_USOL);
11344 if (rc) {
11345 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11346 "0541 Failed setup of Receive Queue: "
11347 "rc = 0x%x\n", (uint32_t)rc);
11348 goto out_destroy;
11349 }
11350
11351 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11352 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11353 "parent cq-id=%d\n",
11354 phba->sli4_hba.hdr_rq->queue_id,
11355 phba->sli4_hba.dat_rq->queue_id,
11356 phba->sli4_hba.els_cq->queue_id);
11357
11358 if (phba->cfg_fcp_imax)
11359 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11360 else
11361 usdelay = 0;
11362
11363 for (qidx = 0; qidx < phba->cfg_irq_chann;
11364 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11365 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11366 usdelay);
11367
11368 if (phba->sli4_hba.cq_max) {
11369 kfree(phba->sli4_hba.cq_lookup);
11370 phba->sli4_hba.cq_lookup = kzalloc_objs(struct lpfc_queue *,
11371 (phba->sli4_hba.cq_max + 1));
11372 if (!phba->sli4_hba.cq_lookup) {
11373 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11374 "0549 Failed setup of CQ Lookup table: "
11375 "size 0x%x\n", phba->sli4_hba.cq_max);
11376 rc = -ENOMEM;
11377 goto out_destroy;
11378 }
11379 lpfc_setup_cq_lookup(phba);
11380 }
11381 return 0;
11382
11383 out_destroy:
11384 lpfc_sli4_queue_unset(phba);
11385 out_error:
11386 return rc;
11387 }
11388
11389 /**
11390 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11391 * @phba: pointer to lpfc hba data structure.
11392 *
11393 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11394 * operation.
11395 *
11396 * Return codes
11397 * 0 - successful
11398 * -ENOMEM - No available memory
11399 * -EIO - The mailbox failed to complete successfully.
11400 **/
11401 void
lpfc_sli4_queue_unset(struct lpfc_hba * phba)11402 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11403 {
11404 struct lpfc_sli4_hdw_queue *qp;
11405 struct lpfc_queue *eq;
11406 int qidx;
11407
11408 /* Unset mailbox command work queue */
11409 if (phba->sli4_hba.mbx_wq)
11410 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11411
11412 /* Unset NVME LS work queue */
11413 if (phba->sli4_hba.nvmels_wq)
11414 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11415
11416 /* Unset ELS work queue */
11417 if (phba->sli4_hba.els_wq)
11418 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11419
11420 /* Unset unsolicited receive queue */
11421 if (phba->sli4_hba.hdr_rq)
11422 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11423 phba->sli4_hba.dat_rq);
11424
11425 /* Unset mailbox command complete queue */
11426 if (phba->sli4_hba.mbx_cq)
11427 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11428
11429 /* Unset ELS complete queue */
11430 if (phba->sli4_hba.els_cq)
11431 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11432
11433 /* Unset NVME LS complete queue */
11434 if (phba->sli4_hba.nvmels_cq)
11435 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11436
11437 if (phba->nvmet_support) {
11438 /* Unset NVMET MRQ queue */
11439 if (phba->sli4_hba.nvmet_mrq_hdr) {
11440 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11441 lpfc_rq_destroy(
11442 phba,
11443 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11444 phba->sli4_hba.nvmet_mrq_data[qidx]);
11445 }
11446
11447 /* Unset NVMET CQ Set complete queue */
11448 if (phba->sli4_hba.nvmet_cqset) {
11449 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11450 lpfc_cq_destroy(
11451 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11452 }
11453 }
11454
11455 /* Unset fast-path SLI4 queues */
11456 if (phba->sli4_hba.hdwq) {
11457 /* Loop thru all Hardware Queues */
11458 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11459 /* Destroy the CQ/WQ corresponding to Hardware Queue */
11460 qp = &phba->sli4_hba.hdwq[qidx];
11461 lpfc_wq_destroy(phba, qp->io_wq);
11462 lpfc_cq_destroy(phba, qp->io_cq);
11463 }
11464 /* Loop thru all IRQ vectors */
11465 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11466 /* Destroy the EQ corresponding to the IRQ vector */
11467 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11468 lpfc_eq_destroy(phba, eq);
11469 }
11470 }
11471
11472 kfree(phba->sli4_hba.cq_lookup);
11473 phba->sli4_hba.cq_lookup = NULL;
11474 phba->sli4_hba.cq_max = 0;
11475 }
11476
11477 /**
11478 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11479 * @phba: pointer to lpfc hba data structure.
11480 *
11481 * This routine is invoked to allocate and set up a pool of completion queue
11482 * events. The body of the completion queue event is a completion queue entry
11483 * CQE. For now, this pool is used for the interrupt service routine to queue
11484 * the following HBA completion queue events for the worker thread to process:
11485 * - Mailbox asynchronous events
11486 * - Receive queue completion unsolicited events
11487 * Later, this can be used for all the slow-path events.
11488 *
11489 * Return codes
11490 * 0 - successful
11491 * -ENOMEM - No available memory
11492 **/
11493 static int
lpfc_sli4_cq_event_pool_create(struct lpfc_hba * phba)11494 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11495 {
11496 struct lpfc_cq_event *cq_event;
11497 int i;
11498
11499 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11500 cq_event = kmalloc_obj(struct lpfc_cq_event);
11501 if (!cq_event)
11502 goto out_pool_create_fail;
11503 list_add_tail(&cq_event->list,
11504 &phba->sli4_hba.sp_cqe_event_pool);
11505 }
11506 return 0;
11507
11508 out_pool_create_fail:
11509 lpfc_sli4_cq_event_pool_destroy(phba);
11510 return -ENOMEM;
11511 }
11512
11513 /**
11514 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11515 * @phba: pointer to lpfc hba data structure.
11516 *
11517 * This routine is invoked to free the pool of completion queue events at
11518 * driver unload time. Note that, it is the responsibility of the driver
11519 * cleanup routine to free all the outstanding completion-queue events
11520 * allocated from this pool back into the pool before invoking this routine
11521 * to destroy the pool.
11522 **/
11523 static void
lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba * phba)11524 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11525 {
11526 struct lpfc_cq_event *cq_event, *next_cq_event;
11527
11528 list_for_each_entry_safe(cq_event, next_cq_event,
11529 &phba->sli4_hba.sp_cqe_event_pool, list) {
11530 list_del(&cq_event->list);
11531 kfree(cq_event);
11532 }
11533 }
11534
11535 /**
11536 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11537 * @phba: pointer to lpfc hba data structure.
11538 *
11539 * This routine is the lock free version of the API invoked to allocate a
11540 * completion-queue event from the free pool.
11541 *
11542 * Return: Pointer to the newly allocated completion-queue event if successful
11543 * NULL otherwise.
11544 **/
11545 struct lpfc_cq_event *
__lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11546 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11547 {
11548 struct lpfc_cq_event *cq_event = NULL;
11549
11550 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11551 struct lpfc_cq_event, list);
11552 return cq_event;
11553 }
11554
11555 /**
11556 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11557 * @phba: pointer to lpfc hba data structure.
11558 *
11559 * This routine is the lock version of the API invoked to allocate a
11560 * completion-queue event from the free pool.
11561 *
11562 * Return: Pointer to the newly allocated completion-queue event if successful
11563 * NULL otherwise.
11564 **/
11565 struct lpfc_cq_event *
lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11566 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11567 {
11568 struct lpfc_cq_event *cq_event;
11569 unsigned long iflags;
11570
11571 spin_lock_irqsave(&phba->hbalock, iflags);
11572 cq_event = __lpfc_sli4_cq_event_alloc(phba);
11573 spin_unlock_irqrestore(&phba->hbalock, iflags);
11574 return cq_event;
11575 }
11576
11577 /**
11578 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11579 * @phba: pointer to lpfc hba data structure.
11580 * @cq_event: pointer to the completion queue event to be freed.
11581 *
11582 * This routine is the lock free version of the API invoked to release a
11583 * completion-queue event back into the free pool.
11584 **/
11585 void
__lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11586 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11587 struct lpfc_cq_event *cq_event)
11588 {
11589 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11590 }
11591
11592 /**
11593 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11594 * @phba: pointer to lpfc hba data structure.
11595 * @cq_event: pointer to the completion queue event to be freed.
11596 *
11597 * This routine is the lock version of the API invoked to release a
11598 * completion-queue event back into the free pool.
11599 **/
11600 void
lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11601 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11602 struct lpfc_cq_event *cq_event)
11603 {
11604 unsigned long iflags;
11605 spin_lock_irqsave(&phba->hbalock, iflags);
11606 __lpfc_sli4_cq_event_release(phba, cq_event);
11607 spin_unlock_irqrestore(&phba->hbalock, iflags);
11608 }
11609
11610 /**
11611 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11612 * @phba: pointer to lpfc hba data structure.
11613 *
11614 * This routine is to free all the pending completion-queue events to the
11615 * back into the free pool for device reset.
11616 **/
11617 static void
lpfc_sli4_cq_event_release_all(struct lpfc_hba * phba)11618 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11619 {
11620 LIST_HEAD(cq_event_list);
11621 struct lpfc_cq_event *cq_event;
11622 unsigned long iflags;
11623
11624 /* Retrieve all the pending WCQEs from pending WCQE lists */
11625
11626 /* Pending ELS XRI abort events */
11627 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11628 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11629 &cq_event_list);
11630 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11631
11632 /* Pending asynnc events */
11633 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11634 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11635 &cq_event_list);
11636 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11637
11638 while (!list_empty(&cq_event_list)) {
11639 list_remove_head(&cq_event_list, cq_event,
11640 struct lpfc_cq_event, list);
11641 lpfc_sli4_cq_event_release(phba, cq_event);
11642 }
11643 }
11644
11645 /**
11646 * lpfc_pci_function_reset - Reset pci function.
11647 * @phba: pointer to lpfc hba data structure.
11648 *
11649 * This routine is invoked to request a PCI function reset. It will destroys
11650 * all resources assigned to the PCI function which originates this request.
11651 *
11652 * Return codes
11653 * 0 - successful
11654 * -ENOMEM - No available memory
11655 * -EIO - The mailbox failed to complete successfully.
11656 **/
11657 int
lpfc_pci_function_reset(struct lpfc_hba * phba)11658 lpfc_pci_function_reset(struct lpfc_hba *phba)
11659 {
11660 LPFC_MBOXQ_t *mboxq;
11661 uint32_t rc = 0, if_type;
11662 uint32_t shdr_status, shdr_add_status;
11663 uint32_t rdy_chk;
11664 uint32_t port_reset = 0;
11665 union lpfc_sli4_cfg_shdr *shdr;
11666 struct lpfc_register reg_data;
11667 uint16_t devid;
11668
11669 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11670 switch (if_type) {
11671 case LPFC_SLI_INTF_IF_TYPE_0:
11672 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11673 GFP_KERNEL);
11674 if (!mboxq) {
11675 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11676 "0494 Unable to allocate memory for "
11677 "issuing SLI_FUNCTION_RESET mailbox "
11678 "command\n");
11679 return -ENOMEM;
11680 }
11681
11682 /* Setup PCI function reset mailbox-ioctl command */
11683 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11684 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11685 LPFC_SLI4_MBX_EMBED);
11686 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11687 shdr = (union lpfc_sli4_cfg_shdr *)
11688 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11689 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11690 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11691 &shdr->response);
11692 mempool_free(mboxq, phba->mbox_mem_pool);
11693 if (shdr_status || shdr_add_status || rc) {
11694 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11695 "0495 SLI_FUNCTION_RESET mailbox "
11696 "failed with status x%x add_status x%x,"
11697 " mbx status x%x\n",
11698 shdr_status, shdr_add_status, rc);
11699 rc = -ENXIO;
11700 }
11701 break;
11702 case LPFC_SLI_INTF_IF_TYPE_2:
11703 case LPFC_SLI_INTF_IF_TYPE_6:
11704 wait:
11705 /*
11706 * Poll the Port Status Register and wait for RDY for
11707 * up to 30 seconds. If the port doesn't respond, treat
11708 * it as an error.
11709 */
11710 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11711 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11712 STATUSregaddr, ®_data.word0)) {
11713 rc = -ENODEV;
11714 goto out;
11715 }
11716 if (bf_get(lpfc_sliport_status_rdy, ®_data))
11717 break;
11718 msleep(20);
11719 }
11720
11721 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
11722 phba->work_status[0] = readl(
11723 phba->sli4_hba.u.if_type2.ERR1regaddr);
11724 phba->work_status[1] = readl(
11725 phba->sli4_hba.u.if_type2.ERR2regaddr);
11726 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11727 "2890 Port not ready, port status reg "
11728 "0x%x error 1=0x%x, error 2=0x%x\n",
11729 reg_data.word0,
11730 phba->work_status[0],
11731 phba->work_status[1]);
11732 rc = -ENODEV;
11733 goto out;
11734 }
11735
11736 if (bf_get(lpfc_sliport_status_pldv, ®_data))
11737 lpfc_pldv_detect = true;
11738
11739 if (!port_reset) {
11740 /*
11741 * Reset the port now
11742 */
11743 reg_data.word0 = 0;
11744 bf_set(lpfc_sliport_ctrl_end, ®_data,
11745 LPFC_SLIPORT_LITTLE_ENDIAN);
11746 bf_set(lpfc_sliport_ctrl_ip, ®_data,
11747 LPFC_SLIPORT_INIT_PORT);
11748 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11749 CTRLregaddr);
11750 /* flush */
11751 pci_read_config_word(phba->pcidev,
11752 PCI_DEVICE_ID, &devid);
11753
11754 port_reset = 1;
11755 msleep(20);
11756 goto wait;
11757 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
11758 rc = -ENODEV;
11759 goto out;
11760 }
11761 break;
11762
11763 case LPFC_SLI_INTF_IF_TYPE_1:
11764 default:
11765 break;
11766 }
11767
11768 out:
11769 /* Catch the not-ready port failure after a port reset. */
11770 if (rc) {
11771 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11772 "3317 HBA not functional: IP Reset Failed "
11773 "try: echo fw_reset > board_mode\n");
11774 rc = -ENODEV;
11775 }
11776
11777 return rc;
11778 }
11779
11780 /**
11781 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11782 * @phba: pointer to lpfc hba data structure.
11783 *
11784 * This routine is invoked to set up the PCI device memory space for device
11785 * with SLI-4 interface spec.
11786 *
11787 * Return codes
11788 * 0 - successful
11789 * other values - error
11790 **/
11791 static int
lpfc_sli4_pci_mem_setup(struct lpfc_hba * phba)11792 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11793 {
11794 struct pci_dev *pdev = phba->pcidev;
11795 unsigned long bar0map_len, bar1map_len, bar2map_len;
11796 int error;
11797 uint32_t if_type;
11798
11799 if (!pdev)
11800 return -ENODEV;
11801
11802 /* Set the device DMA mask size */
11803 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11804 if (error)
11805 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11806 if (error)
11807 return error;
11808
11809 /*
11810 * The BARs and register set definitions and offset locations are
11811 * dependent on the if_type.
11812 */
11813 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11814 &phba->sli4_hba.sli_intf.word0)) {
11815 return -ENODEV;
11816 }
11817
11818 /* There is no SLI3 failback for SLI4 devices. */
11819 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11820 LPFC_SLI_INTF_VALID) {
11821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11822 "2894 SLI_INTF reg contents invalid "
11823 "sli_intf reg 0x%x\n",
11824 phba->sli4_hba.sli_intf.word0);
11825 return -ENODEV;
11826 }
11827
11828 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11829 /*
11830 * Get the bus address of SLI4 device Bar regions and the
11831 * number of bytes required by each mapping. The mapping of the
11832 * particular PCI BARs regions is dependent on the type of
11833 * SLI4 device.
11834 */
11835 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11836 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11837 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11838
11839 /*
11840 * Map SLI4 PCI Config Space Register base to a kernel virtual
11841 * addr
11842 */
11843 phba->sli4_hba.conf_regs_memmap_p =
11844 ioremap(phba->pci_bar0_map, bar0map_len);
11845 if (!phba->sli4_hba.conf_regs_memmap_p) {
11846 dev_printk(KERN_ERR, &pdev->dev,
11847 "ioremap failed for SLI4 PCI config "
11848 "registers.\n");
11849 return -ENODEV;
11850 }
11851 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11852 /* Set up BAR0 PCI config space register memory map */
11853 lpfc_sli4_bar0_register_memmap(phba, if_type);
11854 } else {
11855 phba->pci_bar0_map = pci_resource_start(pdev, 1);
11856 bar0map_len = pci_resource_len(pdev, 1);
11857 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11858 dev_printk(KERN_ERR, &pdev->dev,
11859 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11860 return -ENODEV;
11861 }
11862 phba->sli4_hba.conf_regs_memmap_p =
11863 ioremap(phba->pci_bar0_map, bar0map_len);
11864 if (!phba->sli4_hba.conf_regs_memmap_p) {
11865 dev_printk(KERN_ERR, &pdev->dev,
11866 "ioremap failed for SLI4 PCI config "
11867 "registers.\n");
11868 return -ENODEV;
11869 }
11870 lpfc_sli4_bar0_register_memmap(phba, if_type);
11871 }
11872
11873 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11874 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11875 /*
11876 * Map SLI4 if type 0 HBA Control Register base to a
11877 * kernel virtual address and setup the registers.
11878 */
11879 phba->pci_bar1_map = pci_resource_start(pdev,
11880 PCI_64BIT_BAR2);
11881 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11882 phba->sli4_hba.ctrl_regs_memmap_p =
11883 ioremap(phba->pci_bar1_map,
11884 bar1map_len);
11885 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11886 dev_err(&pdev->dev,
11887 "ioremap failed for SLI4 HBA "
11888 "control registers.\n");
11889 error = -ENOMEM;
11890 goto out_iounmap_conf;
11891 }
11892 phba->pci_bar2_memmap_p =
11893 phba->sli4_hba.ctrl_regs_memmap_p;
11894 lpfc_sli4_bar1_register_memmap(phba, if_type);
11895 } else {
11896 error = -ENOMEM;
11897 goto out_iounmap_conf;
11898 }
11899 }
11900
11901 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11902 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11903 /*
11904 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11905 * virtual address and setup the registers.
11906 */
11907 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11908 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11909 phba->sli4_hba.drbl_regs_memmap_p =
11910 ioremap(phba->pci_bar1_map, bar1map_len);
11911 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11912 dev_err(&pdev->dev,
11913 "ioremap failed for SLI4 HBA doorbell registers.\n");
11914 error = -ENOMEM;
11915 goto out_iounmap_conf;
11916 }
11917 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11918 lpfc_sli4_bar1_register_memmap(phba, if_type);
11919 }
11920
11921 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11922 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11923 /*
11924 * Map SLI4 if type 0 HBA Doorbell Register base to
11925 * a kernel virtual address and setup the registers.
11926 */
11927 phba->pci_bar2_map = pci_resource_start(pdev,
11928 PCI_64BIT_BAR4);
11929 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11930 phba->sli4_hba.drbl_regs_memmap_p =
11931 ioremap(phba->pci_bar2_map,
11932 bar2map_len);
11933 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11934 dev_err(&pdev->dev,
11935 "ioremap failed for SLI4 HBA"
11936 " doorbell registers.\n");
11937 error = -ENOMEM;
11938 goto out_iounmap_ctrl;
11939 }
11940 phba->pci_bar4_memmap_p =
11941 phba->sli4_hba.drbl_regs_memmap_p;
11942 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11943 if (error)
11944 goto out_iounmap_all;
11945 } else {
11946 error = -ENOMEM;
11947 goto out_iounmap_ctrl;
11948 }
11949 }
11950
11951 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11952 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11953 /*
11954 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11955 * virtual address and setup the registers.
11956 */
11957 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11958 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11959 phba->sli4_hba.dpp_regs_memmap_p =
11960 ioremap(phba->pci_bar2_map, bar2map_len);
11961 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11962 dev_err(&pdev->dev,
11963 "ioremap failed for SLI4 HBA dpp registers.\n");
11964 error = -ENOMEM;
11965 goto out_iounmap_all;
11966 }
11967 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11968 }
11969
11970 /* Set up the EQ/CQ register handeling functions now */
11971 switch (if_type) {
11972 case LPFC_SLI_INTF_IF_TYPE_0:
11973 case LPFC_SLI_INTF_IF_TYPE_2:
11974 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
11975 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
11976 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
11977 break;
11978 case LPFC_SLI_INTF_IF_TYPE_6:
11979 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
11980 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
11981 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
11982 break;
11983 default:
11984 break;
11985 }
11986
11987 return 0;
11988
11989 out_iounmap_all:
11990 if (phba->sli4_hba.drbl_regs_memmap_p)
11991 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
11992 out_iounmap_ctrl:
11993 if (phba->sli4_hba.ctrl_regs_memmap_p)
11994 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
11995 out_iounmap_conf:
11996 iounmap(phba->sli4_hba.conf_regs_memmap_p);
11997
11998 return error;
11999 }
12000
12001 /**
12002 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12003 * @phba: pointer to lpfc hba data structure.
12004 *
12005 * This routine is invoked to unset the PCI device memory space for device
12006 * with SLI-4 interface spec.
12007 **/
12008 static void
lpfc_sli4_pci_mem_unset(struct lpfc_hba * phba)12009 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12010 {
12011 uint32_t if_type;
12012 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12013
12014 switch (if_type) {
12015 case LPFC_SLI_INTF_IF_TYPE_0:
12016 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12017 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12018 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12019 break;
12020 case LPFC_SLI_INTF_IF_TYPE_2:
12021 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12022 break;
12023 case LPFC_SLI_INTF_IF_TYPE_6:
12024 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12025 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12026 if (phba->sli4_hba.dpp_regs_memmap_p)
12027 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12028 if (phba->sli4_hba.dpp_regs_memmap_wc_p)
12029 iounmap(phba->sli4_hba.dpp_regs_memmap_wc_p);
12030 break;
12031 case LPFC_SLI_INTF_IF_TYPE_1:
12032 break;
12033 default:
12034 dev_printk(KERN_ERR, &phba->pcidev->dev,
12035 "FATAL - unsupported SLI4 interface type - %d\n",
12036 if_type);
12037 break;
12038 }
12039 }
12040
12041 /**
12042 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12043 * @phba: pointer to lpfc hba data structure.
12044 *
12045 * This routine is invoked to enable the MSI-X interrupt vectors to device
12046 * with SLI-3 interface specs.
12047 *
12048 * Return codes
12049 * 0 - successful
12050 * other values - error
12051 **/
12052 static int
lpfc_sli_enable_msix(struct lpfc_hba * phba)12053 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12054 {
12055 int rc;
12056 LPFC_MBOXQ_t *pmb;
12057
12058 /* Set up MSI-X multi-message vectors */
12059 rc = pci_alloc_irq_vectors(phba->pcidev,
12060 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12061 if (rc < 0) {
12062 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12063 "0420 PCI enable MSI-X failed (%d)\n", rc);
12064 goto vec_fail_out;
12065 }
12066
12067 /*
12068 * Assign MSI-X vectors to interrupt handlers
12069 */
12070
12071 /* vector-0 is associated to slow-path handler */
12072 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12073 &lpfc_sli_sp_intr_handler, 0,
12074 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12075 if (rc) {
12076 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12077 "0421 MSI-X slow-path request_irq failed "
12078 "(%d)\n", rc);
12079 goto msi_fail_out;
12080 }
12081
12082 /* vector-1 is associated to fast-path handler */
12083 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12084 &lpfc_sli_fp_intr_handler, 0,
12085 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12086
12087 if (rc) {
12088 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12089 "0429 MSI-X fast-path request_irq failed "
12090 "(%d)\n", rc);
12091 goto irq_fail_out;
12092 }
12093
12094 /*
12095 * Configure HBA MSI-X attention conditions to messages
12096 */
12097 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12098
12099 if (!pmb) {
12100 rc = -ENOMEM;
12101 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12102 "0474 Unable to allocate memory for issuing "
12103 "MBOX_CONFIG_MSI command\n");
12104 goto mem_fail_out;
12105 }
12106 rc = lpfc_config_msi(phba, pmb);
12107 if (rc)
12108 goto mbx_fail_out;
12109 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12110 if (rc != MBX_SUCCESS) {
12111 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12112 "0351 Config MSI mailbox command failed, "
12113 "mbxCmd x%x, mbxStatus x%x\n",
12114 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12115 goto mbx_fail_out;
12116 }
12117
12118 /* Free memory allocated for mailbox command */
12119 mempool_free(pmb, phba->mbox_mem_pool);
12120 return rc;
12121
12122 mbx_fail_out:
12123 /* Free memory allocated for mailbox command */
12124 mempool_free(pmb, phba->mbox_mem_pool);
12125
12126 mem_fail_out:
12127 /* free the irq already requested */
12128 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12129
12130 irq_fail_out:
12131 /* free the irq already requested */
12132 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12133
12134 msi_fail_out:
12135 /* Unconfigure MSI-X capability structure */
12136 pci_free_irq_vectors(phba->pcidev);
12137
12138 vec_fail_out:
12139 return rc;
12140 }
12141
12142 /**
12143 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12144 * @phba: pointer to lpfc hba data structure.
12145 *
12146 * This routine is invoked to enable the MSI interrupt mode to device with
12147 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12148 * enable the MSI vector. The device driver is responsible for calling the
12149 * request_irq() to register MSI vector with a interrupt the handler, which
12150 * is done in this function.
12151 *
12152 * Return codes
12153 * 0 - successful
12154 * other values - error
12155 */
12156 static int
lpfc_sli_enable_msi(struct lpfc_hba * phba)12157 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12158 {
12159 int rc;
12160
12161 rc = pci_enable_msi(phba->pcidev);
12162 if (!rc)
12163 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12164 "0012 PCI enable MSI mode success.\n");
12165 else {
12166 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12167 "0471 PCI enable MSI mode failed (%d)\n", rc);
12168 return rc;
12169 }
12170
12171 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12172 0, LPFC_DRIVER_NAME, phba);
12173 if (rc) {
12174 pci_disable_msi(phba->pcidev);
12175 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12176 "0478 MSI request_irq failed (%d)\n", rc);
12177 }
12178 return rc;
12179 }
12180
12181 /**
12182 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12183 * @phba: pointer to lpfc hba data structure.
12184 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12185 *
12186 * This routine is invoked to enable device interrupt and associate driver's
12187 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12188 * spec. Depends on the interrupt mode configured to the driver, the driver
12189 * will try to fallback from the configured interrupt mode to an interrupt
12190 * mode which is supported by the platform, kernel, and device in the order
12191 * of:
12192 * MSI-X -> MSI -> IRQ.
12193 *
12194 * Return codes
12195 * 0 - successful
12196 * other values - error
12197 **/
12198 static uint32_t
lpfc_sli_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)12199 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12200 {
12201 uint32_t intr_mode = LPFC_INTR_ERROR;
12202 int retval;
12203
12204 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12205 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12206 if (retval)
12207 return intr_mode;
12208 clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag);
12209
12210 if (cfg_mode == 2) {
12211 /* Now, try to enable MSI-X interrupt mode */
12212 retval = lpfc_sli_enable_msix(phba);
12213 if (!retval) {
12214 /* Indicate initialization to MSI-X mode */
12215 phba->intr_type = MSIX;
12216 intr_mode = 2;
12217 }
12218 }
12219
12220 /* Fallback to MSI if MSI-X initialization failed */
12221 if (cfg_mode >= 1 && phba->intr_type == NONE) {
12222 retval = lpfc_sli_enable_msi(phba);
12223 if (!retval) {
12224 /* Indicate initialization to MSI mode */
12225 phba->intr_type = MSI;
12226 intr_mode = 1;
12227 }
12228 }
12229
12230 /* Fallback to INTx if both MSI-X/MSI initalization failed */
12231 if (phba->intr_type == NONE) {
12232 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12233 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12234 if (!retval) {
12235 /* Indicate initialization to INTx mode */
12236 phba->intr_type = INTx;
12237 intr_mode = 0;
12238 }
12239 }
12240 return intr_mode;
12241 }
12242
12243 /**
12244 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12245 * @phba: pointer to lpfc hba data structure.
12246 *
12247 * This routine is invoked to disable device interrupt and disassociate the
12248 * driver's interrupt handler(s) from interrupt vector(s) to device with
12249 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12250 * release the interrupt vector(s) for the message signaled interrupt.
12251 **/
12252 static void
lpfc_sli_disable_intr(struct lpfc_hba * phba)12253 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12254 {
12255 int nr_irqs, i;
12256
12257 if (phba->intr_type == MSIX)
12258 nr_irqs = LPFC_MSIX_VECTORS;
12259 else
12260 nr_irqs = 1;
12261
12262 for (i = 0; i < nr_irqs; i++)
12263 free_irq(pci_irq_vector(phba->pcidev, i), phba);
12264 pci_free_irq_vectors(phba->pcidev);
12265
12266 /* Reset interrupt management states */
12267 phba->intr_type = NONE;
12268 phba->sli.slistat.sli_intr = 0;
12269 }
12270
12271 /**
12272 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12273 * @phba: pointer to lpfc hba data structure.
12274 * @id: EQ vector index or Hardware Queue index
12275 * @match: LPFC_FIND_BY_EQ = match by EQ
12276 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
12277 * Return the CPU that matches the selection criteria
12278 */
12279 static uint16_t
lpfc_find_cpu_handle(struct lpfc_hba * phba,uint16_t id,int match)12280 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12281 {
12282 struct lpfc_vector_map_info *cpup;
12283 int cpu;
12284
12285 /* Loop through all CPUs */
12286 for_each_present_cpu(cpu) {
12287 cpup = &phba->sli4_hba.cpu_map[cpu];
12288
12289 /* If we are matching by EQ, there may be multiple CPUs using
12290 * using the same vector, so select the one with
12291 * LPFC_CPU_FIRST_IRQ set.
12292 */
12293 if ((match == LPFC_FIND_BY_EQ) &&
12294 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12295 (cpup->eq == id))
12296 return cpu;
12297
12298 /* If matching by HDWQ, select the first CPU that matches */
12299 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12300 return cpu;
12301 }
12302 return 0;
12303 }
12304
12305 #ifdef CONFIG_X86
12306 /**
12307 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12308 * @phba: pointer to lpfc hba data structure.
12309 * @cpu: CPU map index
12310 * @phys_id: CPU package physical id
12311 * @core_id: CPU core id
12312 */
12313 static int
lpfc_find_hyper(struct lpfc_hba * phba,int cpu,uint16_t phys_id,uint16_t core_id)12314 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12315 uint16_t phys_id, uint16_t core_id)
12316 {
12317 struct lpfc_vector_map_info *cpup;
12318 int idx;
12319
12320 for_each_present_cpu(idx) {
12321 cpup = &phba->sli4_hba.cpu_map[idx];
12322 /* Does the cpup match the one we are looking for */
12323 if ((cpup->phys_id == phys_id) &&
12324 (cpup->core_id == core_id) &&
12325 (cpu != idx))
12326 return 1;
12327 }
12328 return 0;
12329 }
12330 #endif
12331
12332 /*
12333 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12334 * @phba: pointer to lpfc hba data structure.
12335 * @eqidx: index for eq and irq vector
12336 * @flag: flags to set for vector_map structure
12337 * @cpu: cpu used to index vector_map structure
12338 *
12339 * The routine assigns eq info into vector_map structure
12340 */
12341 static inline void
lpfc_assign_eq_map_info(struct lpfc_hba * phba,uint16_t eqidx,uint16_t flag,unsigned int cpu)12342 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12343 unsigned int cpu)
12344 {
12345 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12346 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12347
12348 cpup->eq = eqidx;
12349 cpup->flag |= flag;
12350
12351 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12352 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12353 cpu, eqhdl->irq, cpup->eq, cpup->flag);
12354 }
12355
12356 /**
12357 * lpfc_cpu_map_array_init - Initialize cpu_map structure
12358 * @phba: pointer to lpfc hba data structure.
12359 *
12360 * The routine initializes the cpu_map array structure
12361 */
12362 static void
lpfc_cpu_map_array_init(struct lpfc_hba * phba)12363 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12364 {
12365 struct lpfc_vector_map_info *cpup;
12366 struct lpfc_eq_intr_info *eqi;
12367 int cpu;
12368
12369 for_each_possible_cpu(cpu) {
12370 cpup = &phba->sli4_hba.cpu_map[cpu];
12371 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12372 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12373 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12374 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12375 cpup->flag = 0;
12376 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12377 INIT_LIST_HEAD(&eqi->list);
12378 eqi->icnt = 0;
12379 }
12380 }
12381
12382 /**
12383 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12384 * @phba: pointer to lpfc hba data structure.
12385 *
12386 * The routine initializes the hba_eq_hdl array structure
12387 */
12388 static void
lpfc_hba_eq_hdl_array_init(struct lpfc_hba * phba)12389 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12390 {
12391 struct lpfc_hba_eq_hdl *eqhdl;
12392 int i;
12393
12394 for (i = 0; i < phba->cfg_irq_chann; i++) {
12395 eqhdl = lpfc_get_eq_hdl(i);
12396 eqhdl->irq = LPFC_IRQ_EMPTY;
12397 eqhdl->phba = phba;
12398 }
12399 }
12400
12401 /**
12402 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12403 * @phba: pointer to lpfc hba data structure.
12404 * @vectors: number of msix vectors allocated.
12405 *
12406 * The routine will figure out the CPU affinity assignment for every
12407 * MSI-X vector allocated for the HBA.
12408 * In addition, the CPU to IO channel mapping will be calculated
12409 * and the phba->sli4_hba.cpu_map array will reflect this.
12410 */
12411 static void
lpfc_cpu_affinity_check(struct lpfc_hba * phba,int vectors)12412 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12413 {
12414 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12415 int max_phys_id, min_phys_id;
12416 int max_core_id, min_core_id;
12417 struct lpfc_vector_map_info *cpup;
12418 struct lpfc_vector_map_info *new_cpup;
12419 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12420 struct lpfc_hdwq_stat *c_stat;
12421 #endif
12422
12423 max_phys_id = 0;
12424 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12425 max_core_id = 0;
12426 min_core_id = LPFC_VECTOR_MAP_EMPTY;
12427
12428 /* Update CPU map with physical id and core id of each CPU */
12429 for_each_present_cpu(cpu) {
12430 cpup = &phba->sli4_hba.cpu_map[cpu];
12431 #ifdef CONFIG_X86
12432 cpup->phys_id = topology_physical_package_id(cpu);
12433 cpup->core_id = topology_core_id(cpu);
12434 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12435 cpup->flag |= LPFC_CPU_MAP_HYPER;
12436 #else
12437 /* No distinction between CPUs for other platforms */
12438 cpup->phys_id = 0;
12439 cpup->core_id = cpu;
12440 #endif
12441
12442 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12443 "3328 CPU %d physid %d coreid %d flag x%x\n",
12444 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12445
12446 if (cpup->phys_id > max_phys_id)
12447 max_phys_id = cpup->phys_id;
12448 if (cpup->phys_id < min_phys_id)
12449 min_phys_id = cpup->phys_id;
12450
12451 if (cpup->core_id > max_core_id)
12452 max_core_id = cpup->core_id;
12453 if (cpup->core_id < min_core_id)
12454 min_core_id = cpup->core_id;
12455 }
12456
12457 /* After looking at each irq vector assigned to this pcidev, its
12458 * possible to see that not ALL CPUs have been accounted for.
12459 * Next we will set any unassigned (unaffinitized) cpu map
12460 * entries to a IRQ on the same phys_id.
12461 */
12462 first_cpu = cpumask_first(cpu_present_mask);
12463 start_cpu = first_cpu;
12464
12465 for_each_present_cpu(cpu) {
12466 cpup = &phba->sli4_hba.cpu_map[cpu];
12467
12468 /* Is this CPU entry unassigned */
12469 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12470 /* Mark CPU as IRQ not assigned by the kernel */
12471 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12472
12473 /* If so, find a new_cpup that is on the SAME
12474 * phys_id as cpup. start_cpu will start where we
12475 * left off so all unassigned entries don't get assgined
12476 * the IRQ of the first entry.
12477 */
12478 new_cpu = start_cpu;
12479 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12480 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12481 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12482 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12483 (new_cpup->phys_id == cpup->phys_id))
12484 goto found_same;
12485 new_cpu = lpfc_next_present_cpu(new_cpu);
12486 }
12487 /* At this point, we leave the CPU as unassigned */
12488 continue;
12489 found_same:
12490 /* We found a matching phys_id, so copy the IRQ info */
12491 cpup->eq = new_cpup->eq;
12492
12493 /* Bump start_cpu to the next slot to minmize the
12494 * chance of having multiple unassigned CPU entries
12495 * selecting the same IRQ.
12496 */
12497 start_cpu = lpfc_next_present_cpu(new_cpu);
12498
12499 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12500 "3337 Set Affinity: CPU %d "
12501 "eq %d from peer cpu %d same "
12502 "phys_id (%d)\n",
12503 cpu, cpup->eq, new_cpu,
12504 cpup->phys_id);
12505 }
12506 }
12507
12508 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
12509 start_cpu = first_cpu;
12510
12511 for_each_present_cpu(cpu) {
12512 cpup = &phba->sli4_hba.cpu_map[cpu];
12513
12514 /* Is this entry unassigned */
12515 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12516 /* Mark it as IRQ not assigned by the kernel */
12517 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12518
12519 /* If so, find a new_cpup thats on ANY phys_id
12520 * as the cpup. start_cpu will start where we
12521 * left off so all unassigned entries don't get
12522 * assigned the IRQ of the first entry.
12523 */
12524 new_cpu = start_cpu;
12525 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12526 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12527 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12528 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12529 goto found_any;
12530 new_cpu = lpfc_next_present_cpu(new_cpu);
12531 }
12532 /* We should never leave an entry unassigned */
12533 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12534 "3339 Set Affinity: CPU %d "
12535 "eq %d UNASSIGNED\n",
12536 cpup->hdwq, cpup->eq);
12537 continue;
12538 found_any:
12539 /* We found an available entry, copy the IRQ info */
12540 cpup->eq = new_cpup->eq;
12541
12542 /* Bump start_cpu to the next slot to minmize the
12543 * chance of having multiple unassigned CPU entries
12544 * selecting the same IRQ.
12545 */
12546 start_cpu = lpfc_next_present_cpu(new_cpu);
12547
12548 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12549 "3338 Set Affinity: CPU %d "
12550 "eq %d from peer cpu %d (%d/%d)\n",
12551 cpu, cpup->eq, new_cpu,
12552 new_cpup->phys_id, new_cpup->core_id);
12553 }
12554 }
12555
12556 /* Assign hdwq indices that are unique across all cpus in the map
12557 * that are also FIRST_CPUs.
12558 */
12559 idx = 0;
12560 for_each_present_cpu(cpu) {
12561 cpup = &phba->sli4_hba.cpu_map[cpu];
12562
12563 /* Only FIRST IRQs get a hdwq index assignment. */
12564 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12565 continue;
12566
12567 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12568 cpup->hdwq = idx;
12569 idx++;
12570 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12571 "3333 Set Affinity: CPU %d (phys %d core %d): "
12572 "hdwq %d eq %d flg x%x\n",
12573 cpu, cpup->phys_id, cpup->core_id,
12574 cpup->hdwq, cpup->eq, cpup->flag);
12575 }
12576 /* Associate a hdwq with each cpu_map entry
12577 * This will be 1 to 1 - hdwq to cpu, unless there are less
12578 * hardware queues then CPUs. For that case we will just round-robin
12579 * the available hardware queues as they get assigned to CPUs.
12580 * The next_idx is the idx from the FIRST_CPU loop above to account
12581 * for irq_chann < hdwq. The idx is used for round-robin assignments
12582 * and needs to start at 0.
12583 */
12584 next_idx = idx;
12585 start_cpu = 0;
12586 idx = 0;
12587 for_each_present_cpu(cpu) {
12588 cpup = &phba->sli4_hba.cpu_map[cpu];
12589
12590 /* FIRST cpus are already mapped. */
12591 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12592 continue;
12593
12594 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12595 * of the unassigned cpus to the next idx so that all
12596 * hdw queues are fully utilized.
12597 */
12598 if (next_idx < phba->cfg_hdw_queue) {
12599 cpup->hdwq = next_idx;
12600 next_idx++;
12601 continue;
12602 }
12603
12604 /* Not a First CPU and all hdw_queues are used. Reuse a
12605 * Hardware Queue for another CPU, so be smart about it
12606 * and pick one that has its IRQ/EQ mapped to the same phys_id
12607 * (CPU package) and core_id.
12608 */
12609 new_cpu = start_cpu;
12610 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12611 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12612 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12613 new_cpup->phys_id == cpup->phys_id &&
12614 new_cpup->core_id == cpup->core_id) {
12615 goto found_hdwq;
12616 }
12617 new_cpu = lpfc_next_present_cpu(new_cpu);
12618 }
12619
12620 /* If we can't match both phys_id and core_id,
12621 * settle for just a phys_id match.
12622 */
12623 new_cpu = start_cpu;
12624 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12625 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12626 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12627 new_cpup->phys_id == cpup->phys_id)
12628 goto found_hdwq;
12629 new_cpu = lpfc_next_present_cpu(new_cpu);
12630 }
12631
12632 /* Otherwise just round robin on cfg_hdw_queue */
12633 cpup->hdwq = idx % phba->cfg_hdw_queue;
12634 idx++;
12635 goto logit;
12636 found_hdwq:
12637 /* We found an available entry, copy the IRQ info */
12638 start_cpu = lpfc_next_present_cpu(new_cpu);
12639 cpup->hdwq = new_cpup->hdwq;
12640 logit:
12641 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12642 "3335 Set Affinity: CPU %d (phys %d core %d): "
12643 "hdwq %d eq %d flg x%x\n",
12644 cpu, cpup->phys_id, cpup->core_id,
12645 cpup->hdwq, cpup->eq, cpup->flag);
12646 }
12647
12648 /*
12649 * Initialize the cpu_map slots for not-present cpus in case
12650 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12651 */
12652 idx = 0;
12653 for_each_possible_cpu(cpu) {
12654 cpup = &phba->sli4_hba.cpu_map[cpu];
12655 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12656 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12657 c_stat->hdwq_no = cpup->hdwq;
12658 #endif
12659 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12660 continue;
12661
12662 cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12663 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12664 c_stat->hdwq_no = cpup->hdwq;
12665 #endif
12666 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12667 "3340 Set Affinity: not present "
12668 "CPU %d hdwq %d\n",
12669 cpu, cpup->hdwq);
12670 }
12671
12672 /* The cpu_map array will be used later during initialization
12673 * when EQ / CQ / WQs are allocated and configured.
12674 */
12675 return;
12676 }
12677
12678 /**
12679 * lpfc_cpuhp_get_eq
12680 *
12681 * @phba: pointer to lpfc hba data structure.
12682 * @cpu: cpu going offline
12683 * @eqlist: eq list to append to
12684 */
12685 static int
lpfc_cpuhp_get_eq(struct lpfc_hba * phba,unsigned int cpu,struct list_head * eqlist)12686 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12687 struct list_head *eqlist)
12688 {
12689 const struct cpumask *maskp;
12690 struct lpfc_queue *eq;
12691 struct cpumask *tmp;
12692 u16 idx;
12693
12694 tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12695 if (!tmp)
12696 return -ENOMEM;
12697
12698 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12699 maskp = pci_irq_get_affinity(phba->pcidev, idx);
12700 if (!maskp)
12701 continue;
12702 /*
12703 * if irq is not affinitized to the cpu going
12704 * then we don't need to poll the eq attached
12705 * to it.
12706 */
12707 if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12708 continue;
12709 /* get the cpus that are online and are affini-
12710 * tized to this irq vector. If the count is
12711 * more than 1 then cpuhp is not going to shut-
12712 * down this vector. Since this cpu has not
12713 * gone offline yet, we need >1.
12714 */
12715 cpumask_and(tmp, maskp, cpu_online_mask);
12716 if (cpumask_weight(tmp) > 1)
12717 continue;
12718
12719 /* Now that we have an irq to shutdown, get the eq
12720 * mapped to this irq. Note: multiple hdwq's in
12721 * the software can share an eq, but eventually
12722 * only eq will be mapped to this vector
12723 */
12724 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12725 list_add(&eq->_poll_list, eqlist);
12726 }
12727 kfree(tmp);
12728 return 0;
12729 }
12730
__lpfc_cpuhp_remove(struct lpfc_hba * phba)12731 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12732 {
12733 if (phba->sli_rev != LPFC_SLI_REV4)
12734 return;
12735
12736 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12737 &phba->cpuhp);
12738 /*
12739 * unregistering the instance doesn't stop the polling
12740 * timer. Wait for the poll timer to retire.
12741 */
12742 synchronize_rcu();
12743 timer_delete_sync(&phba->cpuhp_poll_timer);
12744 }
12745
lpfc_cpuhp_remove(struct lpfc_hba * phba)12746 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12747 {
12748 if (phba->pport &&
12749 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
12750 return;
12751
12752 __lpfc_cpuhp_remove(phba);
12753 }
12754
lpfc_cpuhp_add(struct lpfc_hba * phba)12755 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12756 {
12757 if (phba->sli_rev != LPFC_SLI_REV4)
12758 return;
12759
12760 rcu_read_lock();
12761
12762 if (!list_empty(&phba->poll_list))
12763 mod_timer(&phba->cpuhp_poll_timer,
12764 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12765
12766 rcu_read_unlock();
12767
12768 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12769 &phba->cpuhp);
12770 }
12771
__lpfc_cpuhp_checks(struct lpfc_hba * phba,int * retval)12772 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12773 {
12774 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
12775 *retval = -EAGAIN;
12776 return true;
12777 }
12778
12779 if (phba->sli_rev != LPFC_SLI_REV4) {
12780 *retval = 0;
12781 return true;
12782 }
12783
12784 /* proceed with the hotplug */
12785 return false;
12786 }
12787
12788 /**
12789 * lpfc_irq_set_aff - set IRQ affinity
12790 * @eqhdl: EQ handle
12791 * @cpu: cpu to set affinity
12792 *
12793 **/
12794 static inline void
lpfc_irq_set_aff(struct lpfc_hba_eq_hdl * eqhdl,unsigned int cpu)12795 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12796 {
12797 cpumask_clear(&eqhdl->aff_mask);
12798 cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12799 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12800 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12801 }
12802
12803 /**
12804 * lpfc_irq_clear_aff - clear IRQ affinity
12805 * @eqhdl: EQ handle
12806 *
12807 **/
12808 static inline void
lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl * eqhdl)12809 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12810 {
12811 cpumask_clear(&eqhdl->aff_mask);
12812 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12813 }
12814
12815 /**
12816 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12817 * @phba: pointer to HBA context object.
12818 * @cpu: cpu going offline/online
12819 * @offline: true, cpu is going offline. false, cpu is coming online.
12820 *
12821 * If cpu is going offline, we'll try our best effort to find the next
12822 * online cpu on the phba's original_mask and migrate all offlining IRQ
12823 * affinities.
12824 *
12825 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12826 *
12827 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12828 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12829 *
12830 **/
12831 static void
lpfc_irq_rebalance(struct lpfc_hba * phba,unsigned int cpu,bool offline)12832 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12833 {
12834 struct lpfc_vector_map_info *cpup;
12835 struct cpumask *aff_mask;
12836 unsigned int cpu_select, cpu_next, idx;
12837 const struct cpumask *orig_mask;
12838
12839 if (phba->irq_chann_mode == NORMAL_MODE)
12840 return;
12841
12842 orig_mask = &phba->sli4_hba.irq_aff_mask;
12843
12844 if (!cpumask_test_cpu(cpu, orig_mask))
12845 return;
12846
12847 cpup = &phba->sli4_hba.cpu_map[cpu];
12848
12849 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12850 return;
12851
12852 if (offline) {
12853 /* Find next online CPU on original mask */
12854 cpu_next = cpumask_next_wrap(cpu, orig_mask);
12855 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12856
12857 /* Found a valid CPU */
12858 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12859 /* Go through each eqhdl and ensure offlining
12860 * cpu aff_mask is migrated
12861 */
12862 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12863 aff_mask = lpfc_get_aff_mask(idx);
12864
12865 /* Migrate affinity */
12866 if (cpumask_test_cpu(cpu, aff_mask))
12867 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12868 cpu_select);
12869 }
12870 } else {
12871 /* Rely on irqbalance if no online CPUs left on NUMA */
12872 for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12873 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12874 }
12875 } else {
12876 /* Migrate affinity back to this CPU */
12877 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12878 }
12879 }
12880
lpfc_cpu_offline(unsigned int cpu,struct hlist_node * node)12881 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12882 {
12883 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12884 struct lpfc_queue *eq, *next;
12885 LIST_HEAD(eqlist);
12886 int retval;
12887
12888 if (!phba) {
12889 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12890 return 0;
12891 }
12892
12893 if (__lpfc_cpuhp_checks(phba, &retval))
12894 return retval;
12895
12896 lpfc_irq_rebalance(phba, cpu, true);
12897
12898 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12899 if (retval)
12900 return retval;
12901
12902 /* start polling on these eq's */
12903 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12904 list_del_init(&eq->_poll_list);
12905 lpfc_sli4_start_polling(eq);
12906 }
12907
12908 return 0;
12909 }
12910
lpfc_cpu_online(unsigned int cpu,struct hlist_node * node)12911 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12912 {
12913 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12914 struct lpfc_queue *eq, *next;
12915 unsigned int n;
12916 int retval;
12917
12918 if (!phba) {
12919 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12920 return 0;
12921 }
12922
12923 if (__lpfc_cpuhp_checks(phba, &retval))
12924 return retval;
12925
12926 lpfc_irq_rebalance(phba, cpu, false);
12927
12928 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12929 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12930 if (n == cpu)
12931 lpfc_sli4_stop_polling(eq);
12932 }
12933
12934 return 0;
12935 }
12936
12937 /**
12938 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12939 * @phba: pointer to lpfc hba data structure.
12940 *
12941 * This routine is invoked to enable the MSI-X interrupt vectors to device
12942 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
12943 * to cpus on the system.
12944 *
12945 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12946 * the number of cpus on the same numa node as this adapter. The vectors are
12947 * allocated without requesting OS affinity mapping. A vector will be
12948 * allocated and assigned to each online and offline cpu. If the cpu is
12949 * online, then affinity will be set to that cpu. If the cpu is offline, then
12950 * affinity will be set to the nearest peer cpu within the numa node that is
12951 * online. If there are no online cpus within the numa node, affinity is not
12952 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12953 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12954 * configured.
12955 *
12956 * If numa mode is not enabled and there is more than 1 vector allocated, then
12957 * the driver relies on the managed irq interface where the OS assigns vector to
12958 * cpu affinity. The driver will then use that affinity mapping to setup its
12959 * cpu mapping table.
12960 *
12961 * Return codes
12962 * 0 - successful
12963 * other values - error
12964 **/
12965 static int
lpfc_sli4_enable_msix(struct lpfc_hba * phba)12966 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
12967 {
12968 int vectors, rc, index;
12969 char *name;
12970 const struct cpumask *aff_mask = NULL;
12971 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
12972 struct lpfc_vector_map_info *cpup;
12973 struct lpfc_hba_eq_hdl *eqhdl;
12974 const struct cpumask *maskp;
12975 unsigned int flags = PCI_IRQ_MSIX;
12976
12977 /* Set up MSI-X multi-message vectors */
12978 vectors = phba->cfg_irq_chann;
12979
12980 if (phba->irq_chann_mode != NORMAL_MODE)
12981 aff_mask = &phba->sli4_hba.irq_aff_mask;
12982
12983 if (aff_mask) {
12984 cpu_cnt = cpumask_weight(aff_mask);
12985 vectors = min(phba->cfg_irq_chann, cpu_cnt);
12986
12987 /* cpu: iterates over aff_mask including offline or online
12988 * cpu_select: iterates over online aff_mask to set affinity
12989 */
12990 cpu = cpumask_first(aff_mask);
12991 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
12992 } else {
12993 flags |= PCI_IRQ_AFFINITY;
12994 }
12995
12996 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
12997 if (rc < 0) {
12998 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12999 "0484 PCI enable MSI-X failed (%d)\n", rc);
13000 goto vec_fail_out;
13001 }
13002 vectors = rc;
13003
13004 /* Assign MSI-X vectors to interrupt handlers */
13005 for (index = 0; index < vectors; index++) {
13006 eqhdl = lpfc_get_eq_hdl(index);
13007 name = eqhdl->handler_name;
13008 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13009 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13010 LPFC_DRIVER_HANDLER_NAME"%d", index);
13011
13012 eqhdl->idx = index;
13013 rc = pci_irq_vector(phba->pcidev, index);
13014 if (rc < 0) {
13015 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13016 "0489 MSI-X fast-path (%d) "
13017 "pci_irq_vec failed (%d)\n", index, rc);
13018 goto cfg_fail_out;
13019 }
13020 eqhdl->irq = rc;
13021
13022 rc = request_threaded_irq(eqhdl->irq,
13023 &lpfc_sli4_hba_intr_handler,
13024 &lpfc_sli4_hba_intr_handler_th,
13025 0, name, eqhdl);
13026 if (rc) {
13027 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13028 "0486 MSI-X fast-path (%d) "
13029 "request_irq failed (%d)\n", index, rc);
13030 goto cfg_fail_out;
13031 }
13032
13033 if (aff_mask) {
13034 /* If found a neighboring online cpu, set affinity */
13035 if (cpu_select < nr_cpu_ids)
13036 lpfc_irq_set_aff(eqhdl, cpu_select);
13037
13038 /* Assign EQ to cpu_map */
13039 lpfc_assign_eq_map_info(phba, index,
13040 LPFC_CPU_FIRST_IRQ,
13041 cpu);
13042
13043 /* Iterate to next offline or online cpu in aff_mask */
13044 cpu = cpumask_next(cpu, aff_mask);
13045
13046 /* Find next online cpu in aff_mask to set affinity */
13047 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13048 } else if (vectors == 1) {
13049 cpu = cpumask_first(cpu_present_mask);
13050 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13051 cpu);
13052 } else {
13053 maskp = pci_irq_get_affinity(phba->pcidev, index);
13054
13055 /* Loop through all CPUs associated with vector index */
13056 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13057 cpup = &phba->sli4_hba.cpu_map[cpu];
13058
13059 /* If this is the first CPU thats assigned to
13060 * this vector, set LPFC_CPU_FIRST_IRQ.
13061 *
13062 * With certain platforms its possible that irq
13063 * vectors are affinitized to all the cpu's.
13064 * This can result in each cpu_map.eq to be set
13065 * to the last vector, resulting in overwrite
13066 * of all the previous cpu_map.eq. Ensure that
13067 * each vector receives a place in cpu_map.
13068 * Later call to lpfc_cpu_affinity_check will
13069 * ensure we are nicely balanced out.
13070 */
13071 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13072 continue;
13073 lpfc_assign_eq_map_info(phba, index,
13074 LPFC_CPU_FIRST_IRQ,
13075 cpu);
13076 break;
13077 }
13078 }
13079 }
13080
13081 if (vectors != phba->cfg_irq_chann) {
13082 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13083 "3238 Reducing IO channels to match number of "
13084 "MSI-X vectors, requested %d got %d\n",
13085 phba->cfg_irq_chann, vectors);
13086 if (phba->cfg_irq_chann > vectors)
13087 phba->cfg_irq_chann = vectors;
13088 }
13089
13090 return rc;
13091
13092 cfg_fail_out:
13093 /* free the irq already requested */
13094 for (--index; index >= 0; index--) {
13095 eqhdl = lpfc_get_eq_hdl(index);
13096 lpfc_irq_clear_aff(eqhdl);
13097 free_irq(eqhdl->irq, eqhdl);
13098 }
13099
13100 /* Unconfigure MSI-X capability structure */
13101 pci_free_irq_vectors(phba->pcidev);
13102
13103 vec_fail_out:
13104 return rc;
13105 }
13106
13107 /**
13108 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13109 * @phba: pointer to lpfc hba data structure.
13110 *
13111 * This routine is invoked to enable the MSI interrupt mode to device with
13112 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13113 * called to enable the MSI vector. The device driver is responsible for
13114 * calling the request_irq() to register MSI vector with a interrupt the
13115 * handler, which is done in this function.
13116 *
13117 * Return codes
13118 * 0 - successful
13119 * other values - error
13120 **/
13121 static int
lpfc_sli4_enable_msi(struct lpfc_hba * phba)13122 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13123 {
13124 int rc, index;
13125 unsigned int cpu;
13126 struct lpfc_hba_eq_hdl *eqhdl;
13127
13128 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13129 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13130 if (rc > 0)
13131 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13132 "0487 PCI enable MSI mode success.\n");
13133 else {
13134 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13135 "0488 PCI enable MSI mode failed (%d)\n", rc);
13136 return rc ? rc : -1;
13137 }
13138
13139 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13140 0, LPFC_DRIVER_NAME, phba);
13141 if (rc) {
13142 pci_free_irq_vectors(phba->pcidev);
13143 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13144 "0490 MSI request_irq failed (%d)\n", rc);
13145 return rc;
13146 }
13147
13148 eqhdl = lpfc_get_eq_hdl(0);
13149 rc = pci_irq_vector(phba->pcidev, 0);
13150 if (rc < 0) {
13151 free_irq(phba->pcidev->irq, phba);
13152 pci_free_irq_vectors(phba->pcidev);
13153 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13154 "0496 MSI pci_irq_vec failed (%d)\n", rc);
13155 return rc;
13156 }
13157 eqhdl->irq = rc;
13158
13159 cpu = cpumask_first(cpu_present_mask);
13160 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13161
13162 for (index = 0; index < phba->cfg_irq_chann; index++) {
13163 eqhdl = lpfc_get_eq_hdl(index);
13164 eqhdl->idx = index;
13165 }
13166
13167 return 0;
13168 }
13169
13170 /**
13171 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13172 * @phba: pointer to lpfc hba data structure.
13173 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13174 *
13175 * This routine is invoked to enable device interrupt and associate driver's
13176 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13177 * interface spec. Depends on the interrupt mode configured to the driver,
13178 * the driver will try to fallback from the configured interrupt mode to an
13179 * interrupt mode which is supported by the platform, kernel, and device in
13180 * the order of:
13181 * MSI-X -> MSI -> IRQ.
13182 *
13183 * Return codes
13184 * Interrupt mode (2, 1, 0) - successful
13185 * LPFC_INTR_ERROR - error
13186 **/
13187 static uint32_t
lpfc_sli4_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)13188 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13189 {
13190 uint32_t intr_mode = LPFC_INTR_ERROR;
13191 int retval, idx;
13192
13193 if (cfg_mode == 2) {
13194 /* Preparation before conf_msi mbox cmd */
13195 retval = 0;
13196 if (!retval) {
13197 /* Now, try to enable MSI-X interrupt mode */
13198 retval = lpfc_sli4_enable_msix(phba);
13199 if (!retval) {
13200 /* Indicate initialization to MSI-X mode */
13201 phba->intr_type = MSIX;
13202 intr_mode = 2;
13203 }
13204 }
13205 }
13206
13207 /* Fallback to MSI if MSI-X initialization failed */
13208 if (cfg_mode >= 1 && phba->intr_type == NONE) {
13209 retval = lpfc_sli4_enable_msi(phba);
13210 if (!retval) {
13211 /* Indicate initialization to MSI mode */
13212 phba->intr_type = MSI;
13213 intr_mode = 1;
13214 }
13215 }
13216
13217 /* Fallback to INTx if both MSI-X/MSI initalization failed */
13218 if (phba->intr_type == NONE) {
13219 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13220 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13221 if (!retval) {
13222 struct lpfc_hba_eq_hdl *eqhdl;
13223 unsigned int cpu;
13224
13225 /* Indicate initialization to INTx mode */
13226 phba->intr_type = INTx;
13227 intr_mode = 0;
13228
13229 eqhdl = lpfc_get_eq_hdl(0);
13230 retval = pci_irq_vector(phba->pcidev, 0);
13231 if (retval < 0) {
13232 free_irq(phba->pcidev->irq, phba);
13233 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13234 "0502 INTR pci_irq_vec failed (%d)\n",
13235 retval);
13236 return LPFC_INTR_ERROR;
13237 }
13238 eqhdl->irq = retval;
13239
13240 cpu = cpumask_first(cpu_present_mask);
13241 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13242 cpu);
13243 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13244 eqhdl = lpfc_get_eq_hdl(idx);
13245 eqhdl->idx = idx;
13246 }
13247 }
13248 }
13249 return intr_mode;
13250 }
13251
13252 /**
13253 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13254 * @phba: pointer to lpfc hba data structure.
13255 *
13256 * This routine is invoked to disable device interrupt and disassociate
13257 * the driver's interrupt handler(s) from interrupt vector(s) to device
13258 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13259 * will release the interrupt vector(s) for the message signaled interrupt.
13260 **/
13261 static void
lpfc_sli4_disable_intr(struct lpfc_hba * phba)13262 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13263 {
13264 /* Disable the currently initialized interrupt mode */
13265 if (phba->intr_type == MSIX) {
13266 int index;
13267 struct lpfc_hba_eq_hdl *eqhdl;
13268
13269 /* Free up MSI-X multi-message vectors */
13270 for (index = 0; index < phba->cfg_irq_chann; index++) {
13271 eqhdl = lpfc_get_eq_hdl(index);
13272 lpfc_irq_clear_aff(eqhdl);
13273 free_irq(eqhdl->irq, eqhdl);
13274 }
13275 } else {
13276 free_irq(phba->pcidev->irq, phba);
13277 }
13278
13279 pci_free_irq_vectors(phba->pcidev);
13280
13281 /* Reset interrupt management states */
13282 phba->intr_type = NONE;
13283 phba->sli.slistat.sli_intr = 0;
13284 }
13285
13286 /**
13287 * lpfc_unset_hba - Unset SLI3 hba device initialization
13288 * @phba: pointer to lpfc hba data structure.
13289 *
13290 * This routine is invoked to unset the HBA device initialization steps to
13291 * a device with SLI-3 interface spec.
13292 **/
13293 static void
lpfc_unset_hba(struct lpfc_hba * phba)13294 lpfc_unset_hba(struct lpfc_hba *phba)
13295 {
13296 set_bit(FC_UNLOADING, &phba->pport->load_flag);
13297
13298 kfree(phba->vpi_bmask);
13299 kfree(phba->vpi_ids);
13300
13301 lpfc_stop_hba_timers(phba);
13302
13303 phba->pport->work_port_events = 0;
13304
13305 lpfc_sli_hba_down(phba);
13306
13307 lpfc_sli_brdrestart(phba);
13308
13309 lpfc_sli_disable_intr(phba);
13310
13311 return;
13312 }
13313
13314 /**
13315 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13316 * @phba: Pointer to HBA context object.
13317 *
13318 * This function is called in the SLI4 code path to wait for completion
13319 * of device's XRIs exchange busy. It will check the XRI exchange busy
13320 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13321 * that, it will check the XRI exchange busy on outstanding FCP and ELS
13322 * I/Os every 30 seconds, log error message, and wait forever. Only when
13323 * all XRI exchange busy complete, the driver unload shall proceed with
13324 * invoking the function reset ioctl mailbox command to the CNA and the
13325 * the rest of the driver unload resource release.
13326 **/
13327 static void
lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba * phba)13328 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13329 {
13330 struct lpfc_sli4_hdw_queue *qp;
13331 int idx, ccnt;
13332 int wait_time = 0;
13333 int io_xri_cmpl = 1;
13334 int nvmet_xri_cmpl = 1;
13335 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13336
13337 /* Driver just aborted IOs during the hba_unset process. Pause
13338 * here to give the HBA time to complete the IO and get entries
13339 * into the abts lists.
13340 */
13341 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13342
13343 /* Wait for NVME pending IO to flush back to transport. */
13344 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13345 lpfc_nvme_wait_for_io_drain(phba);
13346
13347 ccnt = 0;
13348 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13349 qp = &phba->sli4_hba.hdwq[idx];
13350 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13351 if (!io_xri_cmpl) /* if list is NOT empty */
13352 ccnt++;
13353 }
13354 if (ccnt)
13355 io_xri_cmpl = 0;
13356
13357 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13358 nvmet_xri_cmpl =
13359 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13360 }
13361
13362 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13363 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13364 if (!nvmet_xri_cmpl)
13365 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13366 "6424 NVMET XRI exchange busy "
13367 "wait time: %d seconds.\n",
13368 wait_time/1000);
13369 if (!io_xri_cmpl)
13370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13371 "6100 IO XRI exchange busy "
13372 "wait time: %d seconds.\n",
13373 wait_time/1000);
13374 if (!els_xri_cmpl)
13375 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13376 "2878 ELS XRI exchange busy "
13377 "wait time: %d seconds.\n",
13378 wait_time/1000);
13379 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13380 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13381 } else {
13382 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13383 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13384 }
13385
13386 ccnt = 0;
13387 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13388 qp = &phba->sli4_hba.hdwq[idx];
13389 io_xri_cmpl = list_empty(
13390 &qp->lpfc_abts_io_buf_list);
13391 if (!io_xri_cmpl) /* if list is NOT empty */
13392 ccnt++;
13393 }
13394 if (ccnt)
13395 io_xri_cmpl = 0;
13396
13397 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13398 nvmet_xri_cmpl = list_empty(
13399 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13400 }
13401 els_xri_cmpl =
13402 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13403
13404 }
13405 }
13406
13407 /**
13408 * lpfc_sli4_hba_unset - Unset the fcoe hba
13409 * @phba: Pointer to HBA context object.
13410 *
13411 * This function is called in the SLI4 code path to reset the HBA's FCoE
13412 * function. The caller is not required to hold any lock. This routine
13413 * issues PCI function reset mailbox command to reset the FCoE function.
13414 * At the end of the function, it calls lpfc_hba_down_post function to
13415 * free any pending commands.
13416 **/
13417 static void
lpfc_sli4_hba_unset(struct lpfc_hba * phba)13418 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13419 {
13420 int wait_cnt = 0;
13421 LPFC_MBOXQ_t *mboxq;
13422 struct pci_dev *pdev = phba->pcidev;
13423
13424 lpfc_stop_hba_timers(phba);
13425 hrtimer_cancel(&phba->cmf_stats_timer);
13426 hrtimer_cancel(&phba->cmf_timer);
13427
13428 if (phba->pport)
13429 phba->sli4_hba.intr_enable = 0;
13430
13431 /*
13432 * Gracefully wait out the potential current outstanding asynchronous
13433 * mailbox command.
13434 */
13435
13436 /* First, block any pending async mailbox command from posted */
13437 spin_lock_irq(&phba->hbalock);
13438 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13439 spin_unlock_irq(&phba->hbalock);
13440 /* Now, trying to wait it out if we can */
13441 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13442 msleep(10);
13443 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13444 break;
13445 }
13446 /* Forcefully release the outstanding mailbox command if timed out */
13447 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13448 spin_lock_irq(&phba->hbalock);
13449 mboxq = phba->sli.mbox_active;
13450 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13451 __lpfc_mbox_cmpl_put(phba, mboxq);
13452 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13453 phba->sli.mbox_active = NULL;
13454 spin_unlock_irq(&phba->hbalock);
13455 }
13456
13457 /* Abort all iocbs associated with the hba */
13458 lpfc_sli_hba_iocb_abort(phba);
13459
13460 if (!pci_channel_offline(phba->pcidev))
13461 /* Wait for completion of device XRI exchange busy */
13462 lpfc_sli4_xri_exchange_busy_wait(phba);
13463
13464 /* per-phba callback de-registration for hotplug event */
13465 if (phba->pport)
13466 lpfc_cpuhp_remove(phba);
13467
13468 /* Disable PCI subsystem interrupt */
13469 lpfc_sli4_disable_intr(phba);
13470
13471 /* Disable SR-IOV if enabled */
13472 if (phba->cfg_sriov_nr_virtfn)
13473 pci_disable_sriov(pdev);
13474
13475 /* Stop kthread signal shall trigger work_done one more time */
13476 kthread_stop(phba->worker_thread);
13477
13478 /* Disable FW logging to host memory */
13479 lpfc_ras_stop_fwlog(phba);
13480
13481 lpfc_sli4_queue_unset(phba);
13482
13483 /* Reset SLI4 HBA FCoE function */
13484 lpfc_pci_function_reset(phba);
13485
13486 /* release all queue allocated resources. */
13487 lpfc_sli4_queue_destroy(phba);
13488
13489 /* Free RAS DMA memory */
13490 if (phba->ras_fwlog.ras_enabled)
13491 lpfc_sli4_ras_dma_free(phba);
13492
13493 /* Stop the SLI4 device port */
13494 if (phba->pport)
13495 phba->pport->work_port_events = 0;
13496 }
13497
13498 static uint32_t
lpfc_cgn_crc32(uint32_t crc,u8 byte)13499 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13500 {
13501 uint32_t msb = 0;
13502 uint32_t bit;
13503
13504 for (bit = 0; bit < 8; bit++) {
13505 msb = (crc >> 31) & 1;
13506 crc <<= 1;
13507
13508 if (msb ^ (byte & 1)) {
13509 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13510 crc |= 1;
13511 }
13512 byte >>= 1;
13513 }
13514 return crc;
13515 }
13516
13517 static uint32_t
lpfc_cgn_reverse_bits(uint32_t wd)13518 lpfc_cgn_reverse_bits(uint32_t wd)
13519 {
13520 uint32_t result = 0;
13521 uint32_t i;
13522
13523 for (i = 0; i < 32; i++) {
13524 result <<= 1;
13525 result |= (1 & (wd >> i));
13526 }
13527 return result;
13528 }
13529
13530 /*
13531 * The routine corresponds with the algorithm the HBA firmware
13532 * uses to validate the data integrity.
13533 */
13534 uint32_t
lpfc_cgn_calc_crc32(void * ptr,uint32_t byteLen,uint32_t crc)13535 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13536 {
13537 uint32_t i;
13538 uint32_t result;
13539 uint8_t *data = (uint8_t *)ptr;
13540
13541 for (i = 0; i < byteLen; ++i)
13542 crc = lpfc_cgn_crc32(crc, data[i]);
13543
13544 result = ~lpfc_cgn_reverse_bits(crc);
13545 return result;
13546 }
13547
13548 void
lpfc_init_congestion_buf(struct lpfc_hba * phba)13549 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13550 {
13551 struct lpfc_cgn_info *cp;
13552 uint16_t size;
13553 uint32_t crc;
13554
13555 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13556 "6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13557
13558 if (!phba->cgn_i)
13559 return;
13560 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13561
13562 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13563 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13564 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13565 atomic_set(&phba->cgn_sync_warn_cnt, 0);
13566
13567 atomic_set(&phba->cgn_driver_evt_cnt, 0);
13568 atomic_set(&phba->cgn_latency_evt_cnt, 0);
13569 atomic64_set(&phba->cgn_latency_evt, 0);
13570 phba->cgn_evt_minute = 0;
13571
13572 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13573 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13574 cp->cgn_info_version = LPFC_CGN_INFO_V4;
13575
13576 /* cgn parameters */
13577 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13578 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13579 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13580 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13581
13582 lpfc_cgn_update_tstamp(phba, &cp->base_time);
13583
13584 /* Fill in default LUN qdepth */
13585 if (phba->pport) {
13586 size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13587 cp->cgn_lunq = cpu_to_le16(size);
13588 }
13589
13590 /* last used Index initialized to 0xff already */
13591
13592 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13593 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13594 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13595 cp->cgn_info_crc = cpu_to_le32(crc);
13596
13597 phba->cgn_evt_timestamp = jiffies +
13598 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13599 }
13600
13601 void
lpfc_init_congestion_stat(struct lpfc_hba * phba)13602 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13603 {
13604 struct lpfc_cgn_info *cp;
13605 uint32_t crc;
13606
13607 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13608 "6236 INIT Congestion Stat %p\n", phba->cgn_i);
13609
13610 if (!phba->cgn_i)
13611 return;
13612
13613 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13614 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13615
13616 lpfc_cgn_update_tstamp(phba, &cp->stat_start);
13617 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13618 cp->cgn_info_crc = cpu_to_le32(crc);
13619 }
13620
13621 /**
13622 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13623 * @phba: Pointer to hba context object.
13624 * @reg: flag to determine register or unregister.
13625 */
13626 static int
__lpfc_reg_congestion_buf(struct lpfc_hba * phba,int reg)13627 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13628 {
13629 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13630 union lpfc_sli4_cfg_shdr *shdr;
13631 uint32_t shdr_status, shdr_add_status;
13632 LPFC_MBOXQ_t *mboxq;
13633 int length, rc;
13634
13635 if (!phba->cgn_i)
13636 return -ENXIO;
13637
13638 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13639 if (!mboxq) {
13640 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13641 "2641 REG_CONGESTION_BUF mbox allocation fail: "
13642 "HBA state x%x reg %d\n",
13643 phba->pport->port_state, reg);
13644 return -ENOMEM;
13645 }
13646
13647 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13648 sizeof(struct lpfc_sli4_cfg_mhdr));
13649 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13650 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13651 LPFC_SLI4_MBX_EMBED);
13652 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13653 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13654 if (reg > 0)
13655 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13656 else
13657 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13658 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13659 reg_congestion_buf->addr_lo =
13660 putPaddrLow(phba->cgn_i->phys);
13661 reg_congestion_buf->addr_hi =
13662 putPaddrHigh(phba->cgn_i->phys);
13663
13664 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13665 shdr = (union lpfc_sli4_cfg_shdr *)
13666 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13667 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13668 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13669 &shdr->response);
13670 mempool_free(mboxq, phba->mbox_mem_pool);
13671 if (shdr_status || shdr_add_status || rc) {
13672 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13673 "2642 REG_CONGESTION_BUF mailbox "
13674 "failed with status x%x add_status x%x,"
13675 " mbx status x%x reg %d\n",
13676 shdr_status, shdr_add_status, rc, reg);
13677 return -ENXIO;
13678 }
13679 return 0;
13680 }
13681
13682 int
lpfc_unreg_congestion_buf(struct lpfc_hba * phba)13683 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13684 {
13685 lpfc_cmf_stop(phba);
13686 return __lpfc_reg_congestion_buf(phba, 0);
13687 }
13688
13689 int
lpfc_reg_congestion_buf(struct lpfc_hba * phba)13690 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13691 {
13692 return __lpfc_reg_congestion_buf(phba, 1);
13693 }
13694
13695 /**
13696 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13697 * @phba: Pointer to HBA context object.
13698 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13699 *
13700 * This function is called in the SLI4 code path to read the port's
13701 * sli4 capabilities.
13702 *
13703 * This function may be be called from any context that can block-wait
13704 * for the completion. The expectation is that this routine is called
13705 * typically from probe_one or from the online routine.
13706 **/
13707 int
lpfc_get_sli4_parameters(struct lpfc_hba * phba,LPFC_MBOXQ_t * mboxq)13708 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13709 {
13710 int rc;
13711 struct lpfc_mqe *mqe = &mboxq->u.mqe;
13712 struct lpfc_pc_sli4_params *sli4_params;
13713 uint32_t mbox_tmo;
13714 int length;
13715 bool exp_wqcq_pages = true;
13716 struct lpfc_sli4_parameters *mbx_sli4_parameters;
13717
13718 /*
13719 * By default, the driver assumes the SLI4 port requires RPI
13720 * header postings. The SLI4_PARAM response will correct this
13721 * assumption.
13722 */
13723 phba->sli4_hba.rpi_hdrs_in_use = 1;
13724
13725 /* Read the port's SLI4 Config Parameters */
13726 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13727 sizeof(struct lpfc_sli4_cfg_mhdr));
13728 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13729 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13730 length, LPFC_SLI4_MBX_EMBED);
13731 if (!phba->sli4_hba.intr_enable)
13732 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13733 else {
13734 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13735 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13736 }
13737 if (unlikely(rc))
13738 return rc;
13739 sli4_params = &phba->sli4_hba.pc_sli4_params;
13740 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13741 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13742 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13743 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13744 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13745 mbx_sli4_parameters);
13746 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13747 mbx_sli4_parameters);
13748 if (bf_get(cfg_phwq, mbx_sli4_parameters))
13749 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13750 else
13751 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13752 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13753 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13754 mbx_sli4_parameters);
13755 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13756 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13757 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13758 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13759 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13760 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13761 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13762 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13763 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13764 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13765 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13766 mbx_sli4_parameters);
13767 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13768 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13769 mbx_sli4_parameters);
13770 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13771 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13772 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters);
13773
13774 /* Check for Extended Pre-Registered SGL support */
13775 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13776
13777 /* Check for firmware nvme support */
13778 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13779 bf_get(cfg_xib, mbx_sli4_parameters));
13780
13781 if (rc) {
13782 /* Save this to indicate the Firmware supports NVME */
13783 sli4_params->nvme = 1;
13784
13785 /* Firmware NVME support, check driver FC4 NVME support */
13786 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13787 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13788 "6133 Disabling NVME support: "
13789 "FC4 type not supported: x%x\n",
13790 phba->cfg_enable_fc4_type);
13791 goto fcponly;
13792 }
13793 } else {
13794 /* No firmware NVME support, check driver FC4 NVME support */
13795 sli4_params->nvme = 0;
13796 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13798 "6101 Disabling NVME support: Not "
13799 "supported by firmware (%d %d) x%x\n",
13800 bf_get(cfg_nvme, mbx_sli4_parameters),
13801 bf_get(cfg_xib, mbx_sli4_parameters),
13802 phba->cfg_enable_fc4_type);
13803 fcponly:
13804 phba->nvmet_support = 0;
13805 phba->cfg_nvmet_mrq = 0;
13806 phba->cfg_nvme_seg_cnt = 0;
13807
13808 /* If no FC4 type support, move to just SCSI support */
13809 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13810 return -ENODEV;
13811 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13812 }
13813 }
13814
13815 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13816 * accommodate 512K and 1M IOs in a single nvme buf.
13817 */
13818 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13819 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13820
13821 /* Enable embedded Payload BDE if support is indicated */
13822 if (bf_get(cfg_pbde, mbx_sli4_parameters))
13823 phba->cfg_enable_pbde = 1;
13824 else
13825 phba->cfg_enable_pbde = 0;
13826
13827 /*
13828 * To support Suppress Response feature we must satisfy 3 conditions.
13829 * lpfc_suppress_rsp module parameter must be set (default).
13830 * In SLI4-Parameters Descriptor:
13831 * Extended Inline Buffers (XIB) must be supported.
13832 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13833 * (double negative).
13834 */
13835 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13836 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13837 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13838 else
13839 phba->cfg_suppress_rsp = 0;
13840
13841 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13842 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13843
13844 /* Make sure that sge_supp_len can be handled by the driver */
13845 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13846 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13847
13848 dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len);
13849
13850 /*
13851 * Check whether the adapter supports an embedded copy of the
13852 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13853 * to use this option, 128-byte WQEs must be used.
13854 */
13855 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13856 phba->fcp_embed_io = 1;
13857 else
13858 phba->fcp_embed_io = 0;
13859
13860 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13861 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13862 bf_get(cfg_xib, mbx_sli4_parameters),
13863 phba->cfg_enable_pbde,
13864 phba->fcp_embed_io, sli4_params->nvme,
13865 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13866
13867 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13868 LPFC_SLI_INTF_IF_TYPE_2) &&
13869 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13870 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13871 exp_wqcq_pages = false;
13872
13873 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13874 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13875 exp_wqcq_pages &&
13876 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13877 phba->enab_exp_wqcq_pages = 1;
13878 else
13879 phba->enab_exp_wqcq_pages = 0;
13880 /*
13881 * Check if the SLI port supports MDS Diagnostics
13882 */
13883 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13884 phba->mds_diags_support = 1;
13885 else
13886 phba->mds_diags_support = 0;
13887
13888 /*
13889 * Check if the SLI port supports NSLER
13890 */
13891 if (bf_get(cfg_nsler, mbx_sli4_parameters))
13892 phba->nsler = 1;
13893 else
13894 phba->nsler = 0;
13895
13896 return 0;
13897 }
13898
13899 /**
13900 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13901 * @pdev: pointer to PCI device
13902 * @pid: pointer to PCI device identifier
13903 *
13904 * This routine is to be called to attach a device with SLI-3 interface spec
13905 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13906 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13907 * information of the device and driver to see if the driver state that it can
13908 * support this kind of device. If the match is successful, the driver core
13909 * invokes this routine. If this routine determines it can claim the HBA, it
13910 * does all the initialization that it needs to do to handle the HBA properly.
13911 *
13912 * Return code
13913 * 0 - driver can claim the device
13914 * negative value - driver can not claim the device
13915 **/
13916 static int
lpfc_pci_probe_one_s3(struct pci_dev * pdev,const struct pci_device_id * pid)13917 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13918 {
13919 struct lpfc_hba *phba;
13920 struct lpfc_vport *vport = NULL;
13921 struct Scsi_Host *shost = NULL;
13922 int error;
13923 uint32_t cfg_mode, intr_mode;
13924
13925 /* Allocate memory for HBA structure */
13926 phba = lpfc_hba_alloc(pdev);
13927 if (!phba)
13928 return -ENOMEM;
13929
13930 /* Perform generic PCI device enabling operation */
13931 error = lpfc_enable_pci_dev(phba);
13932 if (error)
13933 goto out_free_phba;
13934
13935 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
13936 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
13937 if (error)
13938 goto out_disable_pci_dev;
13939
13940 /* Set up SLI-3 specific device PCI memory space */
13941 error = lpfc_sli_pci_mem_setup(phba);
13942 if (error) {
13943 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13944 "1402 Failed to set up pci memory space.\n");
13945 goto out_disable_pci_dev;
13946 }
13947
13948 /* Set up SLI-3 specific device driver resources */
13949 error = lpfc_sli_driver_resource_setup(phba);
13950 if (error) {
13951 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13952 "1404 Failed to set up driver resource.\n");
13953 goto out_unset_pci_mem_s3;
13954 }
13955
13956 /* Initialize and populate the iocb list per host */
13957
13958 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
13959 if (error) {
13960 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13961 "1405 Failed to initialize iocb list.\n");
13962 goto out_unset_driver_resource_s3;
13963 }
13964
13965 /* Set up common device driver resources */
13966 error = lpfc_setup_driver_resource_phase2(phba);
13967 if (error) {
13968 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13969 "1406 Failed to set up driver resource.\n");
13970 goto out_free_iocb_list;
13971 }
13972
13973 /* Get the default values for Model Name and Description */
13974 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
13975
13976 /* Create SCSI host to the physical port */
13977 error = lpfc_create_shost(phba);
13978 if (error) {
13979 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13980 "1407 Failed to create scsi host.\n");
13981 goto out_unset_driver_resource;
13982 }
13983
13984 /* Configure sysfs attributes */
13985 vport = phba->pport;
13986 error = lpfc_alloc_sysfs_attr(vport);
13987 if (error) {
13988 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13989 "1476 Failed to allocate sysfs attr\n");
13990 goto out_destroy_shost;
13991 }
13992
13993 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
13994 /* Now, trying to enable interrupt and bring up the device */
13995 cfg_mode = phba->cfg_use_msi;
13996 while (true) {
13997 /* Put device to a known state before enabling interrupt */
13998 lpfc_stop_port(phba);
13999 /* Configure and enable interrupt */
14000 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14001 if (intr_mode == LPFC_INTR_ERROR) {
14002 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14003 "0431 Failed to enable interrupt.\n");
14004 error = -ENODEV;
14005 goto out_free_sysfs_attr;
14006 }
14007 /* SLI-3 HBA setup */
14008 if (lpfc_sli_hba_setup(phba)) {
14009 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14010 "1477 Failed to set up hba\n");
14011 error = -ENODEV;
14012 goto out_remove_device;
14013 }
14014
14015 /* Wait 50ms for the interrupts of previous mailbox commands */
14016 msleep(50);
14017 /* Check active interrupts on message signaled interrupts */
14018 if (intr_mode == 0 ||
14019 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14020 /* Log the current active interrupt mode */
14021 phba->intr_mode = intr_mode;
14022 lpfc_log_intr_mode(phba, intr_mode);
14023 break;
14024 } else {
14025 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14026 "0447 Configure interrupt mode (%d) "
14027 "failed active interrupt test.\n",
14028 intr_mode);
14029 /* Disable the current interrupt mode */
14030 lpfc_sli_disable_intr(phba);
14031 /* Try next level of interrupt mode */
14032 cfg_mode = --intr_mode;
14033 }
14034 }
14035
14036 /* Perform post initialization setup */
14037 lpfc_post_init_setup(phba);
14038
14039 /* Check if there are static vports to be created. */
14040 lpfc_create_static_vport(phba);
14041
14042 return 0;
14043
14044 out_remove_device:
14045 lpfc_unset_hba(phba);
14046 out_free_sysfs_attr:
14047 lpfc_free_sysfs_attr(vport);
14048 out_destroy_shost:
14049 lpfc_destroy_shost(phba);
14050 out_unset_driver_resource:
14051 lpfc_unset_driver_resource_phase2(phba);
14052 out_free_iocb_list:
14053 lpfc_free_iocb_list(phba);
14054 out_unset_driver_resource_s3:
14055 lpfc_sli_driver_resource_unset(phba);
14056 out_unset_pci_mem_s3:
14057 lpfc_sli_pci_mem_unset(phba);
14058 out_disable_pci_dev:
14059 lpfc_disable_pci_dev(phba);
14060 if (shost)
14061 scsi_host_put(shost);
14062 out_free_phba:
14063 lpfc_hba_free(phba);
14064 return error;
14065 }
14066
14067 /**
14068 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14069 * @pdev: pointer to PCI device
14070 *
14071 * This routine is to be called to disattach a device with SLI-3 interface
14072 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14073 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14074 * device to be removed from the PCI subsystem properly.
14075 **/
14076 static void
lpfc_pci_remove_one_s3(struct pci_dev * pdev)14077 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14078 {
14079 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14080 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14081 struct lpfc_vport **vports;
14082 struct lpfc_hba *phba = vport->phba;
14083 int i;
14084
14085 set_bit(FC_UNLOADING, &vport->load_flag);
14086
14087 lpfc_free_sysfs_attr(vport);
14088
14089 /* Release all the vports against this physical port */
14090 vports = lpfc_create_vport_work_array(phba);
14091 if (vports != NULL)
14092 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14093 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14094 continue;
14095 fc_vport_terminate(vports[i]->fc_vport);
14096 }
14097 lpfc_destroy_vport_work_array(phba, vports);
14098
14099 /* Remove FC host with the physical port */
14100 fc_remove_host(shost);
14101 scsi_remove_host(shost);
14102
14103 /* Clean up all nodes, mailboxes and IOs. */
14104 lpfc_cleanup(vport);
14105
14106 /*
14107 * Bring down the SLI Layer. This step disable all interrupts,
14108 * clears the rings, discards all mailbox commands, and resets
14109 * the HBA.
14110 */
14111
14112 /* HBA interrupt will be disabled after this call */
14113 lpfc_sli_hba_down(phba);
14114 /* Stop kthread signal shall trigger work_done one more time */
14115 kthread_stop(phba->worker_thread);
14116 /* Final cleanup of txcmplq and reset the HBA */
14117 lpfc_sli_brdrestart(phba);
14118
14119 kfree(phba->vpi_bmask);
14120 kfree(phba->vpi_ids);
14121
14122 lpfc_stop_hba_timers(phba);
14123 spin_lock_irq(&phba->port_list_lock);
14124 list_del_init(&vport->listentry);
14125 spin_unlock_irq(&phba->port_list_lock);
14126
14127 lpfc_debugfs_terminate(vport);
14128
14129 /* Disable SR-IOV if enabled */
14130 if (phba->cfg_sriov_nr_virtfn)
14131 pci_disable_sriov(pdev);
14132
14133 /* Disable interrupt */
14134 lpfc_sli_disable_intr(phba);
14135
14136 scsi_host_put(shost);
14137
14138 /*
14139 * Call scsi_free before mem_free since scsi bufs are released to their
14140 * corresponding pools here.
14141 */
14142 lpfc_scsi_free(phba);
14143 lpfc_free_iocb_list(phba);
14144
14145 lpfc_mem_free_all(phba);
14146
14147 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14148 phba->hbqslimp.virt, phba->hbqslimp.phys);
14149
14150 /* Free resources associated with SLI2 interface */
14151 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14152 phba->slim2p.virt, phba->slim2p.phys);
14153
14154 /* unmap adapter SLIM and Control Registers */
14155 iounmap(phba->ctrl_regs_memmap_p);
14156 iounmap(phba->slim_memmap_p);
14157
14158 lpfc_hba_free(phba);
14159
14160 pci_release_mem_regions(pdev);
14161 pci_disable_device(pdev);
14162 }
14163
14164 /**
14165 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14166 * @dev_d: pointer to device
14167 *
14168 * This routine is to be called from the kernel's PCI subsystem to support
14169 * system Power Management (PM) to device with SLI-3 interface spec. When
14170 * PM invokes this method, it quiesces the device by stopping the driver's
14171 * worker thread for the device, turning off device's interrupt and DMA,
14172 * and bring the device offline. Note that as the driver implements the
14173 * minimum PM requirements to a power-aware driver's PM support for the
14174 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14175 * to the suspend() method call will be treated as SUSPEND and the driver will
14176 * fully reinitialize its device during resume() method call, the driver will
14177 * set device to PCI_D3hot state in PCI config space instead of setting it
14178 * according to the @msg provided by the PM.
14179 *
14180 * Return code
14181 * 0 - driver suspended the device
14182 * Error otherwise
14183 **/
14184 static int __maybe_unused
lpfc_pci_suspend_one_s3(struct device * dev_d)14185 lpfc_pci_suspend_one_s3(struct device *dev_d)
14186 {
14187 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14188 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14189
14190 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14191 "0473 PCI device Power Management suspend.\n");
14192
14193 /* Bring down the device */
14194 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14195 lpfc_offline(phba);
14196 kthread_stop(phba->worker_thread);
14197
14198 /* Disable interrupt from device */
14199 lpfc_sli_disable_intr(phba);
14200
14201 return 0;
14202 }
14203
14204 /**
14205 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14206 * @dev_d: pointer to device
14207 *
14208 * This routine is to be called from the kernel's PCI subsystem to support
14209 * system Power Management (PM) to device with SLI-3 interface spec. When PM
14210 * invokes this method, it restores the device's PCI config space state and
14211 * fully reinitializes the device and brings it online. Note that as the
14212 * driver implements the minimum PM requirements to a power-aware driver's
14213 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14214 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14215 * driver will fully reinitialize its device during resume() method call,
14216 * the device will be set to PCI_D0 directly in PCI config space before
14217 * restoring the state.
14218 *
14219 * Return code
14220 * 0 - driver suspended the device
14221 * Error otherwise
14222 **/
14223 static int __maybe_unused
lpfc_pci_resume_one_s3(struct device * dev_d)14224 lpfc_pci_resume_one_s3(struct device *dev_d)
14225 {
14226 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14227 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14228 uint32_t intr_mode;
14229 int error;
14230
14231 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14232 "0452 PCI device Power Management resume.\n");
14233
14234 /* Startup the kernel thread for this host adapter. */
14235 phba->worker_thread = kthread_run(lpfc_do_work, phba,
14236 "lpfc_worker_%d", phba->brd_no);
14237 if (IS_ERR(phba->worker_thread)) {
14238 error = PTR_ERR(phba->worker_thread);
14239 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14240 "0434 PM resume failed to start worker "
14241 "thread: error=x%x.\n", error);
14242 return error;
14243 }
14244
14245 /* Init cpu_map array */
14246 lpfc_cpu_map_array_init(phba);
14247 /* Init hba_eq_hdl array */
14248 lpfc_hba_eq_hdl_array_init(phba);
14249 /* Configure and enable interrupt */
14250 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14251 if (intr_mode == LPFC_INTR_ERROR) {
14252 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14253 "0430 PM resume Failed to enable interrupt\n");
14254 return -EIO;
14255 } else
14256 phba->intr_mode = intr_mode;
14257
14258 /* Restart HBA and bring it online */
14259 lpfc_sli_brdrestart(phba);
14260 lpfc_online(phba);
14261
14262 /* Log the current active interrupt mode */
14263 lpfc_log_intr_mode(phba, phba->intr_mode);
14264
14265 return 0;
14266 }
14267
14268 /**
14269 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14270 * @phba: pointer to lpfc hba data structure.
14271 *
14272 * This routine is called to prepare the SLI3 device for PCI slot recover. It
14273 * aborts all the outstanding SCSI I/Os to the pci device.
14274 **/
14275 static void
lpfc_sli_prep_dev_for_recover(struct lpfc_hba * phba)14276 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14277 {
14278 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14279 "2723 PCI channel I/O abort preparing for recovery\n");
14280
14281 /*
14282 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14283 * and let the SCSI mid-layer to retry them to recover.
14284 */
14285 lpfc_sli_abort_fcp_rings(phba);
14286 }
14287
14288 /**
14289 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14290 * @phba: pointer to lpfc hba data structure.
14291 *
14292 * This routine is called to prepare the SLI3 device for PCI slot reset. It
14293 * disables the device interrupt and pci device, and aborts the internal FCP
14294 * pending I/Os.
14295 **/
14296 static void
lpfc_sli_prep_dev_for_reset(struct lpfc_hba * phba)14297 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14298 {
14299 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14300 "2710 PCI channel disable preparing for reset\n");
14301
14302 /* Block any management I/Os to the device */
14303 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14304
14305 /* Block all SCSI devices' I/Os on the host */
14306 lpfc_scsi_dev_block(phba);
14307
14308 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
14309 lpfc_sli_flush_io_rings(phba);
14310
14311 /* stop all timers */
14312 lpfc_stop_hba_timers(phba);
14313
14314 /* Disable interrupt and pci device */
14315 lpfc_sli_disable_intr(phba);
14316 pci_disable_device(phba->pcidev);
14317 }
14318
14319 /**
14320 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14321 * @phba: pointer to lpfc hba data structure.
14322 *
14323 * This routine is called to prepare the SLI3 device for PCI slot permanently
14324 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14325 * pending I/Os.
14326 **/
14327 static void
lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba * phba)14328 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14329 {
14330 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14331 "2711 PCI channel permanent disable for failure\n");
14332 /* Block all SCSI devices' I/Os on the host */
14333 lpfc_scsi_dev_block(phba);
14334 lpfc_sli4_prep_dev_for_reset(phba);
14335
14336 /* stop all timers */
14337 lpfc_stop_hba_timers(phba);
14338
14339 /* Clean up all driver's outstanding SCSI I/Os */
14340 lpfc_sli_flush_io_rings(phba);
14341 }
14342
14343 /**
14344 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14345 * @pdev: pointer to PCI device.
14346 * @state: the current PCI connection state.
14347 *
14348 * This routine is called from the PCI subsystem for I/O error handling to
14349 * device with SLI-3 interface spec. This function is called by the PCI
14350 * subsystem after a PCI bus error affecting this device has been detected.
14351 * When this function is invoked, it will need to stop all the I/Os and
14352 * interrupt(s) to the device. Once that is done, it will return
14353 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14354 * as desired.
14355 *
14356 * Return codes
14357 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered without reset
14358 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14359 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14360 **/
14361 static pci_ers_result_t
lpfc_io_error_detected_s3(struct pci_dev * pdev,pci_channel_state_t state)14362 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14363 {
14364 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14365 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14366
14367 switch (state) {
14368 case pci_channel_io_normal:
14369 /* Non-fatal error, prepare for recovery */
14370 lpfc_sli_prep_dev_for_recover(phba);
14371 return PCI_ERS_RESULT_CAN_RECOVER;
14372 case pci_channel_io_frozen:
14373 /* Fatal error, prepare for slot reset */
14374 lpfc_sli_prep_dev_for_reset(phba);
14375 return PCI_ERS_RESULT_NEED_RESET;
14376 case pci_channel_io_perm_failure:
14377 /* Permanent failure, prepare for device down */
14378 lpfc_sli_prep_dev_for_perm_failure(phba);
14379 return PCI_ERS_RESULT_DISCONNECT;
14380 default:
14381 /* Unknown state, prepare and request slot reset */
14382 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14383 "0472 Unknown PCI error state: x%x\n", state);
14384 lpfc_sli_prep_dev_for_reset(phba);
14385 return PCI_ERS_RESULT_NEED_RESET;
14386 }
14387 }
14388
14389 /**
14390 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14391 * @pdev: pointer to PCI device.
14392 *
14393 * This routine is called from the PCI subsystem for error handling to
14394 * device with SLI-3 interface spec. This is called after PCI bus has been
14395 * reset to restart the PCI card from scratch, as if from a cold-boot.
14396 * During the PCI subsystem error recovery, after driver returns
14397 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14398 * recovery and then call this routine before calling the .resume method
14399 * to recover the device. This function will initialize the HBA device,
14400 * enable the interrupt, but it will just put the HBA to offline state
14401 * without passing any I/O traffic.
14402 *
14403 * Return codes
14404 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
14405 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14406 */
14407 static pci_ers_result_t
lpfc_io_slot_reset_s3(struct pci_dev * pdev)14408 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14409 {
14410 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14411 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14412 struct lpfc_sli *psli = &phba->sli;
14413 uint32_t intr_mode;
14414
14415 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14416 if (pci_enable_device_mem(pdev)) {
14417 printk(KERN_ERR "lpfc: Cannot re-enable "
14418 "PCI device after reset.\n");
14419 return PCI_ERS_RESULT_DISCONNECT;
14420 }
14421
14422 pci_restore_state(pdev);
14423
14424 if (pdev->is_busmaster)
14425 pci_set_master(pdev);
14426
14427 spin_lock_irq(&phba->hbalock);
14428 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14429 spin_unlock_irq(&phba->hbalock);
14430
14431 /* Configure and enable interrupt */
14432 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14433 if (intr_mode == LPFC_INTR_ERROR) {
14434 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14435 "0427 Cannot re-enable interrupt after "
14436 "slot reset.\n");
14437 return PCI_ERS_RESULT_DISCONNECT;
14438 } else
14439 phba->intr_mode = intr_mode;
14440
14441 /* Take device offline, it will perform cleanup */
14442 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14443 lpfc_offline(phba);
14444 lpfc_sli_brdrestart(phba);
14445
14446 /* Log the current active interrupt mode */
14447 lpfc_log_intr_mode(phba, phba->intr_mode);
14448
14449 return PCI_ERS_RESULT_RECOVERED;
14450 }
14451
14452 /**
14453 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14454 * @pdev: pointer to PCI device
14455 *
14456 * This routine is called from the PCI subsystem for error handling to device
14457 * with SLI-3 interface spec. It is called when kernel error recovery tells
14458 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14459 * error recovery. After this call, traffic can start to flow from this device
14460 * again.
14461 */
14462 static void
lpfc_io_resume_s3(struct pci_dev * pdev)14463 lpfc_io_resume_s3(struct pci_dev *pdev)
14464 {
14465 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14466 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14467
14468 /* Bring device online, it will be no-op for non-fatal error resume */
14469 lpfc_online(phba);
14470 }
14471
14472 /**
14473 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14474 * @phba: pointer to lpfc hba data structure.
14475 *
14476 * returns the number of ELS/CT IOCBs to reserve
14477 **/
14478 int
lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba * phba)14479 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14480 {
14481 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14482
14483 if (phba->sli_rev == LPFC_SLI_REV4) {
14484 if (max_xri <= 100)
14485 return 10;
14486 else if (max_xri <= 256)
14487 return 25;
14488 else if (max_xri <= 512)
14489 return 50;
14490 else if (max_xri <= 1024)
14491 return 100;
14492 else if (max_xri <= 1536)
14493 return 150;
14494 else if (max_xri <= 2048)
14495 return 200;
14496 else
14497 return 250;
14498 } else
14499 return 0;
14500 }
14501
14502 /**
14503 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14504 * @phba: pointer to lpfc hba data structure.
14505 *
14506 * returns the number of ELS/CT + NVMET IOCBs to reserve
14507 **/
14508 int
lpfc_sli4_get_iocb_cnt(struct lpfc_hba * phba)14509 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14510 {
14511 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14512
14513 if (phba->nvmet_support)
14514 max_xri += LPFC_NVMET_BUF_POST;
14515 return max_xri;
14516 }
14517
14518
14519 static int
lpfc_log_write_firmware_error(struct lpfc_hba * phba,uint32_t offset,uint32_t magic_number,uint32_t ftype,uint32_t fid,uint32_t fsize,const struct firmware * fw)14520 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14521 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14522 const struct firmware *fw)
14523 {
14524 int rc;
14525 u8 sli_family;
14526
14527 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14528 /* Three cases: (1) FW was not supported on the detected adapter.
14529 * (2) FW update has been locked out administratively.
14530 * (3) Some other error during FW update.
14531 * In each case, an unmaskable message is written to the console
14532 * for admin diagnosis.
14533 */
14534 if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14535 (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14536 magic_number != MAGIC_NUMBER_G6) ||
14537 (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14538 magic_number != MAGIC_NUMBER_G7) ||
14539 (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14540 magic_number != MAGIC_NUMBER_G7P)) {
14541 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14542 "3030 This firmware version is not supported on"
14543 " this HBA model. Device:%x Magic:%x Type:%x "
14544 "ID:%x Size %d %zd\n",
14545 phba->pcidev->device, magic_number, ftype, fid,
14546 fsize, fw->size);
14547 rc = -EINVAL;
14548 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14549 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14550 "3021 Firmware downloads have been prohibited "
14551 "by a system configuration setting on "
14552 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14553 "%zd\n",
14554 phba->pcidev->device, magic_number, ftype, fid,
14555 fsize, fw->size);
14556 rc = -EACCES;
14557 } else {
14558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14559 "3022 FW Download failed. Add Status x%x "
14560 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14561 "%zd\n",
14562 offset, phba->pcidev->device, magic_number,
14563 ftype, fid, fsize, fw->size);
14564 rc = -EIO;
14565 }
14566 return rc;
14567 }
14568
14569 /**
14570 * lpfc_write_firmware - attempt to write a firmware image to the port
14571 * @fw: pointer to firmware image returned from request_firmware.
14572 * @context: pointer to firmware image returned from request_firmware.
14573 *
14574 **/
14575 static void
lpfc_write_firmware(const struct firmware * fw,void * context)14576 lpfc_write_firmware(const struct firmware *fw, void *context)
14577 {
14578 struct lpfc_hba *phba = (struct lpfc_hba *)context;
14579 char fwrev[FW_REV_STR_SIZE];
14580 struct lpfc_grp_hdr *image;
14581 struct list_head dma_buffer_list;
14582 int i, rc = 0;
14583 struct lpfc_dmabuf *dmabuf, *next;
14584 uint32_t offset = 0, temp_offset = 0;
14585 uint32_t magic_number, ftype, fid, fsize;
14586
14587 /* It can be null in no-wait mode, sanity check */
14588 if (!fw) {
14589 rc = -ENXIO;
14590 goto out;
14591 }
14592 image = (struct lpfc_grp_hdr *)fw->data;
14593
14594 magic_number = be32_to_cpu(image->magic_number);
14595 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14596 fid = bf_get_be32(lpfc_grp_hdr_id, image);
14597 fsize = be32_to_cpu(image->size);
14598
14599 INIT_LIST_HEAD(&dma_buffer_list);
14600 lpfc_decode_firmware_rev(phba, fwrev, 1);
14601 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14602 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14603 "3023 Updating Firmware, Current Version:%s "
14604 "New Version:%s\n",
14605 fwrev, image->revision);
14606 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14607 dmabuf = kzalloc_obj(struct lpfc_dmabuf);
14608 if (!dmabuf) {
14609 rc = -ENOMEM;
14610 goto release_out;
14611 }
14612 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14613 SLI4_PAGE_SIZE,
14614 &dmabuf->phys,
14615 GFP_KERNEL);
14616 if (!dmabuf->virt) {
14617 kfree(dmabuf);
14618 rc = -ENOMEM;
14619 goto release_out;
14620 }
14621 list_add_tail(&dmabuf->list, &dma_buffer_list);
14622 }
14623 while (offset < fw->size) {
14624 temp_offset = offset;
14625 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14626 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14627 memcpy(dmabuf->virt,
14628 fw->data + temp_offset,
14629 fw->size - temp_offset);
14630 temp_offset = fw->size;
14631 break;
14632 }
14633 memcpy(dmabuf->virt, fw->data + temp_offset,
14634 SLI4_PAGE_SIZE);
14635 temp_offset += SLI4_PAGE_SIZE;
14636 }
14637 rc = lpfc_wr_object(phba, &dma_buffer_list,
14638 (fw->size - offset), &offset);
14639 if (rc) {
14640 rc = lpfc_log_write_firmware_error(phba, offset,
14641 magic_number,
14642 ftype,
14643 fid,
14644 fsize,
14645 fw);
14646 goto release_out;
14647 }
14648 }
14649 rc = offset;
14650 } else
14651 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14652 "3029 Skipped Firmware update, Current "
14653 "Version:%s New Version:%s\n",
14654 fwrev, image->revision);
14655
14656 release_out:
14657 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14658 list_del(&dmabuf->list);
14659 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14660 dmabuf->virt, dmabuf->phys);
14661 kfree(dmabuf);
14662 }
14663 release_firmware(fw);
14664 out:
14665 if (rc < 0)
14666 lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI,
14667 "3062 Firmware update error, status %d.\n", rc);
14668 else
14669 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14670 "3024 Firmware update success: size %d.\n", rc);
14671 }
14672
14673 /**
14674 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14675 * @phba: pointer to lpfc hba data structure.
14676 * @fw_upgrade: which firmware to update.
14677 *
14678 * This routine is called to perform Linux generic firmware upgrade on device
14679 * that supports such feature.
14680 **/
14681 int
lpfc_sli4_request_firmware_update(struct lpfc_hba * phba,uint8_t fw_upgrade)14682 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14683 {
14684 char file_name[ELX_FW_NAME_SIZE] = {0};
14685 int ret;
14686 const struct firmware *fw;
14687
14688 /* Only supported on SLI4 interface type 2 for now */
14689 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14690 LPFC_SLI_INTF_IF_TYPE_2)
14691 return -EPERM;
14692
14693 scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName);
14694
14695 if (fw_upgrade == INT_FW_UPGRADE) {
14696 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14697 file_name, &phba->pcidev->dev,
14698 GFP_KERNEL, (void *)phba,
14699 lpfc_write_firmware);
14700 } else if (fw_upgrade == RUN_FW_UPGRADE) {
14701 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14702 if (!ret)
14703 lpfc_write_firmware(fw, (void *)phba);
14704 } else {
14705 ret = -EINVAL;
14706 }
14707
14708 return ret;
14709 }
14710
14711 /**
14712 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14713 * @pdev: pointer to PCI device
14714 * @pid: pointer to PCI device identifier
14715 *
14716 * This routine is called from the kernel's PCI subsystem to device with
14717 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14718 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14719 * information of the device and driver to see if the driver state that it
14720 * can support this kind of device. If the match is successful, the driver
14721 * core invokes this routine. If this routine determines it can claim the HBA,
14722 * it does all the initialization that it needs to do to handle the HBA
14723 * properly.
14724 *
14725 * Return code
14726 * 0 - driver can claim the device
14727 * negative value - driver can not claim the device
14728 **/
14729 static int
lpfc_pci_probe_one_s4(struct pci_dev * pdev,const struct pci_device_id * pid)14730 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14731 {
14732 struct lpfc_hba *phba;
14733 struct lpfc_vport *vport = NULL;
14734 struct Scsi_Host *shost = NULL;
14735 int error;
14736 uint32_t cfg_mode, intr_mode;
14737
14738 /* Allocate memory for HBA structure */
14739 phba = lpfc_hba_alloc(pdev);
14740 if (!phba)
14741 return -ENOMEM;
14742
14743 INIT_LIST_HEAD(&phba->poll_list);
14744
14745 /* Perform generic PCI device enabling operation */
14746 error = lpfc_enable_pci_dev(phba);
14747 if (error)
14748 goto out_free_phba;
14749
14750 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
14751 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14752 if (error)
14753 goto out_disable_pci_dev;
14754
14755 /* Set up SLI-4 specific device PCI memory space */
14756 error = lpfc_sli4_pci_mem_setup(phba);
14757 if (error) {
14758 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14759 "1410 Failed to set up pci memory space.\n");
14760 goto out_disable_pci_dev;
14761 }
14762
14763 /* Set up SLI-4 Specific device driver resources */
14764 error = lpfc_sli4_driver_resource_setup(phba);
14765 if (error) {
14766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14767 "1412 Failed to set up driver resource.\n");
14768 goto out_unset_pci_mem_s4;
14769 }
14770
14771 spin_lock_init(&phba->rrq_list_lock);
14772 INIT_LIST_HEAD(&phba->active_rrq_list);
14773 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14774
14775 /* Set up common device driver resources */
14776 error = lpfc_setup_driver_resource_phase2(phba);
14777 if (error) {
14778 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14779 "1414 Failed to set up driver resource.\n");
14780 goto out_unset_driver_resource_s4;
14781 }
14782
14783 /* Get the default values for Model Name and Description */
14784 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14785
14786 /* Now, trying to enable interrupt and bring up the device */
14787 cfg_mode = phba->cfg_use_msi;
14788
14789 /* Put device to a known state before enabling interrupt */
14790 phba->pport = NULL;
14791 lpfc_stop_port(phba);
14792
14793 /* Init cpu_map array */
14794 lpfc_cpu_map_array_init(phba);
14795
14796 /* Init hba_eq_hdl array */
14797 lpfc_hba_eq_hdl_array_init(phba);
14798
14799 /* Configure and enable interrupt */
14800 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14801 if (intr_mode == LPFC_INTR_ERROR) {
14802 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14803 "0426 Failed to enable interrupt.\n");
14804 error = -ENODEV;
14805 goto out_unset_driver_resource;
14806 }
14807 /* Default to single EQ for non-MSI-X */
14808 if (phba->intr_type != MSIX) {
14809 phba->cfg_irq_chann = 1;
14810 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14811 if (phba->nvmet_support)
14812 phba->cfg_nvmet_mrq = 1;
14813 }
14814 }
14815 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14816
14817 /* Create SCSI host to the physical port */
14818 error = lpfc_create_shost(phba);
14819 if (error) {
14820 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14821 "1415 Failed to create scsi host.\n");
14822 goto out_disable_intr;
14823 }
14824 vport = phba->pport;
14825 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14826
14827 /* Configure sysfs attributes */
14828 error = lpfc_alloc_sysfs_attr(vport);
14829 if (error) {
14830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14831 "1416 Failed to allocate sysfs attr\n");
14832 goto out_destroy_shost;
14833 }
14834
14835 /* Set up SLI-4 HBA */
14836 if (lpfc_sli4_hba_setup(phba)) {
14837 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14838 "1421 Failed to set up hba\n");
14839 error = -ENODEV;
14840 goto out_free_sysfs_attr;
14841 }
14842
14843 /* Log the current active interrupt mode */
14844 phba->intr_mode = intr_mode;
14845 lpfc_log_intr_mode(phba, intr_mode);
14846
14847 /* Perform post initialization setup */
14848 lpfc_post_init_setup(phba);
14849
14850 /* NVME support in FW earlier in the driver load corrects the
14851 * FC4 type making a check for nvme_support unnecessary.
14852 */
14853 if (phba->nvmet_support == 0) {
14854 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14855 /* Create NVME binding with nvme_fc_transport. This
14856 * ensures the vport is initialized. If the localport
14857 * create fails, it should not unload the driver to
14858 * support field issues.
14859 */
14860 error = lpfc_nvme_create_localport(vport);
14861 if (error) {
14862 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14863 "6004 NVME registration "
14864 "failed, error x%x\n",
14865 error);
14866 }
14867 }
14868 }
14869
14870 /* check for firmware upgrade or downgrade */
14871 if (phba->cfg_request_firmware_upgrade)
14872 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14873
14874 /* Check if there are static vports to be created. */
14875 lpfc_create_static_vport(phba);
14876
14877 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14878 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14879
14880 return 0;
14881
14882 out_free_sysfs_attr:
14883 lpfc_free_sysfs_attr(vport);
14884 out_destroy_shost:
14885 lpfc_destroy_shost(phba);
14886 out_disable_intr:
14887 lpfc_sli4_disable_intr(phba);
14888 out_unset_driver_resource:
14889 lpfc_unset_driver_resource_phase2(phba);
14890 out_unset_driver_resource_s4:
14891 lpfc_sli4_driver_resource_unset(phba);
14892 out_unset_pci_mem_s4:
14893 lpfc_sli4_pci_mem_unset(phba);
14894 out_disable_pci_dev:
14895 lpfc_disable_pci_dev(phba);
14896 if (shost)
14897 scsi_host_put(shost);
14898 out_free_phba:
14899 lpfc_hba_free(phba);
14900 return error;
14901 }
14902
14903 /**
14904 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14905 * @pdev: pointer to PCI device
14906 *
14907 * This routine is called from the kernel's PCI subsystem to device with
14908 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14909 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14910 * device to be removed from the PCI subsystem properly.
14911 **/
14912 static void
lpfc_pci_remove_one_s4(struct pci_dev * pdev)14913 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14914 {
14915 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14916 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14917 struct lpfc_vport **vports;
14918 struct lpfc_hba *phba = vport->phba;
14919 int i;
14920
14921 /* Mark the device unloading flag */
14922 set_bit(FC_UNLOADING, &vport->load_flag);
14923 if (phba->cgn_i)
14924 lpfc_unreg_congestion_buf(phba);
14925
14926 lpfc_free_sysfs_attr(vport);
14927
14928 /* Release all the vports against this physical port */
14929 vports = lpfc_create_vport_work_array(phba);
14930 if (vports != NULL)
14931 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14932 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14933 continue;
14934 fc_vport_terminate(vports[i]->fc_vport);
14935 }
14936 lpfc_destroy_vport_work_array(phba, vports);
14937
14938 /* Remove FC host with the physical port */
14939 fc_remove_host(shost);
14940 scsi_remove_host(shost);
14941
14942 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
14943 * localports are destroyed after to cleanup all transport memory.
14944 */
14945 lpfc_cleanup(vport);
14946 lpfc_nvmet_destroy_targetport(phba);
14947 lpfc_nvme_destroy_localport(vport);
14948
14949 /* De-allocate multi-XRI pools */
14950 if (phba->cfg_xri_rebalancing)
14951 lpfc_destroy_multixri_pools(phba);
14952
14953 /*
14954 * Bring down the SLI Layer. This step disables all interrupts,
14955 * clears the rings, discards all mailbox commands, and resets
14956 * the HBA FCoE function.
14957 */
14958 lpfc_debugfs_terminate(vport);
14959
14960 lpfc_stop_hba_timers(phba);
14961 spin_lock_irq(&phba->port_list_lock);
14962 list_del_init(&vport->listentry);
14963 spin_unlock_irq(&phba->port_list_lock);
14964
14965 /* Perform scsi free before driver resource_unset since scsi
14966 * buffers are released to their corresponding pools here.
14967 */
14968 lpfc_io_free(phba);
14969 lpfc_free_iocb_list(phba);
14970 lpfc_sli4_hba_unset(phba);
14971
14972 lpfc_unset_driver_resource_phase2(phba);
14973 lpfc_sli4_driver_resource_unset(phba);
14974
14975 /* Unmap adapter Control and Doorbell registers */
14976 lpfc_sli4_pci_mem_unset(phba);
14977
14978 /* Release PCI resources and disable device's PCI function */
14979 scsi_host_put(shost);
14980 lpfc_disable_pci_dev(phba);
14981
14982 /* Finally, free the driver's device data structure */
14983 lpfc_hba_free(phba);
14984
14985 return;
14986 }
14987
14988 /**
14989 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
14990 * @dev_d: pointer to device
14991 *
14992 * This routine is called from the kernel's PCI subsystem to support system
14993 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
14994 * this method, it quiesces the device by stopping the driver's worker
14995 * thread for the device, turning off device's interrupt and DMA, and bring
14996 * the device offline. Note that as the driver implements the minimum PM
14997 * requirements to a power-aware driver's PM support for suspend/resume -- all
14998 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
14999 * method call will be treated as SUSPEND and the driver will fully
15000 * reinitialize its device during resume() method call, the driver will set
15001 * device to PCI_D3hot state in PCI config space instead of setting it
15002 * according to the @msg provided by the PM.
15003 *
15004 * Return code
15005 * 0 - driver suspended the device
15006 * Error otherwise
15007 **/
15008 static int __maybe_unused
lpfc_pci_suspend_one_s4(struct device * dev_d)15009 lpfc_pci_suspend_one_s4(struct device *dev_d)
15010 {
15011 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15012 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15013
15014 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15015 "2843 PCI device Power Management suspend.\n");
15016
15017 /* Bring down the device */
15018 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15019 lpfc_offline(phba);
15020 kthread_stop(phba->worker_thread);
15021
15022 /* Disable interrupt from device */
15023 lpfc_sli4_disable_intr(phba);
15024 lpfc_sli4_queue_destroy(phba);
15025
15026 return 0;
15027 }
15028
15029 /**
15030 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15031 * @dev_d: pointer to device
15032 *
15033 * This routine is called from the kernel's PCI subsystem to support system
15034 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15035 * this method, it restores the device's PCI config space state and fully
15036 * reinitializes the device and brings it online. Note that as the driver
15037 * implements the minimum PM requirements to a power-aware driver's PM for
15038 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15039 * to the suspend() method call will be treated as SUSPEND and the driver
15040 * will fully reinitialize its device during resume() method call, the device
15041 * will be set to PCI_D0 directly in PCI config space before restoring the
15042 * state.
15043 *
15044 * Return code
15045 * 0 - driver suspended the device
15046 * Error otherwise
15047 **/
15048 static int __maybe_unused
lpfc_pci_resume_one_s4(struct device * dev_d)15049 lpfc_pci_resume_one_s4(struct device *dev_d)
15050 {
15051 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15052 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15053 uint32_t intr_mode;
15054 int error;
15055
15056 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15057 "0292 PCI device Power Management resume.\n");
15058
15059 /* Startup the kernel thread for this host adapter. */
15060 phba->worker_thread = kthread_run(lpfc_do_work, phba,
15061 "lpfc_worker_%d", phba->brd_no);
15062 if (IS_ERR(phba->worker_thread)) {
15063 error = PTR_ERR(phba->worker_thread);
15064 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15065 "0293 PM resume failed to start worker "
15066 "thread: error=x%x.\n", error);
15067 return error;
15068 }
15069
15070 /* Configure and enable interrupt */
15071 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15072 if (intr_mode == LPFC_INTR_ERROR) {
15073 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15074 "0294 PM resume Failed to enable interrupt\n");
15075 return -EIO;
15076 } else
15077 phba->intr_mode = intr_mode;
15078
15079 /* Restart HBA and bring it online */
15080 lpfc_sli_brdrestart(phba);
15081 lpfc_online(phba);
15082
15083 /* Log the current active interrupt mode */
15084 lpfc_log_intr_mode(phba, phba->intr_mode);
15085
15086 return 0;
15087 }
15088
15089 /**
15090 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15091 * @phba: pointer to lpfc hba data structure.
15092 *
15093 * This routine is called to prepare the SLI4 device for PCI slot recover. It
15094 * aborts all the outstanding SCSI I/Os to the pci device.
15095 **/
15096 static void
lpfc_sli4_prep_dev_for_recover(struct lpfc_hba * phba)15097 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15098 {
15099 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15100 "2828 PCI channel I/O abort preparing for recovery\n");
15101 /*
15102 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15103 * and let the SCSI mid-layer to retry them to recover.
15104 */
15105 lpfc_sli_abort_fcp_rings(phba);
15106 }
15107
15108 /**
15109 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15110 * @phba: pointer to lpfc hba data structure.
15111 *
15112 * This routine is called to prepare the SLI4 device for PCI slot reset. It
15113 * disables the device interrupt and pci device, and aborts the internal FCP
15114 * pending I/Os.
15115 **/
15116 static void
lpfc_sli4_prep_dev_for_reset(struct lpfc_hba * phba)15117 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15118 {
15119 int offline = pci_channel_offline(phba->pcidev);
15120
15121 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15122 "2826 PCI channel disable preparing for reset offline"
15123 " %d\n", offline);
15124
15125 /* Block any management I/Os to the device */
15126 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15127
15128
15129 /* HBA_PCI_ERR was set in io_error_detect */
15130 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15131 /* Flush all driver's outstanding I/Os as we are to reset */
15132 lpfc_sli_flush_io_rings(phba);
15133 lpfc_offline(phba);
15134
15135 /* stop all timers */
15136 lpfc_stop_hba_timers(phba);
15137
15138 lpfc_sli4_queue_destroy(phba);
15139 /* Disable interrupt and pci device */
15140 lpfc_sli4_disable_intr(phba);
15141 pci_disable_device(phba->pcidev);
15142 }
15143
15144 /**
15145 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15146 * @phba: pointer to lpfc hba data structure.
15147 *
15148 * This routine is called to prepare the SLI4 device for PCI slot permanently
15149 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15150 * pending I/Os.
15151 **/
15152 static void
lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba * phba)15153 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15154 {
15155 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15156 "2827 PCI channel permanent disable for failure\n");
15157
15158 /* Block all SCSI devices' I/Os on the host */
15159 lpfc_scsi_dev_block(phba);
15160
15161 /* stop all timers */
15162 lpfc_stop_hba_timers(phba);
15163
15164 /* Clean up all driver's outstanding I/Os */
15165 lpfc_sli_flush_io_rings(phba);
15166 }
15167
15168 /**
15169 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15170 * @pdev: pointer to PCI device.
15171 * @state: the current PCI connection state.
15172 *
15173 * This routine is called from the PCI subsystem for error handling to device
15174 * with SLI-4 interface spec. This function is called by the PCI subsystem
15175 * after a PCI bus error affecting this device has been detected. When this
15176 * function is invoked, it will need to stop all the I/Os and interrupt(s)
15177 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15178 * for the PCI subsystem to perform proper recovery as desired.
15179 *
15180 * Return codes
15181 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15182 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15183 **/
15184 static pci_ers_result_t
lpfc_io_error_detected_s4(struct pci_dev * pdev,pci_channel_state_t state)15185 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15186 {
15187 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15188 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15189 bool hba_pci_err;
15190
15191 switch (state) {
15192 case pci_channel_io_normal:
15193 /* Non-fatal error, prepare for recovery */
15194 lpfc_sli4_prep_dev_for_recover(phba);
15195 return PCI_ERS_RESULT_CAN_RECOVER;
15196 case pci_channel_io_frozen:
15197 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15198 /* Fatal error, prepare for slot reset */
15199 if (!hba_pci_err)
15200 lpfc_sli4_prep_dev_for_reset(phba);
15201 else
15202 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15203 "2832 Already handling PCI error "
15204 "state: x%x\n", state);
15205 return PCI_ERS_RESULT_NEED_RESET;
15206 case pci_channel_io_perm_failure:
15207 set_bit(HBA_PCI_ERR, &phba->bit_flags);
15208 /* Permanent failure, prepare for device down */
15209 lpfc_sli4_prep_dev_for_perm_failure(phba);
15210 return PCI_ERS_RESULT_DISCONNECT;
15211 default:
15212 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15213 if (!hba_pci_err)
15214 lpfc_sli4_prep_dev_for_reset(phba);
15215 /* Unknown state, prepare and request slot reset */
15216 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15217 "2825 Unknown PCI error state: x%x\n", state);
15218 lpfc_sli4_prep_dev_for_reset(phba);
15219 return PCI_ERS_RESULT_NEED_RESET;
15220 }
15221 }
15222
15223 /**
15224 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15225 * @pdev: pointer to PCI device.
15226 *
15227 * This routine is called from the PCI subsystem for error handling to device
15228 * with SLI-4 interface spec. It is called after PCI bus has been reset to
15229 * restart the PCI card from scratch, as if from a cold-boot. During the
15230 * PCI subsystem error recovery, after the driver returns
15231 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15232 * recovery and then call this routine before calling the .resume method to
15233 * recover the device. This function will initialize the HBA device, enable
15234 * the interrupt, but it will just put the HBA to offline state without
15235 * passing any I/O traffic.
15236 *
15237 * Return codes
15238 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15239 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15240 */
15241 static pci_ers_result_t
lpfc_io_slot_reset_s4(struct pci_dev * pdev)15242 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15243 {
15244 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15245 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15246 struct lpfc_sli *psli = &phba->sli;
15247 uint32_t intr_mode;
15248 bool hba_pci_err;
15249
15250 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15251 if (pci_enable_device_mem(pdev)) {
15252 printk(KERN_ERR "lpfc: Cannot re-enable "
15253 "PCI device after reset.\n");
15254 return PCI_ERS_RESULT_DISCONNECT;
15255 }
15256
15257 pci_restore_state(pdev);
15258
15259 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15260 if (!hba_pci_err)
15261 dev_info(&pdev->dev,
15262 "hba_pci_err was not set, recovering slot reset.\n");
15263 /*
15264 * As the new kernel behavior of pci_restore_state() API call clears
15265 * device saved_state flag, need to save the restored state again.
15266 */
15267 pci_save_state(pdev);
15268
15269 if (pdev->is_busmaster)
15270 pci_set_master(pdev);
15271
15272 spin_lock_irq(&phba->hbalock);
15273 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15274 spin_unlock_irq(&phba->hbalock);
15275
15276 /* Init cpu_map array */
15277 lpfc_cpu_map_array_init(phba);
15278 /* Configure and enable interrupt */
15279 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15280 if (intr_mode == LPFC_INTR_ERROR) {
15281 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15282 "2824 Cannot re-enable interrupt after "
15283 "slot reset.\n");
15284 return PCI_ERS_RESULT_DISCONNECT;
15285 } else
15286 phba->intr_mode = intr_mode;
15287 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15288
15289 /* Log the current active interrupt mode */
15290 lpfc_log_intr_mode(phba, phba->intr_mode);
15291
15292 return PCI_ERS_RESULT_RECOVERED;
15293 }
15294
15295 /**
15296 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15297 * @pdev: pointer to PCI device
15298 *
15299 * This routine is called from the PCI subsystem for error handling to device
15300 * with SLI-4 interface spec. It is called when kernel error recovery tells
15301 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15302 * error recovery. After this call, traffic can start to flow from this device
15303 * again.
15304 **/
15305 static void
lpfc_io_resume_s4(struct pci_dev * pdev)15306 lpfc_io_resume_s4(struct pci_dev *pdev)
15307 {
15308 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15309 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15310
15311 /*
15312 * In case of slot reset, as function reset is performed through
15313 * mailbox command which needs DMA to be enabled, this operation
15314 * has to be moved to the io resume phase. Taking device offline
15315 * will perform the necessary cleanup.
15316 */
15317 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15318 /* Perform device reset */
15319 lpfc_sli_brdrestart(phba);
15320 /* Bring the device back online */
15321 lpfc_online(phba);
15322 }
15323 }
15324
15325 /**
15326 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15327 * @pdev: pointer to PCI device
15328 * @pid: pointer to PCI device identifier
15329 *
15330 * This routine is to be registered to the kernel's PCI subsystem. When an
15331 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15332 * at PCI device-specific information of the device and driver to see if the
15333 * driver state that it can support this kind of device. If the match is
15334 * successful, the driver core invokes this routine. This routine dispatches
15335 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15336 * do all the initialization that it needs to do to handle the HBA device
15337 * properly.
15338 *
15339 * Return code
15340 * 0 - driver can claim the device
15341 * negative value - driver can not claim the device
15342 **/
15343 static int
lpfc_pci_probe_one(struct pci_dev * pdev,const struct pci_device_id * pid)15344 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15345 {
15346 int rc;
15347 struct lpfc_sli_intf intf;
15348
15349 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15350 return -ENODEV;
15351
15352 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15353 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15354 rc = lpfc_pci_probe_one_s4(pdev, pid);
15355 else
15356 rc = lpfc_pci_probe_one_s3(pdev, pid);
15357
15358 return rc;
15359 }
15360
15361 /**
15362 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15363 * @pdev: pointer to PCI device
15364 *
15365 * This routine is to be registered to the kernel's PCI subsystem. When an
15366 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15367 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15368 * remove routine, which will perform all the necessary cleanup for the
15369 * device to be removed from the PCI subsystem properly.
15370 **/
15371 static void
lpfc_pci_remove_one(struct pci_dev * pdev)15372 lpfc_pci_remove_one(struct pci_dev *pdev)
15373 {
15374 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15375 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15376
15377 switch (phba->pci_dev_grp) {
15378 case LPFC_PCI_DEV_LP:
15379 lpfc_pci_remove_one_s3(pdev);
15380 break;
15381 case LPFC_PCI_DEV_OC:
15382 lpfc_pci_remove_one_s4(pdev);
15383 break;
15384 default:
15385 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15386 "1424 Invalid PCI device group: 0x%x\n",
15387 phba->pci_dev_grp);
15388 break;
15389 }
15390 return;
15391 }
15392
15393 /**
15394 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15395 * @dev: pointer to device
15396 *
15397 * This routine is to be registered to the kernel's PCI subsystem to support
15398 * system Power Management (PM). When PM invokes this method, it dispatches
15399 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15400 * suspend the device.
15401 *
15402 * Return code
15403 * 0 - driver suspended the device
15404 * Error otherwise
15405 **/
15406 static int __maybe_unused
lpfc_pci_suspend_one(struct device * dev)15407 lpfc_pci_suspend_one(struct device *dev)
15408 {
15409 struct Scsi_Host *shost = dev_get_drvdata(dev);
15410 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15411 int rc = -ENODEV;
15412
15413 switch (phba->pci_dev_grp) {
15414 case LPFC_PCI_DEV_LP:
15415 rc = lpfc_pci_suspend_one_s3(dev);
15416 break;
15417 case LPFC_PCI_DEV_OC:
15418 rc = lpfc_pci_suspend_one_s4(dev);
15419 break;
15420 default:
15421 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15422 "1425 Invalid PCI device group: 0x%x\n",
15423 phba->pci_dev_grp);
15424 break;
15425 }
15426 return rc;
15427 }
15428
15429 /**
15430 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15431 * @dev: pointer to device
15432 *
15433 * This routine is to be registered to the kernel's PCI subsystem to support
15434 * system Power Management (PM). When PM invokes this method, it dispatches
15435 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15436 * resume the device.
15437 *
15438 * Return code
15439 * 0 - driver suspended the device
15440 * Error otherwise
15441 **/
15442 static int __maybe_unused
lpfc_pci_resume_one(struct device * dev)15443 lpfc_pci_resume_one(struct device *dev)
15444 {
15445 struct Scsi_Host *shost = dev_get_drvdata(dev);
15446 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15447 int rc = -ENODEV;
15448
15449 switch (phba->pci_dev_grp) {
15450 case LPFC_PCI_DEV_LP:
15451 rc = lpfc_pci_resume_one_s3(dev);
15452 break;
15453 case LPFC_PCI_DEV_OC:
15454 rc = lpfc_pci_resume_one_s4(dev);
15455 break;
15456 default:
15457 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15458 "1426 Invalid PCI device group: 0x%x\n",
15459 phba->pci_dev_grp);
15460 break;
15461 }
15462 return rc;
15463 }
15464
15465 /**
15466 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15467 * @pdev: pointer to PCI device.
15468 * @state: the current PCI connection state.
15469 *
15470 * This routine is registered to the PCI subsystem for error handling. This
15471 * function is called by the PCI subsystem after a PCI bus error affecting
15472 * this device has been detected. When this routine is invoked, it dispatches
15473 * the action to the proper SLI-3 or SLI-4 device error detected handling
15474 * routine, which will perform the proper error detected operation.
15475 *
15476 * Return codes
15477 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15478 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15479 **/
15480 static pci_ers_result_t
lpfc_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)15481 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15482 {
15483 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15484 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15485 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15486
15487 if (phba->link_state == LPFC_HBA_ERROR &&
15488 test_bit(HBA_IOQ_FLUSH, &phba->hba_flag))
15489 return PCI_ERS_RESULT_NEED_RESET;
15490
15491 switch (phba->pci_dev_grp) {
15492 case LPFC_PCI_DEV_LP:
15493 rc = lpfc_io_error_detected_s3(pdev, state);
15494 break;
15495 case LPFC_PCI_DEV_OC:
15496 rc = lpfc_io_error_detected_s4(pdev, state);
15497 break;
15498 default:
15499 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15500 "1427 Invalid PCI device group: 0x%x\n",
15501 phba->pci_dev_grp);
15502 break;
15503 }
15504 return rc;
15505 }
15506
15507 /**
15508 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15509 * @pdev: pointer to PCI device.
15510 *
15511 * This routine is registered to the PCI subsystem for error handling. This
15512 * function is called after PCI bus has been reset to restart the PCI card
15513 * from scratch, as if from a cold-boot. When this routine is invoked, it
15514 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15515 * routine, which will perform the proper device reset.
15516 *
15517 * Return codes
15518 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15519 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15520 **/
15521 static pci_ers_result_t
lpfc_io_slot_reset(struct pci_dev * pdev)15522 lpfc_io_slot_reset(struct pci_dev *pdev)
15523 {
15524 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15525 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15526 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15527
15528 switch (phba->pci_dev_grp) {
15529 case LPFC_PCI_DEV_LP:
15530 rc = lpfc_io_slot_reset_s3(pdev);
15531 break;
15532 case LPFC_PCI_DEV_OC:
15533 rc = lpfc_io_slot_reset_s4(pdev);
15534 break;
15535 default:
15536 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15537 "1428 Invalid PCI device group: 0x%x\n",
15538 phba->pci_dev_grp);
15539 break;
15540 }
15541 return rc;
15542 }
15543
15544 /**
15545 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15546 * @pdev: pointer to PCI device
15547 *
15548 * This routine is registered to the PCI subsystem for error handling. It
15549 * is called when kernel error recovery tells the lpfc driver that it is
15550 * OK to resume normal PCI operation after PCI bus error recovery. When
15551 * this routine is invoked, it dispatches the action to the proper SLI-3
15552 * or SLI-4 device io_resume routine, which will resume the device operation.
15553 **/
15554 static void
lpfc_io_resume(struct pci_dev * pdev)15555 lpfc_io_resume(struct pci_dev *pdev)
15556 {
15557 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15558 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15559
15560 switch (phba->pci_dev_grp) {
15561 case LPFC_PCI_DEV_LP:
15562 lpfc_io_resume_s3(pdev);
15563 break;
15564 case LPFC_PCI_DEV_OC:
15565 lpfc_io_resume_s4(pdev);
15566 break;
15567 default:
15568 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15569 "1429 Invalid PCI device group: 0x%x\n",
15570 phba->pci_dev_grp);
15571 break;
15572 }
15573 return;
15574 }
15575
15576 /**
15577 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15578 * @phba: pointer to lpfc hba data structure.
15579 *
15580 * This routine checks to see if OAS is supported for this adapter. If
15581 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
15582 * the enable oas flag is cleared and the pool created for OAS device data
15583 * is destroyed.
15584 *
15585 **/
15586 static void
lpfc_sli4_oas_verify(struct lpfc_hba * phba)15587 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15588 {
15589
15590 if (!phba->cfg_EnableXLane)
15591 return;
15592
15593 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15594 phba->cfg_fof = 1;
15595 } else {
15596 phba->cfg_fof = 0;
15597 mempool_destroy(phba->device_data_mem_pool);
15598 phba->device_data_mem_pool = NULL;
15599 }
15600
15601 return;
15602 }
15603
15604 /**
15605 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15606 * @phba: pointer to lpfc hba data structure.
15607 *
15608 * This routine checks to see if RAS is supported by the adapter. Check the
15609 * function through which RAS support enablement is to be done.
15610 **/
15611 void
lpfc_sli4_ras_init(struct lpfc_hba * phba)15612 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15613 {
15614 /* if ASIC_GEN_NUM >= 0xC) */
15615 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15616 LPFC_SLI_INTF_IF_TYPE_6) ||
15617 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15618 LPFC_SLI_INTF_FAMILY_G6)) {
15619 phba->ras_fwlog.ras_hwsupport = true;
15620 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15621 phba->cfg_ras_fwlog_buffsize)
15622 phba->ras_fwlog.ras_enabled = true;
15623 else
15624 phba->ras_fwlog.ras_enabled = false;
15625 } else {
15626 phba->ras_fwlog.ras_hwsupport = false;
15627 }
15628 }
15629
15630
15631 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15632
15633 static const struct pci_error_handlers lpfc_err_handler = {
15634 .error_detected = lpfc_io_error_detected,
15635 .slot_reset = lpfc_io_slot_reset,
15636 .resume = lpfc_io_resume,
15637 };
15638
15639 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15640 lpfc_pci_suspend_one,
15641 lpfc_pci_resume_one);
15642
15643 static struct pci_driver lpfc_driver = {
15644 .name = LPFC_DRIVER_NAME,
15645 .id_table = lpfc_id_table,
15646 .probe = lpfc_pci_probe_one,
15647 .remove = lpfc_pci_remove_one,
15648 .shutdown = lpfc_pci_remove_one,
15649 .driver.pm = &lpfc_pci_pm_ops_one,
15650 .err_handler = &lpfc_err_handler,
15651 };
15652
15653 static const struct file_operations lpfc_mgmt_fop = {
15654 .owner = THIS_MODULE,
15655 };
15656
15657 static struct miscdevice lpfc_mgmt_dev = {
15658 .minor = MISC_DYNAMIC_MINOR,
15659 .name = "lpfcmgmt",
15660 .fops = &lpfc_mgmt_fop,
15661 };
15662
15663 /**
15664 * lpfc_init - lpfc module initialization routine
15665 *
15666 * This routine is to be invoked when the lpfc module is loaded into the
15667 * kernel. The special kernel macro module_init() is used to indicate the
15668 * role of this routine to the kernel as lpfc module entry point.
15669 *
15670 * Return codes
15671 * 0 - successful
15672 * -ENOMEM - FC attach transport failed
15673 * all others - failed
15674 */
15675 static int __init
lpfc_init(void)15676 lpfc_init(void)
15677 {
15678 int error = 0;
15679
15680 pr_info(LPFC_MODULE_DESC "\n");
15681 pr_info(LPFC_COPYRIGHT "\n");
15682
15683 error = misc_register(&lpfc_mgmt_dev);
15684 if (error)
15685 printk(KERN_ERR "Could not register lpfcmgmt device, "
15686 "misc_register returned with status %d", error);
15687
15688 error = -ENOMEM;
15689 lpfc_transport_functions.vport_create = lpfc_vport_create;
15690 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15691 lpfc_transport_template =
15692 fc_attach_transport(&lpfc_transport_functions);
15693 if (lpfc_transport_template == NULL)
15694 goto unregister;
15695 lpfc_vport_transport_template =
15696 fc_attach_transport(&lpfc_vport_transport_functions);
15697 if (lpfc_vport_transport_template == NULL) {
15698 fc_release_transport(lpfc_transport_template);
15699 goto unregister;
15700 }
15701 lpfc_wqe_cmd_template();
15702 lpfc_nvmet_cmd_template();
15703
15704 /* Initialize in case vector mapping is needed */
15705 lpfc_present_cpu = num_present_cpus();
15706
15707 lpfc_pldv_detect = false;
15708
15709 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15710 "lpfc/sli4:online",
15711 lpfc_cpu_online, lpfc_cpu_offline);
15712 if (error < 0)
15713 goto cpuhp_failure;
15714 lpfc_cpuhp_state = error;
15715
15716 error = pci_register_driver(&lpfc_driver);
15717 if (error)
15718 goto unwind;
15719
15720 return error;
15721
15722 unwind:
15723 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15724 cpuhp_failure:
15725 fc_release_transport(lpfc_transport_template);
15726 fc_release_transport(lpfc_vport_transport_template);
15727 unregister:
15728 misc_deregister(&lpfc_mgmt_dev);
15729
15730 return error;
15731 }
15732
lpfc_dmp_dbg(struct lpfc_hba * phba)15733 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15734 {
15735 unsigned int start_idx;
15736 unsigned int dbg_cnt;
15737 unsigned int temp_idx;
15738 int i;
15739 int j = 0;
15740 unsigned long rem_nsec;
15741
15742 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15743 return;
15744
15745 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15746 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15747 if (!dbg_cnt)
15748 goto out;
15749 temp_idx = start_idx;
15750 if (dbg_cnt >= DBG_LOG_SZ) {
15751 dbg_cnt = DBG_LOG_SZ;
15752 temp_idx -= 1;
15753 } else {
15754 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15755 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15756 } else {
15757 if (start_idx < dbg_cnt)
15758 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15759 else
15760 start_idx -= dbg_cnt;
15761 }
15762 }
15763 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15764 start_idx, temp_idx, dbg_cnt);
15765
15766 for (i = 0; i < dbg_cnt; i++) {
15767 if ((start_idx + i) < DBG_LOG_SZ)
15768 temp_idx = (start_idx + i) % DBG_LOG_SZ;
15769 else
15770 temp_idx = j++;
15771 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15772 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15773 temp_idx,
15774 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15775 rem_nsec / 1000,
15776 phba->dbg_log[temp_idx].log);
15777 }
15778 out:
15779 atomic_set(&phba->dbg_log_cnt, 0);
15780 atomic_set(&phba->dbg_log_dmping, 0);
15781 }
15782
15783 __printf(2, 3)
lpfc_dbg_print(struct lpfc_hba * phba,const char * fmt,...)15784 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15785 {
15786 unsigned int idx;
15787 va_list args;
15788 int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15789 struct va_format vaf;
15790
15791
15792 va_start(args, fmt);
15793 if (unlikely(dbg_dmping)) {
15794 vaf.fmt = fmt;
15795 vaf.va = &args;
15796 dev_info(&phba->pcidev->dev, "%pV", &vaf);
15797 va_end(args);
15798 return;
15799 }
15800 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15801 DBG_LOG_SZ;
15802
15803 atomic_inc(&phba->dbg_log_cnt);
15804
15805 vscnprintf(phba->dbg_log[idx].log,
15806 sizeof(phba->dbg_log[idx].log), fmt, args);
15807 va_end(args);
15808
15809 phba->dbg_log[idx].t_ns = local_clock();
15810 }
15811
15812 /**
15813 * lpfc_exit - lpfc module removal routine
15814 *
15815 * This routine is invoked when the lpfc module is removed from the kernel.
15816 * The special kernel macro module_exit() is used to indicate the role of
15817 * this routine to the kernel as lpfc module exit point.
15818 */
15819 static void __exit
lpfc_exit(void)15820 lpfc_exit(void)
15821 {
15822 misc_deregister(&lpfc_mgmt_dev);
15823 pci_unregister_driver(&lpfc_driver);
15824 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15825 fc_release_transport(lpfc_transport_template);
15826 fc_release_transport(lpfc_vport_transport_template);
15827 idr_destroy(&lpfc_hba_index);
15828 }
15829
15830 module_init(lpfc_init);
15831 module_exit(lpfc_exit);
15832 MODULE_LICENSE("GPL");
15833 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15834 MODULE_AUTHOR("Broadcom");
15835 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15836