1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <drm/ttm/ttm_range_manager.h> 26 27 #include "amdgpu.h" 28 29 #define GART_ENTRY_WITHOUT_BO_COLOR 1 30 31 static inline struct amdgpu_gtt_mgr * 32 to_gtt_mgr(struct ttm_resource_manager *man) 33 { 34 return container_of(man, struct amdgpu_gtt_mgr, manager); 35 } 36 37 /** 38 * DOC: mem_info_gtt_total 39 * 40 * The amdgpu driver provides a sysfs API for reporting current total size of 41 * the GTT. 42 * The file mem_info_gtt_total is used for this, and returns the total size of 43 * the GTT block, in bytes 44 */ 45 static ssize_t amdgpu_mem_info_gtt_total_show(struct device *dev, 46 struct device_attribute *attr, 47 char *buf) 48 { 49 struct drm_device *ddev = dev_get_drvdata(dev); 50 struct amdgpu_device *adev = drm_to_adev(ddev); 51 struct ttm_resource_manager *man; 52 53 man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT); 54 return sysfs_emit(buf, "%llu\n", man->size); 55 } 56 57 /** 58 * DOC: mem_info_gtt_used 59 * 60 * The amdgpu driver provides a sysfs API for reporting current total amount of 61 * used GTT. 62 * The file mem_info_gtt_used is used for this, and returns the current used 63 * size of the GTT block, in bytes 64 */ 65 static ssize_t amdgpu_mem_info_gtt_used_show(struct device *dev, 66 struct device_attribute *attr, 67 char *buf) 68 { 69 struct drm_device *ddev = dev_get_drvdata(dev); 70 struct amdgpu_device *adev = drm_to_adev(ddev); 71 struct ttm_resource_manager *man = &adev->mman.gtt_mgr.manager; 72 73 return sysfs_emit(buf, "%llu\n", ttm_resource_manager_usage(man)); 74 } 75 76 static DEVICE_ATTR(mem_info_gtt_total, S_IRUGO, 77 amdgpu_mem_info_gtt_total_show, NULL); 78 static DEVICE_ATTR(mem_info_gtt_used, S_IRUGO, 79 amdgpu_mem_info_gtt_used_show, NULL); 80 81 static struct attribute *amdgpu_gtt_mgr_attributes[] = { 82 &dev_attr_mem_info_gtt_total.attr, 83 &dev_attr_mem_info_gtt_used.attr, 84 NULL 85 }; 86 87 const struct attribute_group amdgpu_gtt_mgr_attr_group = { 88 .attrs = amdgpu_gtt_mgr_attributes 89 }; 90 91 /** 92 * amdgpu_gtt_mgr_has_gart_addr - Check if mem has address space 93 * 94 * @res: the mem object to check 95 * 96 * Check if a mem object has already address space allocated. 97 */ 98 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res) 99 { 100 struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res); 101 102 return drm_mm_node_allocated(&node->mm_nodes[0]); 103 } 104 105 /** 106 * amdgpu_gtt_mgr_new - allocate a new node 107 * 108 * @man: TTM memory type manager 109 * @tbo: TTM BO we need this range for 110 * @place: placement flags and restrictions 111 * @res: the resulting mem object 112 * 113 * Dummy, allocate the node but no space for it yet. 114 */ 115 static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, 116 struct ttm_buffer_object *tbo, 117 const struct ttm_place *place, 118 struct ttm_resource **res) 119 { 120 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 121 uint32_t num_pages = PFN_UP(tbo->base.size); 122 struct ttm_range_mgr_node *node; 123 int r; 124 125 node = kzalloc_flex(*node, mm_nodes, 1); 126 if (!node) 127 return -ENOMEM; 128 129 ttm_resource_init(tbo, place, &node->base); 130 if (!(place->flags & TTM_PL_FLAG_TEMPORARY) && 131 ttm_resource_manager_usage(man) > man->size) { 132 r = -ENOSPC; 133 goto err_free; 134 } 135 136 if (place->lpfn) { 137 spin_lock(&mgr->lock); 138 r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0], 139 num_pages, tbo->page_alignment, 140 0, place->fpfn, place->lpfn, 141 DRM_MM_INSERT_BEST); 142 spin_unlock(&mgr->lock); 143 if (unlikely(r)) 144 goto err_free; 145 146 node->base.start = node->mm_nodes[0].start; 147 } else { 148 node->mm_nodes[0].start = 0; 149 node->mm_nodes[0].size = PFN_UP(node->base.size); 150 node->base.start = AMDGPU_BO_INVALID_OFFSET; 151 } 152 153 *res = &node->base; 154 return 0; 155 156 err_free: 157 ttm_resource_fini(man, &node->base); 158 kfree(node); 159 return r; 160 } 161 162 /** 163 * amdgpu_gtt_mgr_del - free ranges 164 * 165 * @man: TTM memory type manager 166 * @res: TTM memory object 167 * 168 * Free the allocated GTT again. 169 */ 170 static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man, 171 struct ttm_resource *res) 172 { 173 struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res); 174 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 175 176 spin_lock(&mgr->lock); 177 if (drm_mm_node_allocated(&node->mm_nodes[0])) 178 drm_mm_remove_node(&node->mm_nodes[0]); 179 spin_unlock(&mgr->lock); 180 181 ttm_resource_fini(man, res); 182 kfree(node); 183 } 184 185 /** 186 * amdgpu_gtt_mgr_alloc_entries - alloc GART entries without GTT bo 187 * 188 * @mgr: The GTT manager object 189 * @mm_node: The drm mm node to return the new allocation node information 190 * @num_pages: The number of pages for the new allocation 191 * @mode: The new allocation mode 192 * 193 * Helper to dynamic alloc GART entries to map memory not accociated with 194 * GTT BO, for example VRAM BO physical memory, remote physical memory. 195 */ 196 int amdgpu_gtt_mgr_alloc_entries(struct amdgpu_gtt_mgr *mgr, 197 struct drm_mm_node *mm_node, 198 u64 num_pages, 199 enum drm_mm_insert_mode mode) 200 { 201 struct amdgpu_device *adev = container_of(mgr, typeof(*adev), mman.gtt_mgr); 202 u32 alignment = 0; 203 int r; 204 205 /* Align to TLB L2 cache entry size to work around "V bit HW bug" */ 206 if (adev->family == AMDGPU_FAMILY_SI) { 207 alignment = 32 * 1024 / AMDGPU_GPU_PAGE_SIZE; 208 num_pages = ALIGN(num_pages, alignment); 209 } 210 211 spin_lock(&mgr->lock); 212 r = drm_mm_insert_node_in_range(&mgr->mm, mm_node, num_pages, 213 alignment, GART_ENTRY_WITHOUT_BO_COLOR, 0, 214 adev->gmc.gart_size >> PAGE_SHIFT, 215 mode); 216 spin_unlock(&mgr->lock); 217 return r; 218 } 219 220 /** 221 * amdgpu_gtt_mgr_free_entries - free GART entries not accocaited with GTT bo 222 * 223 * @mgr: The GTT manager object 224 * @mm_node: The drm mm node to free 225 */ 226 void amdgpu_gtt_mgr_free_entries(struct amdgpu_gtt_mgr *mgr, 227 struct drm_mm_node *mm_node) 228 { 229 spin_lock(&mgr->lock); 230 if (drm_mm_node_allocated(mm_node)) 231 drm_mm_remove_node(mm_node); 232 spin_unlock(&mgr->lock); 233 } 234 235 /** 236 * amdgpu_gtt_mgr_recover - re-init gart 237 * 238 * @mgr: amdgpu_gtt_mgr pointer 239 * 240 * Re-init the gart for each known BO in the GTT. 241 */ 242 void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr) 243 { 244 struct ttm_range_mgr_node *node; 245 struct drm_mm_node *mm_node; 246 struct amdgpu_device *adev; 247 248 adev = container_of(mgr, typeof(*adev), mman.gtt_mgr); 249 spin_lock(&mgr->lock); 250 drm_mm_for_each_node(mm_node, &mgr->mm) { 251 if (mm_node->color == GART_ENTRY_WITHOUT_BO_COLOR) 252 continue; 253 254 node = container_of(mm_node, typeof(*node), mm_nodes[0]); 255 amdgpu_ttm_recover_gart(node->base.bo); 256 } 257 spin_unlock(&mgr->lock); 258 } 259 260 /** 261 * amdgpu_gtt_mgr_intersects - test for intersection 262 * 263 * @man: Our manager object 264 * @res: The resource to test 265 * @place: The place for the new allocation 266 * @size: The size of the new allocation 267 * 268 * Simplified intersection test, only interesting if we need GART or not. 269 */ 270 static bool amdgpu_gtt_mgr_intersects(struct ttm_resource_manager *man, 271 struct ttm_resource *res, 272 const struct ttm_place *place, 273 size_t size) 274 { 275 const struct drm_mm_node *const node = &to_ttm_range_mgr_node(res)->mm_nodes[0]; 276 const u32 num_pages = PFN_UP(size); 277 278 if (!place->lpfn) 279 return true; 280 281 if (!amdgpu_gtt_mgr_has_gart_addr(res)) 282 return false; 283 284 if (place->fpfn >= (node->start + num_pages) || 285 (place->lpfn && place->lpfn <= node->start)) 286 return false; 287 288 return true; 289 } 290 291 /** 292 * amdgpu_gtt_mgr_compatible - test for compatibility 293 * 294 * @man: Our manager object 295 * @res: The resource to test 296 * @place: The place for the new allocation 297 * @size: The size of the new allocation 298 * 299 * Simplified compatibility test. 300 */ 301 static bool amdgpu_gtt_mgr_compatible(struct ttm_resource_manager *man, 302 struct ttm_resource *res, 303 const struct ttm_place *place, 304 size_t size) 305 { 306 const struct drm_mm_node *const node = &to_ttm_range_mgr_node(res)->mm_nodes[0]; 307 const u32 num_pages = PFN_UP(size); 308 309 if (!place->lpfn) 310 return true; 311 312 if (!amdgpu_gtt_mgr_has_gart_addr(res)) 313 return false; 314 315 if (node->start < place->fpfn || 316 (place->lpfn && (node->start + num_pages) > place->lpfn)) 317 return false; 318 319 return true; 320 } 321 322 /** 323 * amdgpu_gtt_mgr_debug - dump VRAM table 324 * 325 * @man: TTM memory type manager 326 * @printer: DRM printer to use 327 * 328 * Dump the table content using printk. 329 */ 330 static void amdgpu_gtt_mgr_debug(struct ttm_resource_manager *man, 331 struct drm_printer *printer) 332 { 333 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 334 335 spin_lock(&mgr->lock); 336 drm_mm_print(&mgr->mm, printer); 337 spin_unlock(&mgr->lock); 338 } 339 340 static const struct ttm_resource_manager_func amdgpu_gtt_mgr_func = { 341 .alloc = amdgpu_gtt_mgr_new, 342 .free = amdgpu_gtt_mgr_del, 343 .intersects = amdgpu_gtt_mgr_intersects, 344 .compatible = amdgpu_gtt_mgr_compatible, 345 .debug = amdgpu_gtt_mgr_debug 346 }; 347 348 /** 349 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM 350 * 351 * @adev: amdgpu_device pointer 352 * @gtt_size: maximum size of GTT 353 * 354 * Allocate and initialize the GTT manager. 355 */ 356 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size) 357 { 358 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr; 359 struct ttm_resource_manager *man = &mgr->manager; 360 361 man->use_tt = true; 362 man->func = &amdgpu_gtt_mgr_func; 363 364 ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size); 365 366 drm_mm_init(&mgr->mm, 0, adev->gmc.gart_size >> PAGE_SHIFT); 367 spin_lock_init(&mgr->lock); 368 369 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, &mgr->manager); 370 ttm_resource_manager_set_used(man, true); 371 return 0; 372 } 373 374 /** 375 * amdgpu_gtt_mgr_fini - free and destroy GTT manager 376 * 377 * @adev: amdgpu_device pointer 378 * 379 * Destroy and free the GTT manager, returns -EBUSY if ranges are still 380 * allocated inside it. 381 */ 382 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev) 383 { 384 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr; 385 struct ttm_resource_manager *man = &mgr->manager; 386 int ret; 387 388 ttm_resource_manager_set_used(man, false); 389 390 ret = ttm_resource_manager_evict_all(&adev->mman.bdev, man); 391 if (ret) 392 return; 393 394 spin_lock(&mgr->lock); 395 drm_mm_takedown(&mgr->mm); 396 spin_unlock(&mgr->lock); 397 398 ttm_resource_manager_cleanup(man); 399 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, NULL); 400 } 401