1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt712-sdca.h -- RT712 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2023 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT712_H__ 9 #define __RT712_H__ 10 11 #include <linux/pm.h> 12 #include <linux/regmap.h> 13 #include <linux/soundwire/sdw.h> 14 #include <linux/soundwire/sdw_type.h> 15 #include <sound/soc.h> 16 #include <linux/workqueue.h> 17 #include <linux/gpio/driver.h> 18 19 struct rt712_sdca_priv { 20 struct regmap *regmap; 21 struct regmap *mbq_regmap; 22 struct snd_soc_component *component; 23 struct snd_soc_component *dmic_component; 24 struct sdw_slave *slave; 25 struct sdw_bus_params params; 26 bool hw_init; 27 bool first_hw_init; 28 struct snd_soc_jack *hs_jack; 29 struct delayed_work jack_detect_work; 30 struct delayed_work jack_btn_check_work; 31 struct mutex calibrate_mutex; /* for headset calibration */ 32 struct mutex disable_irq_lock; /* SDCA irq lock protection */ 33 bool disable_irq; 34 int jack_type; 35 int jd_src; 36 unsigned int scp_sdca_stat1; 37 unsigned int scp_sdca_stat2; 38 unsigned int hw_id; 39 unsigned int version_id; 40 bool dmic_function_found; 41 bool fu0f_dapm_mute; 42 bool fu0f_mixer_l_mute; 43 bool fu0f_mixer_r_mute; 44 bool fu1e_dapm_mute; 45 bool fu1e_mixer_mute[4]; 46 bool fu05_dapm_mute; 47 bool fu05_mixer_l_mute; 48 bool fu05_mixer_r_mute; 49 struct gpio_chip gpio_chip; 50 struct mutex gc_lock; 51 }; 52 53 struct rt712_dmic_kctrl_priv { 54 unsigned int reg_base; 55 unsigned int count; 56 unsigned int max; 57 unsigned int invert; 58 }; 59 60 /* SDCA (Channel) */ 61 #define CH_01 0x01 62 #define CH_02 0x02 63 #define CH_03 0x03 64 #define CH_04 0x04 65 66 /* NID */ 67 #define RT712_VENDOR_REG 0x20 68 #define RT712_EQ_CTRL 0x53 69 #define RT712_CHARGE_PUMP 0x57 70 #define RT712_VENDOR_CALI 0x58 71 #define RT712_ULTRA_SOUND_DET 0x59 72 #define RT712_VENDOR_IMS_DRE 0x5b 73 #define RT712_VENDOR_ANALOG_CTL 0x5f 74 #define RT712_VENDOR_HDA_CTL 0x61 75 76 /* Index (NID:20h) */ 77 #define RT712_JD_PRODUCT_NUM 0x00 78 #define RT712_ANALOG_BIAS_CTL3 0x04 79 #define RT712_JD_CTL1 0x09 80 #define RT712_JD_CTL3 0x0b 81 #define RT712_IO_CTL 0x0c 82 #define RT712_LDO2_3_CTL1 0x0e 83 #define RT712_PARA_VERB_CTL 0x1a 84 #define RT712_CC_DET1 0x24 85 #define RT712_CLASSD_AMP_CTL1 0x37 86 #define RT712_CLASSD_AMP_CTL6 0x3c 87 #define RT712_COMBO_JACK_AUTO_CTL1 0x45 88 #define RT712_COMBO_JACK_AUTO_CTL2 0x46 89 #define RT712_COMBO_JACK_AUTO_CTL3 0x47 90 #define RT712_DIGITAL_MISC_CTRL4 0x4a 91 #define RT712_FSM_CTL 0x67 92 #define RT712_SW_CONFIG1 0x8a 93 #define RT712_SW_CONFIG2 0x8b 94 95 /* Index (NID:57h) */ 96 #define RT712_HP_DET_CTL3 0x0c 97 98 /* Index (NID:58h) */ 99 #define RT712_DAC_DC_CALI_CTL1 0x00 100 #define RT712_DAC_DC_CALI_CTL2 0x01 101 102 /* Index (NID:59h) */ 103 #define RT712_ULTRA_SOUND_DETECTOR6 0x1e 104 105 /* Index (NID:5bh) */ 106 #define RT712_IMS_DIGITAL_CTL1 0x00 107 #define RT712_IMS_DIGITAL_CTL5 0x05 108 #define RT712_SEL_VEE2_HP_CTL1 0x23 109 #define RT712_HP_DETECT_RLDET_CTL1 0x29 110 #define RT712_HP_DETECT_RLDET_CTL2 0x2a 111 112 /* Index (NID:5fh) */ 113 #define RT712_MISC_POWER_CTL0 0x00 114 #define RT712_MISC_POWER_CTL7 0x08 115 116 /* Index (NID:61h) */ 117 #define RT712_HDA_LEGACY_MUX_CTL0 0x00 118 #define RT712_HDA_LEGACY_CONFIG_CTL0 0x06 119 #define RT712_HDA_LEGACY_RESET_CTL 0x08 120 #define RT712_HDA_GPIO_EN_CTL 0x09 121 #define RT712_HDA_GPIO_DIRECTION_CTL 0x0a 122 #define RT712_HDA_GPIO_SET_CTL 0x0b 123 #define RT712_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e 124 #define RT712_DMIC_ENT_FLOAT_CTL 0x10 125 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 126 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 127 #define RT712_ADC_ENT_FLOAT_CTL 0x15 128 #define RT712_ADC_VOL_CH_FLOAT_CTL2 0x18 129 #define RT712_DAC03_HP_PDE_FLOAT_CTL 0x22 130 #define RT712_MIC2_LINE2_PDE_FLOAT_CTL 0x23 131 #define RT712_ADC0A_08_PDE_FLOAT_CTL 0x26 132 #define RT712_ADC0B_11_PDE_FLOAT_CTL 0x27 133 #define RT712_DMIC1_2_PDE_FLOAT_CTL 0x2b 134 #define RT712_AMP_PDE_FLOAT_CTL 0x2c 135 #define RT712_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f 136 #define RT712_GE_RELATED_CTL1 0x45 137 #define RT712_GE_RELATED_CTL2 0x46 138 #define RT712_MIXER_CTL0 0x52 139 #define RT712_MIXER_CTL1 0x53 140 #define RT712_EAPD_CTL 0x55 141 #define RT712_UMP_HID_CTL0 0x60 142 #define RT712_UMP_HID_CTL1 0x61 143 #define RT712_UMP_HID_CTL2 0x62 144 #define RT712_UMP_HID_CTL3 0x63 145 #define RT712_UMP_HID_CTL4 0x64 146 #define RT712_UMP_HID_CTL5 0x65 147 #define RT712_UMP_HID_CTL6 0x66 148 #define RT712_UMP_HID_CTL7 0x67 149 #define RT712_UMP_HID_CTL8 0x68 150 #define RT712_MISC_CTL_FOR_UAJ 0x72 151 #define RT712_ADC0A_CS_ADC0B_FU_FLOAT_CTL 0xa2 152 #define RT712_DMIC2_FU_IT_FLOAT_CTL 0xa6 153 #define RT712_ADC0B_FU_CH12_FLOAT_CTL 0xb0 154 #define RT712_DMIC2_FU_CH12_FLOAT_CTL 0xb1 155 156 /* Parameter & Verb control 01 (0x1a)(NID:20h) */ 157 #define RT712_HIDDEN_REG_SW_RESET (0x1 << 14) 158 159 /* combo jack auto switch control 2 (0x46)(NID:20h) */ 160 #define RT712_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 161 #define RT712_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 162 #define RT712_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 163 #define RT712_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 164 165 /* DAC DC offset calibration control-1 (0x00)(NID:58h) */ 166 #define RT712_DAC_DC_CALI_TRIGGER (0x1 << 15) 167 168 #define RT712_EAPD_HIGH 0x2 169 #define RT712_EAPD_LOW 0x0 170 171 /* SDW clock root frequency */ 172 #define RT712_SDW_ROOT_CLK 0x004d 173 #define RT712_SDW_SCALE_CLK0 0x0062 174 #define RT712_SDW_SCALE_CLK1 0x0072 175 176 /* PLL2 config */ 177 #define RT712_PLL2_CONF1 0x2f3a 178 #define RT712_PLL2_CONF2 0x2f3d 179 #define RT712_PLL2_CONF3 0x2f41 180 181 /* RC Calibration register */ 182 #define RT712_RC_CAL 0x3201 183 184 /* Buffer address for HID */ 185 #define RT712_BUF_ADDR_HID1 0x44030000 186 #define RT712_BUF_ADDR_HID2 0x44030020 187 188 /* RT712 SDCA Control - function number */ 189 #define FUNC_NUM_JACK_CODEC 0x01 190 #define FUNC_NUM_MIC_ARRAY 0x02 191 #define FUNC_NUM_HID 0x03 192 #define FUNC_NUM_AMP 0x04 193 194 /* RT712 SDCA entity */ 195 #define RT712_SDCA_ENT0 0x00 196 #define RT712_SDCA_ENT_HID01 0x01 197 #define RT712_SDCA_ENT_GE49 0x49 198 #define RT712_SDCA_ENT_USER_FU05 0x05 199 #define RT712_SDCA_ENT_USER_FU06 0x06 200 #define RT712_SDCA_ENT_USER_FU0F 0x0f 201 #define RT712_SDCA_ENT_USER_FU10 0x19 202 #define RT712_SDCA_ENT_USER_FU1E 0x1e 203 #define RT712_SDCA_ENT_FU15 0x15 204 #define RT712_SDCA_ENT_PDE23 0x23 205 #define RT712_SDCA_ENT_PDE40 0x40 206 #define RT712_SDCA_ENT_PDE11 0x11 207 #define RT712_SDCA_ENT_PDE12 0x12 208 #define RT712_SDCA_ENT_CS01 0x01 209 #define RT712_SDCA_ENT_CS11 0x11 210 #define RT712_SDCA_ENT_CS1F 0x1f 211 #define RT712_SDCA_ENT_CS1C 0x1c 212 #define RT712_SDCA_ENT_CS31 0x31 213 #define RT712_SDCA_ENT_OT23 0x42 214 #define RT712_SDCA_ENT_IT11 0x26 215 #define RT712_SDCA_ENT_IT26 0x26 216 #define RT712_SDCA_ENT_IT09 0x09 217 #define RT712_SDCA_ENT_PLATFORM_FU15 0x15 218 #define RT712_SDCA_ENT_PLATFORM_FU44 0x44 219 220 /* RT712 SDCA control */ 221 #define RT712_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 222 #define RT712_SDCA_CTL_FU_MUTE 0x01 223 #define RT712_SDCA_CTL_FU_VOLUME 0x02 224 #define RT712_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 225 #define RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 226 #define RT712_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 227 #define RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 228 #define RT712_SDCA_CTL_SELECTED_MODE 0x01 229 #define RT712_SDCA_CTL_DETECTED_MODE 0x02 230 #define RT712_SDCA_CTL_REQ_POWER_STATE 0x01 231 #define RT712_SDCA_CTL_VENDOR_DEF 0x30 232 #define RT712_SDCA_CTL_FU_CH_GAIN 0x0b 233 #define RT712_SDCA_CTL_FUNC_STATUS 0x10 234 235 /* Function_Status */ 236 #define FUNCTION_NEEDS_INITIALIZATION BIT(5) 237 #define FUNCTION_HAS_BEEN_RESET BIT(6) 238 #define FUNCTION_BUSY BIT(7) 239 240 /* sample frequency index */ 241 #define RT712_SDCA_RATE_16000HZ 0x04 242 #define RT712_SDCA_RATE_32000HZ 0x07 243 #define RT712_SDCA_RATE_44100HZ 0x08 244 #define RT712_SDCA_RATE_48000HZ 0x09 245 #define RT712_SDCA_RATE_96000HZ 0x0b 246 #define RT712_SDCA_RATE_192000HZ 0x0d 247 248 enum { 249 RT712_AIF1, 250 RT712_AIF2, 251 RT712_AIF3, 252 }; 253 254 enum rt712_sdca_jd_src { 255 RT712_JD_NULL, 256 RT712_JD1, 257 }; 258 259 enum rt712_sdca_hw_id { 260 RT712_DEV_ID_712 = 0x7, 261 RT712_DEV_ID_713 = 0x6, 262 RT712_DEV_ID_716 = 0x5, 263 RT712_DEV_ID_717 = 0x4, 264 }; 265 266 #define RT712_PART_ID_713 0x713 267 268 enum rt712_sdca_version { 269 RT712_VA, 270 RT712_VB, 271 }; 272 273 enum { 274 RT712_CLK_FREQ_19_2_MHZ = 1, 275 RT712_CLK_FREQ_24MHZ = 2, 276 RT712_CLK_FREQ_24_576MHZ = 3, 277 RT712_CLK_FREQ_22_5792MHZ = 4, 278 }; 279 280 281 int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave); 282 int rt712_sdca_init(struct device *dev, struct regmap *regmap, 283 struct regmap *mbq_regmap, struct sdw_slave *slave); 284 285 int rt712_sdca_jack_detect(struct rt712_sdca_priv *rt712, bool *hp, bool *mic); 286 #endif /* __RT712_H__ */ 287