1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */ 3 4 #ifndef _FBNIC_FW_H_ 5 #define _FBNIC_FW_H_ 6 7 #include <linux/if_ether.h> 8 #include <linux/types.h> 9 10 struct fbnic_dev; 11 struct fbnic_tlv_msg; 12 13 struct fbnic_fw_mbx { 14 u8 ready, head, tail; 15 struct { 16 struct fbnic_tlv_msg *msg; 17 dma_addr_t addr; 18 } buf_info[FBNIC_IPC_MBX_DESC_LEN]; 19 }; 20 21 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN 22 #define FBNIC_FW_VER_MAX_SIZE 32 23 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT 24 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE (FBNIC_FW_VER_MAX_SIZE - 13) 25 #define FBNIC_FW_LOG_MAX_SIZE 256 26 27 struct fbnic_fw_ver { 28 u32 version; 29 char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE]; 30 }; 31 32 struct fbnic_fw_cap { 33 struct { 34 struct fbnic_fw_ver mgmt, bootloader; 35 } running; 36 struct { 37 struct fbnic_fw_ver mgmt, bootloader, undi; 38 } stored; 39 u8 active_slot; 40 u8 bmc_mac_addr[4][ETH_ALEN]; 41 u8 bmc_present : 1; 42 u8 all_multi : 1; 43 u8 link_speed; 44 u8 link_fec; 45 }; 46 47 struct fbnic_fw_completion { 48 struct { 49 s32 millivolts; 50 s32 millidegrees; 51 } tsene; 52 }; 53 54 void fbnic_mbx_init(struct fbnic_dev *fbd); 55 void fbnic_mbx_clean(struct fbnic_dev *fbd); 56 void fbnic_mbx_poll(struct fbnic_dev *fbd); 57 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd); 58 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd); 59 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership); 60 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll); 61 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd); 62 63 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \ 64 do { \ 65 const u32 __rev_id = _rev_id; \ 66 snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s", \ 67 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id), \ 68 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id), \ 69 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id), \ 70 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id), \ 71 _delim, _commit); \ 72 } while (0) 73 74 #define fbnic_mk_fw_ver_str(_rev_id, _str) \ 75 fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str)) 76 77 #define FW_HEARTBEAT_PERIOD (10 * HZ) 78 79 enum { 80 FBNIC_TLV_MSG_ID_HOST_CAP_REQ = 0x10, 81 FBNIC_TLV_MSG_ID_FW_CAP_RESP = 0x11, 82 FBNIC_TLV_MSG_ID_OWNERSHIP_REQ = 0x12, 83 FBNIC_TLV_MSG_ID_OWNERSHIP_RESP = 0x13, 84 FBNIC_TLV_MSG_ID_HEARTBEAT_REQ = 0x14, 85 FBNIC_TLV_MSG_ID_HEARTBEAT_RESP = 0x15, 86 }; 87 88 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR CSR_GENMASK(31, 24) 89 #define FBNIC_FW_CAP_RESP_VERSION_MINOR CSR_GENMASK(23, 16) 90 #define FBNIC_FW_CAP_RESP_VERSION_PATCH CSR_GENMASK(15, 8) 91 #define FBNIC_FW_CAP_RESP_VERSION_BUILD CSR_GENMASK(7, 0) 92 enum { 93 FBNIC_FW_CAP_RESP_VERSION = 0x0, 94 FBNIC_FW_CAP_RESP_BMC_PRESENT = 0x1, 95 FBNIC_FW_CAP_RESP_BMC_MAC_ADDR = 0x2, 96 FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY = 0x3, 97 FBNIC_FW_CAP_RESP_STORED_VERSION = 0x4, 98 FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT = 0x5, 99 FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR = 0x6, 100 FBNIC_FW_CAP_RESP_BMC_ALL_MULTI = 0x8, 101 FBNIC_FW_CAP_RESP_FW_STATE = 0x9, 102 FBNIC_FW_CAP_RESP_FW_LINK_SPEED = 0xa, 103 FBNIC_FW_CAP_RESP_FW_LINK_FEC = 0xb, 104 FBNIC_FW_CAP_RESP_STORED_COMMIT_STR = 0xc, 105 FBNIC_FW_CAP_RESP_CMRT_VERSION = 0xd, 106 FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION = 0xe, 107 FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR = 0xf, 108 FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR = 0x10, 109 FBNIC_FW_CAP_RESP_UEFI_VERSION = 0x11, 110 FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR = 0x12, 111 FBNIC_FW_CAP_RESP_MSG_MAX 112 }; 113 114 enum { 115 FBNIC_FW_LINK_SPEED_25R1 = 1, 116 FBNIC_FW_LINK_SPEED_50R2 = 2, 117 FBNIC_FW_LINK_SPEED_50R1 = 3, 118 FBNIC_FW_LINK_SPEED_100R2 = 4, 119 }; 120 121 enum { 122 FBNIC_FW_LINK_FEC_NONE = 1, 123 FBNIC_FW_LINK_FEC_RS = 2, 124 FBNIC_FW_LINK_FEC_BASER = 3, 125 }; 126 127 enum { 128 FBNIC_FW_OWNERSHIP_FLAG = 0x0, 129 FBNIC_FW_OWNERSHIP_MSG_MAX 130 }; 131 #endif /* _FBNIC_FW_H_ */ 132