1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * F81532/F81534 USB to Serial Ports Bridge 4 * 5 * F81532 => 2 Serial Ports 6 * F81534 => 4 Serial Ports 7 * 8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek) 9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw) 10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw) 11 * 12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out 13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in 14 * (Read Data/MSR/LSR). 15 * 16 * Write URB is fixed with 512bytes, per serial port used 128Bytes. 17 * It can be described by f81534_prepare_write_buffer() 18 * 19 * Read URB is 512Bytes max, per serial port used 128Bytes. 20 * It can be described by f81534_process_read_urb() and maybe received with 21 * 128x1,2,3,4 bytes. 22 * 23 */ 24 #include <linux/slab.h> 25 #include <linux/tty.h> 26 #include <linux/tty_flip.h> 27 #include <linux/usb.h> 28 #include <linux/usb/serial.h> 29 #include <linux/serial_reg.h> 30 #include <linux/module.h> 31 32 /* Serial Port register Address */ 33 #define F81534_UART_BASE_ADDRESS 0x1200 34 #define F81534_UART_OFFSET 0x10 35 #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS) 36 #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS) 37 #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS) 38 #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS) 39 #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS) 40 #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS) 41 #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS) 42 #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS) 43 #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS) 44 #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS) 45 46 #define F81534_DEF_CONF_ADDRESS_START 0x3000 47 #define F81534_DEF_CONF_SIZE 12 48 49 #define F81534_CUSTOM_ADDRESS_START 0x2f00 50 #define F81534_CUSTOM_DATA_SIZE 0x10 51 #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff 52 #define F81534_CUSTOM_VALID_TOKEN 0xf0 53 #define F81534_CONF_OFFSET 1 54 #define F81534_CONF_INIT_GPIO_OFFSET 4 55 #define F81534_CONF_WORK_GPIO_OFFSET 8 56 #define F81534_CONF_GPIO_SHUTDOWN 7 57 #define F81534_CONF_GPIO_RS232 1 58 59 #define F81534_MAX_DATA_BLOCK 64 60 #define F81534_MAX_BUS_RETRY 20 61 62 /* Default URB timeout for USB operations */ 63 #define F81534_USB_MAX_RETRY 10 64 #define F81534_USB_TIMEOUT 2000 65 #define F81534_SET_GET_REGISTER 0xA0 66 67 #define F81534_NUM_PORT 4 68 #define F81534_UNUSED_PORT 0xff 69 #define F81534_WRITE_BUFFER_SIZE 512 70 71 #define DRIVER_DESC "Fintek F81532/F81534" 72 #define FINTEK_VENDOR_ID_1 0x1934 73 #define FINTEK_VENDOR_ID_2 0x2C42 74 #define FINTEK_DEVICE_ID 0x1202 75 #define F81534_MAX_TX_SIZE 124 76 #define F81534_MAX_RX_SIZE 124 77 #define F81534_RECEIVE_BLOCK_SIZE 128 78 #define F81534_MAX_RECEIVE_BLOCK_SIZE 512 79 80 #define F81534_TOKEN_RECEIVE 0x01 81 #define F81534_TOKEN_WRITE 0x02 82 #define F81534_TOKEN_TX_EMPTY 0x03 83 #define F81534_TOKEN_MSR_CHANGE 0x04 84 85 /* 86 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to 87 * idle if we performed any command. 88 * 89 * SPI Bus status register: F81534_BUS_REG_STATUS 90 * Bit 0/1 : BUSY 91 * Bit 2 : IDLE 92 */ 93 #define F81534_BUS_BUSY (BIT(0) | BIT(1)) 94 #define F81534_BUS_IDLE BIT(2) 95 #define F81534_BUS_READ_DATA 0x1004 96 #define F81534_BUS_REG_STATUS 0x1003 97 #define F81534_BUS_REG_START 0x1002 98 #define F81534_BUS_REG_END 0x1001 99 100 #define F81534_CMD_READ 0x03 101 102 #define F81534_DEFAULT_BAUD_RATE 9600 103 104 #define F81534_PORT_CONF_RS232 0 105 #define F81534_PORT_CONF_RS485 BIT(0) 106 #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1)) 107 #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0) 108 #define F81534_PORT_CONF_DISABLE_PORT BIT(3) 109 #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7) 110 #define F81534_PORT_UNAVAILABLE \ 111 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT) 112 113 114 #define F81534_1X_RXTRIGGER 0xc3 115 #define F81534_8X_RXTRIGGER 0xcf 116 117 /* 118 * F81532/534 Clock registers (offset +08h) 119 * 120 * Bit0: UART Enable (always on) 121 * Bit2-1: Clock source selector 122 * 00: 1.846MHz. 123 * 01: 18.46MHz. 124 * 10: 24MHz. 125 * 11: 14.77MHz. 126 * Bit4: Auto direction(RTS) control (RTS pin Low when TX) 127 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX) 128 */ 129 130 #define F81534_UART_EN BIT(0) 131 #define F81534_CLK_1_846_MHZ 0 132 #define F81534_CLK_18_46_MHZ BIT(1) 133 #define F81534_CLK_24_MHZ BIT(2) 134 #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2)) 135 #define F81534_CLK_MASK GENMASK(2, 1) 136 #define F81534_CLK_TX_DELAY_1BIT BIT(3) 137 #define F81534_CLK_RS485_MODE BIT(4) 138 #define F81534_CLK_RS485_INVERT BIT(5) 139 140 static const struct usb_device_id f81534_id_table[] = { 141 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) }, 142 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) }, 143 {} /* Terminating entry */ 144 }; 145 146 #define F81534_TX_EMPTY_BIT 0 147 148 struct f81534_serial_private { 149 u8 conf_data[F81534_DEF_CONF_SIZE]; 150 int tty_idx[F81534_NUM_PORT]; 151 u8 setting_idx; 152 int opened_port; 153 struct mutex urb_mutex; 154 }; 155 156 struct f81534_port_private { 157 struct mutex mcr_mutex; 158 struct mutex lcr_mutex; 159 struct work_struct lsr_work; 160 struct usb_serial_port *port; 161 unsigned long tx_empty; 162 spinlock_t msr_lock; 163 u32 baud_base; 164 u8 shadow_mcr; 165 u8 shadow_lcr; 166 u8 shadow_msr; 167 u8 shadow_clk; 168 u8 phy_num; 169 }; 170 171 struct f81534_pin_data { 172 const u16 reg_addr; 173 const u8 reg_mask; 174 }; 175 176 struct f81534_port_out_pin { 177 struct f81534_pin_data pin[3]; 178 }; 179 180 /* Pin output value for M2/M1/M0(SD) */ 181 static const struct f81534_port_out_pin f81534_port_out_pins[] = { 182 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } }, 183 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } }, 184 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } }, 185 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } }, 186 }; 187 188 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 }; 189 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, 190 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ }; 191 192 static int f81534_logic_to_phy_port(struct usb_serial *serial, 193 struct usb_serial_port *port) 194 { 195 struct f81534_serial_private *serial_priv = 196 usb_get_serial_data(port->serial); 197 int count = 0; 198 int i; 199 200 for (i = 0; i < F81534_NUM_PORT; ++i) { 201 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 202 continue; 203 204 if (port->port_number == count) 205 return i; 206 207 ++count; 208 } 209 210 return -ENODEV; 211 } 212 213 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data) 214 { 215 struct usb_interface *interface = serial->interface; 216 struct usb_device *dev = serial->dev; 217 size_t count = F81534_USB_MAX_RETRY; 218 int status; 219 u8 *tmp; 220 221 tmp = kmalloc(sizeof(u8), GFP_KERNEL); 222 if (!tmp) 223 return -ENOMEM; 224 225 *tmp = data; 226 227 /* 228 * Our device maybe not reply when heavily loading, We'll retry for 229 * F81534_USB_MAX_RETRY times. 230 */ 231 while (count--) { 232 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 233 F81534_SET_GET_REGISTER, 234 USB_TYPE_VENDOR | USB_DIR_OUT, 235 reg, 0, tmp, sizeof(u8), 236 F81534_USB_TIMEOUT); 237 if (status == sizeof(u8)) { 238 status = 0; 239 break; 240 } 241 } 242 243 if (status < 0) { 244 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n", 245 __func__, reg, data, status); 246 } 247 248 kfree(tmp); 249 return status; 250 } 251 252 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data) 253 { 254 struct usb_interface *interface = serial->interface; 255 struct usb_device *dev = serial->dev; 256 size_t count = F81534_USB_MAX_RETRY; 257 int status; 258 u8 *tmp; 259 260 tmp = kmalloc(sizeof(u8), GFP_KERNEL); 261 if (!tmp) 262 return -ENOMEM; 263 264 /* 265 * Our device maybe not reply when heavily loading, We'll retry for 266 * F81534_USB_MAX_RETRY times. 267 */ 268 while (count--) { 269 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 270 F81534_SET_GET_REGISTER, 271 USB_TYPE_VENDOR | USB_DIR_IN, 272 reg, 0, tmp, sizeof(u8), 273 F81534_USB_TIMEOUT); 274 if (status > 0) { 275 status = 0; 276 break; 277 } else if (status == 0) { 278 status = -EIO; 279 } 280 } 281 282 if (status < 0) { 283 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__, 284 reg, status); 285 goto end; 286 } 287 288 *data = *tmp; 289 290 end: 291 kfree(tmp); 292 return status; 293 } 294 295 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg, 296 u8 mask, u8 data) 297 { 298 int status; 299 u8 tmp; 300 301 status = f81534_get_register(serial, reg, &tmp); 302 if (status) 303 return status; 304 305 tmp &= ~mask; 306 tmp |= (mask & data); 307 308 return f81534_set_register(serial, reg, tmp); 309 } 310 311 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy, 312 u16 reg, u8 data) 313 { 314 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy, 315 data); 316 } 317 318 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy, 319 u16 reg, u8 *data) 320 { 321 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy, 322 data); 323 } 324 325 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg, 326 u8 data) 327 { 328 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 329 330 return f81534_set_register(port->serial, 331 reg + port_priv->phy_num * F81534_UART_OFFSET, data); 332 } 333 334 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg, 335 u8 *data) 336 { 337 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 338 339 return f81534_get_register(port->serial, 340 reg + port_priv->phy_num * F81534_UART_OFFSET, data); 341 } 342 343 /* 344 * If we try to access the internal flash via SPI bus, we should check the bus 345 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END 346 */ 347 static int f81534_wait_for_spi_idle(struct usb_serial *serial) 348 { 349 size_t count = F81534_MAX_BUS_RETRY; 350 u8 tmp; 351 int status; 352 353 do { 354 status = f81534_get_register(serial, F81534_BUS_REG_STATUS, 355 &tmp); 356 if (status) 357 return status; 358 359 if (tmp & F81534_BUS_BUSY) 360 continue; 361 362 if (tmp & F81534_BUS_IDLE) 363 break; 364 365 } while (--count); 366 367 if (!count) { 368 dev_err(&serial->interface->dev, 369 "%s: timed out waiting for idle SPI bus\n", 370 __func__); 371 return -EIO; 372 } 373 374 return f81534_set_register(serial, F81534_BUS_REG_STATUS, 375 tmp & ~F81534_BUS_IDLE); 376 } 377 378 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg, 379 u8 *data) 380 { 381 int status; 382 383 status = f81534_get_register(serial, reg, data); 384 if (status) 385 return status; 386 387 return f81534_wait_for_spi_idle(serial); 388 } 389 390 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data) 391 { 392 int status; 393 394 status = f81534_set_register(serial, reg, data); 395 if (status) 396 return status; 397 398 return f81534_wait_for_spi_idle(serial); 399 } 400 401 static int f81534_read_flash(struct usb_serial *serial, u32 address, 402 size_t size, u8 *buf) 403 { 404 u8 tmp_buf[F81534_MAX_DATA_BLOCK]; 405 size_t block = 0; 406 size_t read_size; 407 size_t count; 408 int status; 409 int offset; 410 u16 reg_tmp; 411 412 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 413 F81534_CMD_READ); 414 if (status) 415 return status; 416 417 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 418 (address >> 16) & 0xff); 419 if (status) 420 return status; 421 422 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 423 (address >> 8) & 0xff); 424 if (status) 425 return status; 426 427 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 428 (address >> 0) & 0xff); 429 if (status) 430 return status; 431 432 /* Continuous read mode */ 433 do { 434 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size); 435 436 for (count = 0; count < read_size; ++count) { 437 /* To write F81534_BUS_REG_END when final byte */ 438 if (size <= F81534_MAX_DATA_BLOCK && 439 read_size == count + 1) 440 reg_tmp = F81534_BUS_REG_END; 441 else 442 reg_tmp = F81534_BUS_REG_START; 443 444 /* 445 * Dummy code, force IC to generate a read pulse, the 446 * set of value 0xf1 is dont care (any value is ok) 447 */ 448 status = f81534_set_spi_register(serial, reg_tmp, 449 0xf1); 450 if (status) 451 return status; 452 453 status = f81534_get_spi_register(serial, 454 F81534_BUS_READ_DATA, 455 &tmp_buf[count]); 456 if (status) 457 return status; 458 459 offset = count + block * F81534_MAX_DATA_BLOCK; 460 buf[offset] = tmp_buf[count]; 461 } 462 463 size -= read_size; 464 ++block; 465 } while (size); 466 467 return 0; 468 } 469 470 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf) 471 { 472 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 473 int phy_num = port_priv->phy_num; 474 u8 tx_len; 475 int i; 476 477 /* 478 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port. 479 * index 0: port phy idx (e.g., 0,1,2,3) 480 * index 1: only F81534_TOKEN_WRITE 481 * index 2: serial TX out length 482 * index 3: fix to 0 483 * index 4~127: serial out data block 484 */ 485 for (i = 0; i < F81534_NUM_PORT; ++i) { 486 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i; 487 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE; 488 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0; 489 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0; 490 } 491 492 tx_len = kfifo_out_locked(&port->write_fifo, 493 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4], 494 F81534_MAX_TX_SIZE, &port->lock); 495 496 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len; 497 } 498 499 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags) 500 { 501 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 502 struct urb *urb; 503 unsigned long flags; 504 int result; 505 506 /* Check is any data in write_fifo */ 507 spin_lock_irqsave(&port->lock, flags); 508 509 if (kfifo_is_empty(&port->write_fifo)) { 510 spin_unlock_irqrestore(&port->lock, flags); 511 return 0; 512 } 513 514 spin_unlock_irqrestore(&port->lock, flags); 515 516 /* Check H/W is TXEMPTY */ 517 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty)) 518 return 0; 519 520 urb = port->write_urbs[0]; 521 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]); 522 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE; 523 524 result = usb_submit_urb(urb, mem_flags); 525 if (result) { 526 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 527 dev_err(&port->dev, "%s: submit failed: %d\n", __func__, 528 result); 529 return result; 530 } 531 532 usb_serial_port_softint(port); 533 return 0; 534 } 535 536 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate) 537 { 538 /* Round to nearest divisor */ 539 return DIV_ROUND_CLOSEST(clockrate, baudrate); 540 } 541 542 static int f81534_find_clk(u32 baudrate) 543 { 544 int idx; 545 546 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) { 547 if (baudrate <= baudrate_table[idx] && 548 baudrate_table[idx] % baudrate == 0) 549 return idx; 550 } 551 552 return -EINVAL; 553 } 554 555 static int f81534_set_port_config(struct usb_serial_port *port, 556 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr) 557 { 558 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 559 u32 divisor; 560 int status; 561 int i; 562 int idx; 563 u8 value; 564 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE}; 565 566 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) { 567 baudrate = baud_list[i]; 568 if (baudrate == 0) { 569 tty_encode_baud_rate(tty, 0, 0); 570 return 0; 571 } 572 573 idx = f81534_find_clk(baudrate); 574 if (idx >= 0) { 575 tty_encode_baud_rate(tty, baudrate, baudrate); 576 break; 577 } 578 } 579 580 if (idx < 0) 581 return -EINVAL; 582 583 port_priv->baud_base = baudrate_table[idx]; 584 port_priv->shadow_clk &= ~F81534_CLK_MASK; 585 port_priv->shadow_clk |= clock_table[idx]; 586 587 status = f81534_set_port_register(port, F81534_CLOCK_REG, 588 port_priv->shadow_clk); 589 if (status) { 590 dev_err(&port->dev, "CLOCK_REG setting failed\n"); 591 return status; 592 } 593 594 if (baudrate <= 1200) 595 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */ 596 else 597 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */ 598 599 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value); 600 if (status) { 601 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__); 602 return status; 603 } 604 605 if (baudrate <= 1200) 606 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */ 607 else 608 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */ 609 610 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG, 611 value); 612 if (status) { 613 dev_err(&port->dev, "%s: FCR setting failed\n", __func__); 614 return status; 615 } 616 617 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base); 618 619 mutex_lock(&port_priv->lcr_mutex); 620 621 value = UART_LCR_DLAB; 622 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 623 value); 624 if (status) { 625 dev_err(&port->dev, "%s: set LCR failed\n", __func__); 626 goto out_unlock; 627 } 628 629 value = divisor & 0xff; 630 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value); 631 if (status) { 632 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__); 633 goto out_unlock; 634 } 635 636 value = (divisor >> 8) & 0xff; 637 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value); 638 if (status) { 639 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__); 640 goto out_unlock; 641 } 642 643 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC); 644 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 645 value); 646 if (status) { 647 dev_err(&port->dev, "%s: set LCR failed\n", __func__); 648 goto out_unlock; 649 } 650 651 port_priv->shadow_lcr = value; 652 out_unlock: 653 mutex_unlock(&port_priv->lcr_mutex); 654 655 return status; 656 } 657 658 static int f81534_break_ctl(struct tty_struct *tty, int break_state) 659 { 660 struct usb_serial_port *port = tty->driver_data; 661 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 662 int status; 663 664 mutex_lock(&port_priv->lcr_mutex); 665 666 if (break_state) 667 port_priv->shadow_lcr |= UART_LCR_SBC; 668 else 669 port_priv->shadow_lcr &= ~UART_LCR_SBC; 670 671 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 672 port_priv->shadow_lcr); 673 if (status) 674 dev_err(&port->dev, "set break failed: %d\n", status); 675 676 mutex_unlock(&port_priv->lcr_mutex); 677 678 return status; 679 } 680 681 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set, 682 unsigned int clear) 683 { 684 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 685 int status; 686 u8 tmp; 687 688 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0) 689 return 0; /* no change */ 690 691 mutex_lock(&port_priv->mcr_mutex); 692 693 /* 'Set' takes precedence over 'Clear' */ 694 clear &= ~set; 695 696 /* Always enable UART_MCR_OUT2 */ 697 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr; 698 699 if (clear & TIOCM_DTR) 700 tmp &= ~UART_MCR_DTR; 701 702 if (clear & TIOCM_RTS) 703 tmp &= ~UART_MCR_RTS; 704 705 if (set & TIOCM_DTR) 706 tmp |= UART_MCR_DTR; 707 708 if (set & TIOCM_RTS) 709 tmp |= UART_MCR_RTS; 710 711 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp); 712 if (status < 0) { 713 dev_err(&port->dev, "%s: MCR write failed\n", __func__); 714 mutex_unlock(&port_priv->mcr_mutex); 715 return status; 716 } 717 718 port_priv->shadow_mcr = tmp; 719 mutex_unlock(&port_priv->mcr_mutex); 720 return 0; 721 } 722 723 /* 724 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN 725 * for latest configuration index. If nothing found 726 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in 727 * F81534_DEF_CONF_ADDRESS_START section. 728 * 729 * Due to we only use block0 to save data, so *index should be 0 or 730 * F81534_CUSTOM_NO_CUSTOM_DATA. 731 */ 732 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index) 733 { 734 u8 tmp; 735 int status; 736 737 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1, 738 &tmp); 739 if (status) { 740 dev_err(&serial->interface->dev, "%s: read failed: %d\n", 741 __func__, status); 742 return status; 743 } 744 745 /* We'll use the custom data when the data is valid. */ 746 if (tmp == F81534_CUSTOM_VALID_TOKEN) 747 *index = 0; 748 else 749 *index = F81534_CUSTOM_NO_CUSTOM_DATA; 750 751 return 0; 752 } 753 754 /* 755 * The F81532/534 will not report serial port to USB serial subsystem when 756 * H/W DCD/DSR/CTS/RI/RX pin connected to ground. 757 * 758 * To detect RX pin status, we'll enable MCR interal loopback, disable it and 759 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI. 760 */ 761 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy) 762 { 763 int status; 764 u8 old_mcr; 765 u8 msr; 766 u8 lsr; 767 u8 msr_mask; 768 769 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS; 770 771 status = f81534_get_phy_port_register(serial, phy, 772 F81534_MODEM_STATUS_REG, &msr); 773 if (status) 774 return false; 775 776 if ((msr & msr_mask) != msr_mask) 777 return false; 778 779 status = f81534_set_phy_port_register(serial, phy, 780 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | 781 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 782 if (status) 783 return false; 784 785 status = f81534_get_phy_port_register(serial, phy, 786 F81534_MODEM_CONTROL_REG, &old_mcr); 787 if (status) 788 return false; 789 790 status = f81534_set_phy_port_register(serial, phy, 791 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP); 792 if (status) 793 return false; 794 795 status = f81534_set_phy_port_register(serial, phy, 796 F81534_MODEM_CONTROL_REG, 0x0); 797 if (status) 798 return false; 799 800 msleep(60); 801 802 status = f81534_get_phy_port_register(serial, phy, 803 F81534_LINE_STATUS_REG, &lsr); 804 if (status) 805 return false; 806 807 status = f81534_set_phy_port_register(serial, phy, 808 F81534_MODEM_CONTROL_REG, old_mcr); 809 if (status) 810 return false; 811 812 if ((lsr & UART_LSR_BI) == UART_LSR_BI) 813 return true; 814 815 return false; 816 } 817 818 /* 819 * We had 2 generation of F81532/534 IC. All has an internal storage. 820 * 821 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any 822 * internal data will used. All mode and gpio control should manually set 823 * by AP or Driver and all storage space value are 0xff. The 824 * f81534_calc_num_ports() will run to final we marked as "oldest version" 825 * for this IC. 826 * 827 * 2rd is designed to more generic to use any transceiver and this is our 828 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START 829 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is 830 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following 831 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last 832 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin). 833 * The f81534_calc_num_ports() will run to "new style" with checking 834 * F81534_PORT_UNAVAILABLE section. 835 */ 836 static int f81534_calc_num_ports(struct usb_serial *serial, 837 struct usb_serial_endpoints *epds) 838 { 839 struct f81534_serial_private *serial_priv; 840 struct device *dev = &serial->interface->dev; 841 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]); 842 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]); 843 u8 num_port = 0; 844 int index = 0; 845 int status; 846 int i; 847 848 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE || 849 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) { 850 dev_err(dev, "unsupported endpoint max packet size\n"); 851 return -ENODEV; 852 } 853 854 serial_priv = devm_kzalloc(&serial->interface->dev, 855 sizeof(*serial_priv), GFP_KERNEL); 856 if (!serial_priv) 857 return -ENOMEM; 858 859 usb_set_serial_data(serial, serial_priv); 860 mutex_init(&serial_priv->urb_mutex); 861 862 /* Check had custom setting */ 863 status = f81534_find_config_idx(serial, &serial_priv->setting_idx); 864 if (status) { 865 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n", 866 __func__, status); 867 return status; 868 } 869 870 /* 871 * We'll read custom data only when data available, otherwise we'll 872 * read default value instead. 873 */ 874 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) { 875 status = f81534_read_flash(serial, 876 F81534_CUSTOM_ADDRESS_START + 877 F81534_CONF_OFFSET, 878 sizeof(serial_priv->conf_data), 879 serial_priv->conf_data); 880 if (status) { 881 dev_err(&serial->interface->dev, 882 "%s: get custom data failed: %d\n", 883 __func__, status); 884 return status; 885 } 886 887 dev_dbg(&serial->interface->dev, 888 "%s: read config from block: %d\n", __func__, 889 serial_priv->setting_idx); 890 } else { 891 /* Read default board setting */ 892 status = f81534_read_flash(serial, 893 F81534_DEF_CONF_ADDRESS_START, 894 sizeof(serial_priv->conf_data), 895 serial_priv->conf_data); 896 if (status) { 897 dev_err(&serial->interface->dev, 898 "%s: read failed: %d\n", __func__, 899 status); 900 return status; 901 } 902 903 dev_dbg(&serial->interface->dev, "%s: read default config\n", 904 __func__); 905 } 906 907 /* New style, find all possible ports */ 908 for (i = 0; i < F81534_NUM_PORT; ++i) { 909 if (f81534_check_port_hw_disabled(serial, i)) 910 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE; 911 912 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 913 continue; 914 915 ++num_port; 916 } 917 918 if (!num_port) { 919 dev_warn(&serial->interface->dev, 920 "no config found, assuming 4 ports\n"); 921 num_port = 4; /* Nothing found, oldest version IC */ 922 } 923 924 /* Assign phy-to-logic mapping */ 925 for (i = 0; i < F81534_NUM_PORT; ++i) { 926 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 927 continue; 928 929 serial_priv->tty_idx[i] = index++; 930 dev_dbg(&serial->interface->dev, 931 "%s: phy_num: %d, tty_idx: %d\n", __func__, i, 932 serial_priv->tty_idx[i]); 933 } 934 935 /* 936 * Setup bulk-out endpoint multiplexing. All ports share the same 937 * bulk-out endpoint. 938 */ 939 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT); 940 941 for (i = 1; i < num_port; ++i) 942 epds->bulk_out[i] = epds->bulk_out[0]; 943 944 epds->num_bulk_out = num_port; 945 946 return num_port; 947 } 948 949 static void f81534_set_termios(struct tty_struct *tty, 950 struct usb_serial_port *port, 951 const struct ktermios *old_termios) 952 { 953 u8 new_lcr = 0; 954 int status; 955 u32 baud; 956 u32 old_baud; 957 958 if (C_BAUD(tty) == B0) 959 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); 960 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0) 961 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); 962 963 if (C_PARENB(tty)) { 964 new_lcr |= UART_LCR_PARITY; 965 966 if (!C_PARODD(tty)) 967 new_lcr |= UART_LCR_EPAR; 968 969 if (C_CMSPAR(tty)) 970 new_lcr |= UART_LCR_SPAR; 971 } 972 973 if (C_CSTOPB(tty)) 974 new_lcr |= UART_LCR_STOP; 975 976 new_lcr |= UART_LCR_WLEN(tty_get_char_size(tty->termios.c_cflag)); 977 978 baud = tty_get_baud_rate(tty); 979 if (!baud) 980 return; 981 982 if (old_termios) 983 old_baud = tty_termios_baud_rate(old_termios); 984 else 985 old_baud = F81534_DEFAULT_BAUD_RATE; 986 987 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud); 988 989 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr); 990 if (status < 0) { 991 dev_err(&port->dev, "%s: set port config failed: %d\n", 992 __func__, status); 993 } 994 } 995 996 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags) 997 { 998 return usb_serial_generic_submit_read_urbs(serial->port[0], flags); 999 } 1000 1001 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr) 1002 { 1003 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1004 struct tty_struct *tty; 1005 unsigned long flags; 1006 u8 old_msr; 1007 1008 if (!(msr & UART_MSR_ANY_DELTA)) 1009 return; 1010 1011 spin_lock_irqsave(&port_priv->msr_lock, flags); 1012 old_msr = port_priv->shadow_msr; 1013 port_priv->shadow_msr = msr; 1014 spin_unlock_irqrestore(&port_priv->msr_lock, flags); 1015 1016 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr, 1017 msr); 1018 1019 /* Update input line counters */ 1020 if (msr & UART_MSR_DCTS) 1021 port->icount.cts++; 1022 if (msr & UART_MSR_DDSR) 1023 port->icount.dsr++; 1024 if (msr & UART_MSR_DDCD) 1025 port->icount.dcd++; 1026 if (msr & UART_MSR_TERI) 1027 port->icount.rng++; 1028 1029 wake_up_interruptible(&port->port.delta_msr_wait); 1030 1031 if (!(msr & UART_MSR_DDCD)) 1032 return; 1033 1034 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n", 1035 __func__, port_priv->phy_num, old_msr, msr); 1036 1037 tty = tty_port_tty_get(&port->port); 1038 if (!tty) 1039 return; 1040 1041 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD); 1042 tty_kref_put(tty); 1043 } 1044 1045 static int f81534_read_msr(struct usb_serial_port *port) 1046 { 1047 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1048 unsigned long flags; 1049 int status; 1050 u8 msr; 1051 1052 /* Get MSR initial value */ 1053 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); 1054 if (status) 1055 return status; 1056 1057 /* Force update current state */ 1058 spin_lock_irqsave(&port_priv->msr_lock, flags); 1059 port_priv->shadow_msr = msr; 1060 spin_unlock_irqrestore(&port_priv->msr_lock, flags); 1061 1062 return 0; 1063 } 1064 1065 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port) 1066 { 1067 struct f81534_serial_private *serial_priv = 1068 usb_get_serial_data(port->serial); 1069 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1070 int status; 1071 1072 status = f81534_set_port_register(port, 1073 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | 1074 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 1075 if (status) { 1076 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__, 1077 status); 1078 return status; 1079 } 1080 1081 if (tty) 1082 f81534_set_termios(tty, port, NULL); 1083 1084 status = f81534_read_msr(port); 1085 if (status) 1086 return status; 1087 1088 mutex_lock(&serial_priv->urb_mutex); 1089 1090 /* Submit Read URBs for first port opened */ 1091 if (!serial_priv->opened_port) { 1092 status = f81534_submit_read_urb(port->serial, GFP_KERNEL); 1093 if (status) 1094 goto exit; 1095 } 1096 1097 serial_priv->opened_port++; 1098 1099 exit: 1100 mutex_unlock(&serial_priv->urb_mutex); 1101 1102 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1103 return status; 1104 } 1105 1106 static void f81534_close(struct usb_serial_port *port) 1107 { 1108 struct f81534_serial_private *serial_priv = 1109 usb_get_serial_data(port->serial); 1110 struct usb_serial_port *port0 = port->serial->port[0]; 1111 unsigned long flags; 1112 size_t i; 1113 1114 usb_kill_urb(port->write_urbs[0]); 1115 1116 spin_lock_irqsave(&port->lock, flags); 1117 kfifo_reset_out(&port->write_fifo); 1118 spin_unlock_irqrestore(&port->lock, flags); 1119 1120 /* Kill Read URBs when final port closed */ 1121 mutex_lock(&serial_priv->urb_mutex); 1122 serial_priv->opened_port--; 1123 1124 if (!serial_priv->opened_port) { 1125 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i) 1126 usb_kill_urb(port0->read_urbs[i]); 1127 } 1128 1129 mutex_unlock(&serial_priv->urb_mutex); 1130 } 1131 1132 static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss) 1133 { 1134 struct usb_serial_port *port = tty->driver_data; 1135 struct f81534_port_private *port_priv; 1136 1137 port_priv = usb_get_serial_port_data(port); 1138 1139 ss->baud_base = port_priv->baud_base; 1140 } 1141 1142 static void f81534_process_per_serial_block(struct usb_serial_port *port, 1143 u8 *data) 1144 { 1145 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1146 int phy_num = data[0]; 1147 size_t read_size = 0; 1148 size_t i; 1149 char tty_flag; 1150 int status; 1151 u8 lsr; 1152 1153 /* 1154 * The block layout is 128 Bytes 1155 * index 0: port phy idx (e.g., 0,1,2,3), 1156 * index 1: It's could be 1157 * F81534_TOKEN_RECEIVE 1158 * F81534_TOKEN_TX_EMPTY 1159 * F81534_TOKEN_MSR_CHANGE 1160 * index 2: serial in size (data+lsr, must be even) 1161 * meaningful for F81534_TOKEN_RECEIVE only 1162 * index 3: current MSR with this device 1163 * index 4~127: serial in data block (data+lsr, must be even) 1164 */ 1165 switch (data[1]) { 1166 case F81534_TOKEN_TX_EMPTY: 1167 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1168 1169 /* Try to submit writer */ 1170 status = f81534_submit_writer(port, GFP_ATOMIC); 1171 if (status) 1172 dev_err(&port->dev, "%s: submit failed\n", __func__); 1173 return; 1174 1175 case F81534_TOKEN_MSR_CHANGE: 1176 f81534_msr_changed(port, data[3]); 1177 return; 1178 1179 case F81534_TOKEN_RECEIVE: 1180 read_size = data[2]; 1181 if (read_size > F81534_MAX_RX_SIZE) { 1182 dev_err(&port->dev, 1183 "%s: phy: %d read_size: %zu larger than: %d\n", 1184 __func__, phy_num, read_size, 1185 F81534_MAX_RX_SIZE); 1186 return; 1187 } 1188 1189 break; 1190 1191 default: 1192 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__, 1193 data[1]); 1194 return; 1195 } 1196 1197 for (i = 4; i < 4 + read_size; i += 2) { 1198 tty_flag = TTY_NORMAL; 1199 lsr = data[i + 1]; 1200 1201 if (lsr & UART_LSR_BRK_ERROR_BITS) { 1202 if (lsr & UART_LSR_BI) { 1203 tty_flag = TTY_BREAK; 1204 port->icount.brk++; 1205 usb_serial_handle_break(port); 1206 } else if (lsr & UART_LSR_PE) { 1207 tty_flag = TTY_PARITY; 1208 port->icount.parity++; 1209 } else if (lsr & UART_LSR_FE) { 1210 tty_flag = TTY_FRAME; 1211 port->icount.frame++; 1212 } 1213 1214 if (lsr & UART_LSR_OE) { 1215 port->icount.overrun++; 1216 tty_insert_flip_char(&port->port, 0, 1217 TTY_OVERRUN); 1218 } 1219 1220 schedule_work(&port_priv->lsr_work); 1221 } 1222 1223 if (port->sysrq) { 1224 if (usb_serial_handle_sysrq_char(port, data[i])) 1225 continue; 1226 } 1227 1228 tty_insert_flip_char(&port->port, data[i], tty_flag); 1229 } 1230 1231 tty_flip_buffer_push(&port->port); 1232 } 1233 1234 static void f81534_process_read_urb(struct urb *urb) 1235 { 1236 struct f81534_serial_private *serial_priv; 1237 struct usb_serial_port *port; 1238 struct usb_serial *serial; 1239 u8 *buf; 1240 int phy_port_num; 1241 int tty_port_num; 1242 size_t i; 1243 1244 if (!urb->actual_length || 1245 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) { 1246 return; 1247 } 1248 1249 port = urb->context; 1250 serial = port->serial; 1251 buf = urb->transfer_buffer; 1252 serial_priv = usb_get_serial_data(serial); 1253 1254 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) { 1255 phy_port_num = buf[i]; 1256 if (phy_port_num >= F81534_NUM_PORT) { 1257 dev_err(&port->dev, 1258 "%s: phy_port_num: %d larger than: %d\n", 1259 __func__, phy_port_num, F81534_NUM_PORT); 1260 continue; 1261 } 1262 1263 tty_port_num = serial_priv->tty_idx[phy_port_num]; 1264 port = serial->port[tty_port_num]; 1265 1266 if (tty_port_initialized(&port->port)) 1267 f81534_process_per_serial_block(port, &buf[i]); 1268 } 1269 } 1270 1271 static void f81534_write_usb_callback(struct urb *urb) 1272 { 1273 struct usb_serial_port *port = urb->context; 1274 1275 switch (urb->status) { 1276 case 0: 1277 break; 1278 case -ENOENT: 1279 case -ECONNRESET: 1280 case -ESHUTDOWN: 1281 dev_dbg(&port->dev, "%s - urb stopped: %d\n", 1282 __func__, urb->status); 1283 return; 1284 case -EPIPE: 1285 dev_err(&port->dev, "%s - urb stopped: %d\n", 1286 __func__, urb->status); 1287 return; 1288 default: 1289 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n", 1290 __func__, urb->status); 1291 break; 1292 } 1293 } 1294 1295 static void f81534_lsr_worker(struct work_struct *work) 1296 { 1297 struct f81534_port_private *port_priv; 1298 struct usb_serial_port *port; 1299 int status; 1300 u8 tmp; 1301 1302 port_priv = container_of(work, struct f81534_port_private, lsr_work); 1303 port = port_priv->port; 1304 1305 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp); 1306 if (status) 1307 dev_warn(&port->dev, "read LSR failed: %d\n", status); 1308 } 1309 1310 static int f81534_set_port_output_pin(struct usb_serial_port *port) 1311 { 1312 struct f81534_serial_private *serial_priv; 1313 struct f81534_port_private *port_priv; 1314 struct usb_serial *serial; 1315 const struct f81534_port_out_pin *pins; 1316 int status; 1317 int i; 1318 u8 value; 1319 u8 idx; 1320 1321 serial = port->serial; 1322 serial_priv = usb_get_serial_data(serial); 1323 port_priv = usb_get_serial_port_data(port); 1324 1325 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num; 1326 value = serial_priv->conf_data[idx]; 1327 if (value >= F81534_CONF_GPIO_SHUTDOWN) { 1328 /* 1329 * Newer IC configure will make transceiver in shutdown mode on 1330 * initial power on. We need enable it before using UARTs. 1331 */ 1332 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num; 1333 value = serial_priv->conf_data[idx]; 1334 if (value >= F81534_CONF_GPIO_SHUTDOWN) 1335 value = F81534_CONF_GPIO_RS232; 1336 } 1337 1338 pins = &f81534_port_out_pins[port_priv->phy_num]; 1339 1340 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) { 1341 status = f81534_set_mask_register(serial, 1342 pins->pin[i].reg_addr, pins->pin[i].reg_mask, 1343 value & BIT(i) ? pins->pin[i].reg_mask : 0); 1344 if (status) 1345 return status; 1346 } 1347 1348 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value); 1349 return 0; 1350 } 1351 1352 static int f81534_port_probe(struct usb_serial_port *port) 1353 { 1354 struct f81534_serial_private *serial_priv; 1355 struct f81534_port_private *port_priv; 1356 int ret; 1357 u8 value; 1358 1359 serial_priv = usb_get_serial_data(port->serial); 1360 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL); 1361 if (!port_priv) 1362 return -ENOMEM; 1363 1364 /* 1365 * We'll make tx frame error when baud rate from 384~500kps. So we'll 1366 * delay all tx data frame with 1bit. 1367 */ 1368 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT; 1369 spin_lock_init(&port_priv->msr_lock); 1370 mutex_init(&port_priv->mcr_mutex); 1371 mutex_init(&port_priv->lcr_mutex); 1372 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker); 1373 1374 /* Assign logic-to-phy mapping */ 1375 ret = f81534_logic_to_phy_port(port->serial, port); 1376 if (ret < 0) 1377 return ret; 1378 1379 port_priv->phy_num = ret; 1380 port_priv->port = port; 1381 usb_set_serial_port_data(port, port_priv); 1382 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__, 1383 port->port_number, port_priv->phy_num); 1384 1385 /* 1386 * The F81532/534 will hang-up when enable LSR interrupt in IER and 1387 * occur data overrun. So we'll disable the LSR interrupt in probe() 1388 * and submit the LSR worker to clear LSR state when reported LSR error 1389 * bit with bulk-in data in f81534_process_per_serial_block(). 1390 */ 1391 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG, 1392 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI); 1393 if (ret) 1394 return ret; 1395 1396 value = serial_priv->conf_data[port_priv->phy_num]; 1397 switch (value & F81534_PORT_CONF_MODE_MASK) { 1398 case F81534_PORT_CONF_RS485_INVERT: 1399 port_priv->shadow_clk |= F81534_CLK_RS485_MODE | 1400 F81534_CLK_RS485_INVERT; 1401 dev_dbg(&port->dev, "RS485 invert mode\n"); 1402 break; 1403 case F81534_PORT_CONF_RS485: 1404 port_priv->shadow_clk |= F81534_CLK_RS485_MODE; 1405 dev_dbg(&port->dev, "RS485 mode\n"); 1406 break; 1407 1408 default: 1409 case F81534_PORT_CONF_RS232: 1410 dev_dbg(&port->dev, "RS232 mode\n"); 1411 break; 1412 } 1413 1414 return f81534_set_port_output_pin(port); 1415 } 1416 1417 static void f81534_port_remove(struct usb_serial_port *port) 1418 { 1419 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1420 1421 flush_work(&port_priv->lsr_work); 1422 } 1423 1424 static int f81534_tiocmget(struct tty_struct *tty) 1425 { 1426 struct usb_serial_port *port = tty->driver_data; 1427 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1428 int status; 1429 int r; 1430 u8 msr; 1431 u8 mcr; 1432 1433 /* Read current MSR from device */ 1434 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); 1435 if (status) 1436 return status; 1437 1438 mutex_lock(&port_priv->mcr_mutex); 1439 mcr = port_priv->shadow_mcr; 1440 mutex_unlock(&port_priv->mcr_mutex); 1441 1442 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) | 1443 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) | 1444 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) | 1445 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) | 1446 (msr & UART_MSR_RI ? TIOCM_RI : 0) | 1447 (msr & UART_MSR_DSR ? TIOCM_DSR : 0); 1448 1449 return r; 1450 } 1451 1452 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set, 1453 unsigned int clear) 1454 { 1455 struct usb_serial_port *port = tty->driver_data; 1456 1457 return f81534_update_mctrl(port, set, clear); 1458 } 1459 1460 static void f81534_dtr_rts(struct usb_serial_port *port, int on) 1461 { 1462 if (on) 1463 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); 1464 else 1465 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); 1466 } 1467 1468 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port, 1469 const u8 *buf, int count) 1470 { 1471 int bytes_out, status; 1472 1473 if (!count) 1474 return 0; 1475 1476 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count, 1477 &port->lock); 1478 1479 status = f81534_submit_writer(port, GFP_ATOMIC); 1480 if (status) { 1481 dev_err(&port->dev, "%s: submit failed\n", __func__); 1482 return status; 1483 } 1484 1485 return bytes_out; 1486 } 1487 1488 static bool f81534_tx_empty(struct usb_serial_port *port) 1489 { 1490 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1491 1492 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1493 } 1494 1495 static int f81534_resume(struct usb_serial *serial) 1496 { 1497 struct f81534_serial_private *serial_priv = 1498 usb_get_serial_data(serial); 1499 struct usb_serial_port *port; 1500 int error = 0; 1501 int status; 1502 size_t i; 1503 1504 /* 1505 * We'll register port 0 bulkin when port had opened, It'll take all 1506 * port received data, MSR register change and TX_EMPTY information. 1507 */ 1508 mutex_lock(&serial_priv->urb_mutex); 1509 1510 if (serial_priv->opened_port) { 1511 status = f81534_submit_read_urb(serial, GFP_NOIO); 1512 if (status) { 1513 mutex_unlock(&serial_priv->urb_mutex); 1514 return status; 1515 } 1516 } 1517 1518 mutex_unlock(&serial_priv->urb_mutex); 1519 1520 for (i = 0; i < serial->num_ports; i++) { 1521 port = serial->port[i]; 1522 if (!tty_port_initialized(&port->port)) 1523 continue; 1524 1525 status = f81534_submit_writer(port, GFP_NOIO); 1526 if (status) { 1527 dev_err(&port->dev, "%s: submit failed\n", __func__); 1528 ++error; 1529 } 1530 } 1531 1532 if (error) 1533 return -EIO; 1534 1535 return 0; 1536 } 1537 1538 static struct usb_serial_driver f81534_device = { 1539 .driver = { 1540 .name = "f81534", 1541 }, 1542 .description = DRIVER_DESC, 1543 .id_table = f81534_id_table, 1544 .num_bulk_in = 1, 1545 .num_bulk_out = 1, 1546 .open = f81534_open, 1547 .close = f81534_close, 1548 .write = f81534_write, 1549 .tx_empty = f81534_tx_empty, 1550 .calc_num_ports = f81534_calc_num_ports, 1551 .port_probe = f81534_port_probe, 1552 .port_remove = f81534_port_remove, 1553 .break_ctl = f81534_break_ctl, 1554 .dtr_rts = f81534_dtr_rts, 1555 .process_read_urb = f81534_process_read_urb, 1556 .get_serial = f81534_get_serial_info, 1557 .tiocmget = f81534_tiocmget, 1558 .tiocmset = f81534_tiocmset, 1559 .write_bulk_callback = f81534_write_usb_callback, 1560 .set_termios = f81534_set_termios, 1561 .resume = f81534_resume, 1562 }; 1563 1564 static struct usb_serial_driver *const serial_drivers[] = { 1565 &f81534_device, NULL 1566 }; 1567 1568 module_usb_serial_driver(serial_drivers, f81534_id_table); 1569 1570 MODULE_DEVICE_TABLE(usb, f81534_id_table); 1571 MODULE_DESCRIPTION(DRIVER_DESC); 1572 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>"); 1573 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>"); 1574 MODULE_LICENSE("GPL"); 1575