1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2020 Samsung Electronics Co., Ltd.
4 * Copyright 2020 Google LLC.
5 * Copyright 2024 Linaro Ltd.
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/bits.h>
10 #include <linux/clk.h>
11 #include <linux/io.h>
12 #include <linux/mailbox_controller.h>
13 #include <linux/mailbox/exynos-message.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18
19 #define EXYNOS_MBOX_MCUCTRL 0x0 /* Mailbox Control Register */
20 #define EXYNOS_MBOX_INTCR0 0x24 /* Interrupt Clear Register 0 */
21 #define EXYNOS_MBOX_INTMR0 0x28 /* Interrupt Mask Register 0 */
22 #define EXYNOS_MBOX_INTSR0 0x2c /* Interrupt Status Register 0 */
23 #define EXYNOS_MBOX_INTMSR0 0x30 /* Interrupt Mask Status Register 0 */
24 #define EXYNOS_MBOX_INTGR1 0x40 /* Interrupt Generation Register 1 */
25 #define EXYNOS_MBOX_INTMR1 0x48 /* Interrupt Mask Register 1 */
26 #define EXYNOS_MBOX_INTSR1 0x4c /* Interrupt Status Register 1 */
27 #define EXYNOS_MBOX_INTMSR1 0x50 /* Interrupt Mask Status Register 1 */
28
29 #define EXYNOS_MBOX_INTMR0_MASK GENMASK(15, 0)
30 #define EXYNOS_MBOX_INTGR1_MASK GENMASK(15, 0)
31
32 #define EXYNOS_MBOX_CHAN_COUNT HWEIGHT32(EXYNOS_MBOX_INTGR1_MASK)
33
34 /**
35 * struct exynos_mbox - driver's private data.
36 * @regs: mailbox registers base address.
37 * @mbox: pointer to the mailbox controller.
38 */
39 struct exynos_mbox {
40 void __iomem *regs;
41 struct mbox_controller *mbox;
42 };
43
exynos_mbox_send_data(struct mbox_chan * chan,void * data)44 static int exynos_mbox_send_data(struct mbox_chan *chan, void *data)
45 {
46 struct device *dev = chan->mbox->dev;
47 struct exynos_mbox *exynos_mbox = dev_get_drvdata(dev);
48 struct exynos_mbox_msg *msg = data;
49
50 if (msg->chan_id >= exynos_mbox->mbox->num_chans) {
51 dev_err(dev, "Invalid channel ID %d\n", msg->chan_id);
52 return -EINVAL;
53 }
54
55 if (msg->chan_type != EXYNOS_MBOX_CHAN_TYPE_DOORBELL) {
56 dev_err(dev, "Unsupported channel type [%d]\n", msg->chan_type);
57 return -EINVAL;
58 }
59
60 writel(BIT(msg->chan_id), exynos_mbox->regs + EXYNOS_MBOX_INTGR1);
61
62 return 0;
63 }
64
65 static const struct mbox_chan_ops exynos_mbox_chan_ops = {
66 .send_data = exynos_mbox_send_data,
67 };
68
exynos_mbox_of_xlate(struct mbox_controller * mbox,const struct of_phandle_args * sp)69 static struct mbox_chan *exynos_mbox_of_xlate(struct mbox_controller *mbox,
70 const struct of_phandle_args *sp)
71 {
72 int i;
73
74 if (sp->args_count != 0)
75 return ERR_PTR(-EINVAL);
76
77 /*
78 * Return the first available channel. When we don't pass the
79 * channel ID from device tree, each channel populated by the driver is
80 * just a software construct or a virtual channel. We use 'void *data'
81 * in send_data() to pass the channel identifiers.
82 */
83 for (i = 0; i < mbox->num_chans; i++)
84 if (mbox->chans[i].cl == NULL)
85 return &mbox->chans[i];
86 return ERR_PTR(-EINVAL);
87 }
88
89 static const struct of_device_id exynos_mbox_match[] = {
90 { .compatible = "google,gs101-mbox" },
91 {},
92 };
93 MODULE_DEVICE_TABLE(of, exynos_mbox_match);
94
exynos_mbox_probe(struct platform_device * pdev)95 static int exynos_mbox_probe(struct platform_device *pdev)
96 {
97 struct device *dev = &pdev->dev;
98 struct exynos_mbox *exynos_mbox;
99 struct mbox_controller *mbox;
100 struct mbox_chan *chans;
101 struct clk *pclk;
102
103 exynos_mbox = devm_kzalloc(dev, sizeof(*exynos_mbox), GFP_KERNEL);
104 if (!exynos_mbox)
105 return -ENOMEM;
106
107 mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
108 if (!mbox)
109 return -ENOMEM;
110
111 chans = devm_kcalloc(dev, EXYNOS_MBOX_CHAN_COUNT, sizeof(*chans),
112 GFP_KERNEL);
113 if (!chans)
114 return -ENOMEM;
115
116 exynos_mbox->regs = devm_platform_ioremap_resource(pdev, 0);
117 if (IS_ERR(exynos_mbox->regs))
118 return PTR_ERR(exynos_mbox->regs);
119
120 pclk = devm_clk_get_enabled(dev, "pclk");
121 if (IS_ERR(pclk))
122 return dev_err_probe(dev, PTR_ERR(pclk),
123 "Failed to enable clock.\n");
124
125 mbox->num_chans = EXYNOS_MBOX_CHAN_COUNT;
126 mbox->chans = chans;
127 mbox->dev = dev;
128 mbox->ops = &exynos_mbox_chan_ops;
129 mbox->of_xlate = exynos_mbox_of_xlate;
130
131 exynos_mbox->mbox = mbox;
132
133 platform_set_drvdata(pdev, exynos_mbox);
134
135 /* Mask out all interrupts. We support just polling channels for now. */
136 writel(EXYNOS_MBOX_INTMR0_MASK, exynos_mbox->regs + EXYNOS_MBOX_INTMR0);
137
138 return devm_mbox_controller_register(dev, mbox);
139 }
140
141 static struct platform_driver exynos_mbox_driver = {
142 .probe = exynos_mbox_probe,
143 .driver = {
144 .name = "exynos-acpm-mbox",
145 .of_match_table = exynos_mbox_match,
146 },
147 };
148 module_platform_driver(exynos_mbox_driver);
149
150 MODULE_AUTHOR("Tudor Ambarus <tudor.ambarus@linaro.org>");
151 MODULE_DESCRIPTION("Samsung Exynos mailbox driver");
152 MODULE_LICENSE("GPL");
153