xref: /linux/include/linux/spi/eeprom.h (revision cbecf716ca618fd44feda6bd9a64a8179d031fc5)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __LINUX_SPI_EEPROM_H
3 #define __LINUX_SPI_EEPROM_H
4 
5 #include <linux/memory.h>
6 
7 /*
8  * Put one of these structures in platform_data for SPI EEPROMS handled
9  * by the "at25" driver.  On SPI, most EEPROMS understand the same core
10  * command set.  If you need to support EEPROMs that don't yet fit, add
11  * flags to support those protocol options.  These values all come from
12  * the chip datasheets.
13  */
14 struct spi_eeprom {
15 	u32		byte_len;
16 	char		name[10];
17 	u32		page_size;		/* for writes */
18 	u16		flags;
19 #define	EE_ADDR1	0x0001			/*  8 bit addrs */
20 #define	EE_ADDR2	0x0002			/* 16 bit addrs */
21 #define	EE_ADDR3	0x0004			/* 24 bit addrs */
22 #define	EE_READONLY	0x0008			/* disallow writes */
23 
24 	/*
25 	 * Certain EEPROMS have a size that is larger than the number of address
26 	 * bytes would allow (e.g. like M95040 from ST that has 512 Byte size
27 	 * but uses only one address byte (A0 to A7) for addressing.) For
28 	 * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte
29 	 * is used. This instruction bit is normally defined as don't care for
30 	 * other AT25 like chips.
31 	 */
32 #define EE_INSTR_BIT3_IS_ADDR	0x0010
33 
34 	void *context;
35 };
36 
37 #endif /* __LINUX_SPI_EEPROM_H */
38