1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2019-2020. Linaro Limited.
5 */
6
7 #include <linux/firmware.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/i2c.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/mutex.h>
13 #include <linux/of_graph.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/wait.h>
18 #include <linux/workqueue.h>
19
20 #include <sound/hdmi-codec.h>
21
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_bridge.h>
24 #include <drm/drm_edid.h>
25 #include <drm/drm_mipi_dsi.h>
26 #include <drm/drm_of.h>
27 #include <drm/drm_print.h>
28 #include <drm/drm_probe_helper.h>
29
30 #define EDID_BLOCK_SIZE 128
31 #define EDID_NUM_BLOCKS 2
32
33 #define FW_FILE "lt9611uxc_fw.bin"
34
35 struct lt9611uxc {
36 struct device *dev;
37 struct drm_bridge bridge;
38 struct drm_bridge *next_bridge;
39
40 struct regmap *regmap;
41 /* Protects all accesses to registers by stopping the on-chip MCU */
42 struct mutex ocm_lock;
43
44 struct wait_queue_head wq;
45 struct work_struct work;
46
47 struct device_node *dsi0_node;
48 struct device_node *dsi1_node;
49 struct mipi_dsi_device *dsi0;
50 struct mipi_dsi_device *dsi1;
51 struct platform_device *audio_pdev;
52
53 struct gpio_desc *reset_gpio;
54 struct gpio_desc *enable_gpio;
55
56 struct regulator_bulk_data supplies[2];
57
58 struct i2c_client *client;
59
60 bool hpd_supported;
61 bool edid_read;
62 /* can be accessed from different threads, so protect this with ocm_lock */
63 bool hdmi_connected;
64 uint8_t fw_version;
65 };
66
67 #define LT9611_PAGE_CONTROL 0xff
68
69 static const struct regmap_range_cfg lt9611uxc_ranges[] = {
70 {
71 .name = "register_range",
72 .range_min = 0,
73 .range_max = 0xd0ff,
74 .selector_reg = LT9611_PAGE_CONTROL,
75 .selector_mask = 0xff,
76 .selector_shift = 0,
77 .window_start = 0,
78 .window_len = 0x100,
79 },
80 };
81
82 static const struct regmap_config lt9611uxc_regmap_config = {
83 .reg_bits = 8,
84 .val_bits = 8,
85 .max_register = 0xffff,
86 .ranges = lt9611uxc_ranges,
87 .num_ranges = ARRAY_SIZE(lt9611uxc_ranges),
88 };
89
90 struct lt9611uxc_mode {
91 u16 hdisplay;
92 u16 vdisplay;
93 u8 vrefresh;
94 };
95
96 /*
97 * This chip supports only a fixed set of modes.
98 * Enumerate them here to check whether the mode is supported.
99 */
100 static struct lt9611uxc_mode lt9611uxc_modes[] = {
101 { 1920, 1080, 60 },
102 { 1920, 1080, 30 },
103 { 1920, 1080, 25 },
104 { 1366, 768, 60 },
105 { 1360, 768, 60 },
106 { 1280, 1024, 60 },
107 { 1280, 800, 60 },
108 { 1280, 720, 60 },
109 { 1280, 720, 50 },
110 { 1280, 720, 30 },
111 { 1152, 864, 60 },
112 { 1024, 768, 60 },
113 { 800, 600, 60 },
114 { 720, 576, 50 },
115 { 720, 480, 60 },
116 { 640, 480, 60 },
117 };
118
bridge_to_lt9611uxc(struct drm_bridge * bridge)119 static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge)
120 {
121 return container_of(bridge, struct lt9611uxc, bridge);
122 }
123
lt9611uxc_lock(struct lt9611uxc * lt9611uxc)124 static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc)
125 {
126 mutex_lock(<9611uxc->ocm_lock);
127 regmap_write(lt9611uxc->regmap, 0x80ee, 0x01);
128 }
129
lt9611uxc_unlock(struct lt9611uxc * lt9611uxc)130 static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc)
131 {
132 regmap_write(lt9611uxc->regmap, 0x80ee, 0x00);
133 msleep(50);
134 mutex_unlock(<9611uxc->ocm_lock);
135 }
136
lt9611uxc_irq_thread_handler(int irq,void * dev_id)137 static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id)
138 {
139 struct lt9611uxc *lt9611uxc = dev_id;
140 unsigned int irq_status = 0;
141 unsigned int hpd_status = 0;
142
143 lt9611uxc_lock(lt9611uxc);
144
145 regmap_read(lt9611uxc->regmap, 0xb022, &irq_status);
146 regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status);
147 if (irq_status)
148 regmap_write(lt9611uxc->regmap, 0xb022, 0);
149
150 if (irq_status & BIT(0)) {
151 lt9611uxc->edid_read = !!(hpd_status & BIT(0));
152 wake_up_all(<9611uxc->wq);
153 }
154
155 if (irq_status & BIT(1)) {
156 lt9611uxc->hdmi_connected = hpd_status & BIT(1);
157 schedule_work(<9611uxc->work);
158 }
159
160 lt9611uxc_unlock(lt9611uxc);
161
162 return IRQ_HANDLED;
163 }
164
lt9611uxc_hpd_work(struct work_struct * work)165 static void lt9611uxc_hpd_work(struct work_struct *work)
166 {
167 struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work);
168 bool connected;
169
170 mutex_lock(<9611uxc->ocm_lock);
171 connected = lt9611uxc->hdmi_connected;
172 mutex_unlock(<9611uxc->ocm_lock);
173
174 drm_bridge_hpd_notify(<9611uxc->bridge,
175 connected ?
176 connector_status_connected :
177 connector_status_disconnected);
178 }
179
lt9611uxc_reset(struct lt9611uxc * lt9611uxc)180 static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc)
181 {
182 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
183 msleep(20);
184
185 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0);
186 msleep(20);
187
188 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1);
189 msleep(300);
190 }
191
lt9611uxc_assert_5v(struct lt9611uxc * lt9611uxc)192 static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc)
193 {
194 if (!lt9611uxc->enable_gpio)
195 return;
196
197 gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1);
198 msleep(20);
199 }
200
lt9611uxc_regulator_init(struct lt9611uxc * lt9611uxc)201 static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc)
202 {
203 int ret;
204
205 lt9611uxc->supplies[0].supply = "vdd";
206 lt9611uxc->supplies[1].supply = "vcc";
207
208 ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies);
209 if (ret < 0)
210 return ret;
211
212 return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000);
213 }
214
lt9611uxc_regulator_enable(struct lt9611uxc * lt9611uxc)215 static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc)
216 {
217 int ret;
218
219 ret = regulator_enable(lt9611uxc->supplies[0].consumer);
220 if (ret < 0)
221 return ret;
222
223 usleep_range(1000, 10000); /* 50000 according to dtsi */
224
225 ret = regulator_enable(lt9611uxc->supplies[1].consumer);
226 if (ret < 0) {
227 regulator_disable(lt9611uxc->supplies[0].consumer);
228 return ret;
229 }
230
231 return 0;
232 }
233
lt9611uxc_find_mode(const struct drm_display_mode * mode)234 static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode)
235 {
236 int i;
237
238 for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) {
239 if (lt9611uxc_modes[i].hdisplay == mode->hdisplay &&
240 lt9611uxc_modes[i].vdisplay == mode->vdisplay &&
241 lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) {
242 return <9611uxc_modes[i];
243 }
244 }
245
246 return NULL;
247 }
248
lt9611uxc_attach_dsi(struct lt9611uxc * lt9611uxc,struct device_node * dsi_node)249 static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc,
250 struct device_node *dsi_node)
251 {
252 const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL };
253 struct mipi_dsi_device *dsi;
254 struct mipi_dsi_host *host;
255 struct device *dev = lt9611uxc->dev;
256 int ret;
257
258 host = of_find_mipi_dsi_host_by_node(dsi_node);
259 if (!host)
260 return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"));
261
262 dsi = devm_mipi_dsi_device_register_full(dev, host, &info);
263 if (IS_ERR(dsi)) {
264 dev_err(dev, "failed to create dsi device\n");
265 return dsi;
266 }
267
268 dsi->lanes = 4;
269 dsi->format = MIPI_DSI_FMT_RGB888;
270 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
271 MIPI_DSI_MODE_VIDEO_HSE;
272
273 ret = devm_mipi_dsi_attach(dev, dsi);
274 if (ret < 0) {
275 dev_err(dev, "failed to attach dsi to host\n");
276 return ERR_PTR(ret);
277 }
278
279 return dsi;
280 }
281
lt9611uxc_bridge_attach(struct drm_bridge * bridge,struct drm_encoder * encoder,enum drm_bridge_attach_flags flags)282 static int lt9611uxc_bridge_attach(struct drm_bridge *bridge,
283 struct drm_encoder *encoder,
284 enum drm_bridge_attach_flags flags)
285 {
286 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
287
288 return drm_bridge_attach(encoder, lt9611uxc->next_bridge,
289 bridge, flags);
290 }
291
292 static enum drm_mode_status
lt9611uxc_bridge_mode_valid(struct drm_bridge * bridge,const struct drm_display_info * info,const struct drm_display_mode * mode)293 lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge,
294 const struct drm_display_info *info,
295 const struct drm_display_mode *mode)
296 {
297 struct lt9611uxc_mode *lt9611uxc_mode;
298
299 lt9611uxc_mode = lt9611uxc_find_mode(mode);
300
301 return lt9611uxc_mode ? MODE_OK : MODE_BAD;
302 }
303
lt9611uxc_video_setup(struct lt9611uxc * lt9611uxc,const struct drm_display_mode * mode)304 static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc,
305 const struct drm_display_mode *mode)
306 {
307 u32 h_total, hactive, hsync_len, hfront_porch;
308 u32 v_total, vactive, vsync_len, vfront_porch;
309
310 h_total = mode->htotal;
311 v_total = mode->vtotal;
312
313 hactive = mode->hdisplay;
314 hsync_len = mode->hsync_end - mode->hsync_start;
315 hfront_porch = mode->hsync_start - mode->hdisplay;
316
317 vactive = mode->vdisplay;
318 vsync_len = mode->vsync_end - mode->vsync_start;
319 vfront_porch = mode->vsync_start - mode->vdisplay;
320
321 regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256));
322 regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256));
323
324 regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256));
325 regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256));
326
327 regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256));
328 regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256));
329
330 regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256));
331 regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256));
332
333 regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256));
334
335 regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256));
336 regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256));
337
338 regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256));
339 regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256));
340
341 regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256));
342 regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256));
343 }
344
lt9611uxc_bridge_mode_set(struct drm_bridge * bridge,const struct drm_display_mode * mode,const struct drm_display_mode * adj_mode)345 static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge,
346 const struct drm_display_mode *mode,
347 const struct drm_display_mode *adj_mode)
348 {
349 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
350
351 lt9611uxc_lock(lt9611uxc);
352 lt9611uxc_video_setup(lt9611uxc, mode);
353 lt9611uxc_unlock(lt9611uxc);
354 }
355
356 static enum drm_connector_status
lt9611uxc_bridge_detect(struct drm_bridge * bridge,struct drm_connector * connector)357 lt9611uxc_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)
358 {
359 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
360 unsigned int reg_val = 0;
361 int ret;
362 bool connected = true;
363
364 lt9611uxc_lock(lt9611uxc);
365
366 if (lt9611uxc->hpd_supported) {
367 ret = regmap_read(lt9611uxc->regmap, 0xb023, ®_val);
368
369 if (ret)
370 dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret);
371 else
372 connected = reg_val & BIT(1);
373 }
374 lt9611uxc->hdmi_connected = connected;
375
376 lt9611uxc_unlock(lt9611uxc);
377
378 return connected ? connector_status_connected :
379 connector_status_disconnected;
380 }
381
lt9611uxc_wait_for_edid(struct lt9611uxc * lt9611uxc)382 static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc)
383 {
384 return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read,
385 msecs_to_jiffies(500));
386 }
387
lt9611uxc_get_edid_block(void * data,u8 * buf,unsigned int block,size_t len)388 static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
389 {
390 struct lt9611uxc *lt9611uxc = data;
391 int ret;
392
393 if (len > EDID_BLOCK_SIZE)
394 return -EINVAL;
395
396 if (block >= EDID_NUM_BLOCKS)
397 return -EINVAL;
398
399 lt9611uxc_lock(lt9611uxc);
400
401 regmap_write(lt9611uxc->regmap, 0xb00b, 0x10);
402
403 regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE);
404
405 ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len);
406 if (ret)
407 dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret);
408
409 lt9611uxc_unlock(lt9611uxc);
410
411 return 0;
412 };
413
lt9611uxc_bridge_edid_read(struct drm_bridge * bridge,struct drm_connector * connector)414 static const struct drm_edid *lt9611uxc_bridge_edid_read(struct drm_bridge *bridge,
415 struct drm_connector *connector)
416 {
417 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge);
418 int ret;
419
420 ret = lt9611uxc_wait_for_edid(lt9611uxc);
421 if (ret < 0) {
422 dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret);
423 return NULL;
424 } else if (ret == 0) {
425 dev_err(lt9611uxc->dev, "wait for EDID timeout\n");
426 return NULL;
427 }
428
429 return drm_edid_read_custom(connector, lt9611uxc_get_edid_block, lt9611uxc);
430 }
431
432 static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = {
433 .attach = lt9611uxc_bridge_attach,
434 .mode_valid = lt9611uxc_bridge_mode_valid,
435 .mode_set = lt9611uxc_bridge_mode_set,
436 .detect = lt9611uxc_bridge_detect,
437 .edid_read = lt9611uxc_bridge_edid_read,
438 };
439
lt9611uxc_parse_dt(struct device * dev,struct lt9611uxc * lt9611uxc)440 static int lt9611uxc_parse_dt(struct device *dev,
441 struct lt9611uxc *lt9611uxc)
442 {
443 lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);
444 if (!lt9611uxc->dsi0_node) {
445 dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n");
446 return -ENODEV;
447 }
448
449 lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);
450
451 return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, <9611uxc->next_bridge);
452 }
453
lt9611uxc_gpio_init(struct lt9611uxc * lt9611uxc)454 static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc)
455 {
456 struct device *dev = lt9611uxc->dev;
457
458 lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
459 if (IS_ERR(lt9611uxc->reset_gpio)) {
460 dev_err(dev, "failed to acquire reset gpio\n");
461 return PTR_ERR(lt9611uxc->reset_gpio);
462 }
463
464 lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);
465 if (IS_ERR(lt9611uxc->enable_gpio)) {
466 dev_err(dev, "failed to acquire enable gpio\n");
467 return PTR_ERR(lt9611uxc->enable_gpio);
468 }
469
470 return 0;
471 }
472
lt9611uxc_read_device_rev(struct lt9611uxc * lt9611uxc)473 static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc)
474 {
475 unsigned int rev0, rev1, rev2;
476 int ret;
477
478 lt9611uxc_lock(lt9611uxc);
479
480 ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0);
481 ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1);
482 ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2);
483 if (ret)
484 dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
485 else
486 dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2);
487
488 lt9611uxc_unlock(lt9611uxc);
489
490 return ret;
491 }
492
lt9611uxc_read_version(struct lt9611uxc * lt9611uxc)493 static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc)
494 {
495 unsigned int rev;
496 int ret;
497
498 lt9611uxc_lock(lt9611uxc);
499
500 ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev);
501 if (ret)
502 dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret);
503 else
504 dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev);
505
506 lt9611uxc_unlock(lt9611uxc);
507
508 return ret < 0 ? ret : rev;
509 }
510
lt9611uxc_hdmi_hw_params(struct device * dev,void * data,struct hdmi_codec_daifmt * fmt,struct hdmi_codec_params * hparms)511 static int lt9611uxc_hdmi_hw_params(struct device *dev, void *data,
512 struct hdmi_codec_daifmt *fmt,
513 struct hdmi_codec_params *hparms)
514 {
515 /*
516 * LT9611UXC will automatically detect rate and sample size, so no need
517 * to setup anything here.
518 */
519 return 0;
520 }
521
lt9611uxc_audio_shutdown(struct device * dev,void * data)522 static void lt9611uxc_audio_shutdown(struct device *dev, void *data)
523 {
524 }
525
lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component * component,struct device_node * endpoint,void * data)526 static int lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
527 struct device_node *endpoint,
528 void *data)
529 {
530 struct of_endpoint of_ep;
531 int ret;
532
533 ret = of_graph_parse_endpoint(endpoint, &of_ep);
534 if (ret < 0)
535 return ret;
536
537 /*
538 * HDMI sound should be located as reg = <2>
539 * Then, it is sound port 0
540 */
541 if (of_ep.port == 2)
542 return 0;
543
544 return -EINVAL;
545 }
546
547 static const struct hdmi_codec_ops lt9611uxc_codec_ops = {
548 .hw_params = lt9611uxc_hdmi_hw_params,
549 .audio_shutdown = lt9611uxc_audio_shutdown,
550 .get_dai_id = lt9611uxc_hdmi_i2s_get_dai_id,
551 };
552
lt9611uxc_audio_init(struct device * dev,struct lt9611uxc * lt9611uxc)553 static int lt9611uxc_audio_init(struct device *dev, struct lt9611uxc *lt9611uxc)
554 {
555 struct hdmi_codec_pdata codec_data = {
556 .ops = <9611uxc_codec_ops,
557 .max_i2s_channels = 2,
558 .i2s = 1,
559 .data = lt9611uxc,
560 };
561
562 lt9611uxc->audio_pdev =
563 platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,
564 PLATFORM_DEVID_AUTO,
565 &codec_data, sizeof(codec_data));
566
567 return PTR_ERR_OR_ZERO(lt9611uxc->audio_pdev);
568 }
569
lt9611uxc_audio_exit(struct lt9611uxc * lt9611uxc)570 static void lt9611uxc_audio_exit(struct lt9611uxc *lt9611uxc)
571 {
572 if (lt9611uxc->audio_pdev) {
573 platform_device_unregister(lt9611uxc->audio_pdev);
574 lt9611uxc->audio_pdev = NULL;
575 }
576 }
577
578 #define LT9611UXC_FW_PAGE_SIZE 32
lt9611uxc_firmware_write_page(struct lt9611uxc * lt9611uxc,u16 addr,const u8 * buf)579 static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf)
580 {
581 struct reg_sequence seq_write_prepare[] = {
582 REG_SEQ0(0x805a, 0x04),
583 REG_SEQ0(0x805a, 0x00),
584
585 REG_SEQ0(0x805e, 0xdf),
586 REG_SEQ0(0x805a, 0x20),
587 REG_SEQ0(0x805a, 0x00),
588 REG_SEQ0(0x8058, 0x21),
589 };
590
591 struct reg_sequence seq_write_addr[] = {
592 REG_SEQ0(0x805b, (addr >> 16) & 0xff),
593 REG_SEQ0(0x805c, (addr >> 8) & 0xff),
594 REG_SEQ0(0x805d, addr & 0xff),
595 REG_SEQ0(0x805a, 0x10),
596 REG_SEQ0(0x805a, 0x00),
597 };
598
599 regmap_write(lt9611uxc->regmap, 0x8108, 0xbf);
600 msleep(20);
601 regmap_write(lt9611uxc->regmap, 0x8108, 0xff);
602 msleep(20);
603 regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare));
604 regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE);
605 regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr));
606 msleep(20);
607 }
608
lt9611uxc_firmware_read_page(struct lt9611uxc * lt9611uxc,u16 addr,char * buf)609 static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf)
610 {
611 struct reg_sequence seq_read_page[] = {
612 REG_SEQ0(0x805a, 0xa0),
613 REG_SEQ0(0x805a, 0x80),
614 REG_SEQ0(0x805b, (addr >> 16) & 0xff),
615 REG_SEQ0(0x805c, (addr >> 8) & 0xff),
616 REG_SEQ0(0x805d, addr & 0xff),
617 REG_SEQ0(0x805a, 0x90),
618 REG_SEQ0(0x805a, 0x80),
619 REG_SEQ0(0x8058, 0x21),
620 };
621
622 regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page));
623 regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE);
624 }
625
lt9611uxc_firmware_read(struct lt9611uxc * lt9611uxc,size_t size)626 static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size)
627 {
628 struct reg_sequence seq_read_setup[] = {
629 REG_SEQ0(0x805a, 0x84),
630 REG_SEQ0(0x805a, 0x80),
631 };
632
633 char *readbuf;
634 u16 offset;
635
636 readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL);
637 if (!readbuf)
638 return NULL;
639
640 regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup));
641
642 for (offset = 0;
643 offset < size;
644 offset += LT9611UXC_FW_PAGE_SIZE)
645 lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]);
646
647 return readbuf;
648 }
649
lt9611uxc_firmware_update(struct lt9611uxc * lt9611uxc)650 static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc)
651 {
652 int ret;
653 u16 offset;
654 size_t remain;
655 char *readbuf;
656 const struct firmware *fw;
657
658 struct reg_sequence seq_setup[] = {
659 REG_SEQ0(0x805e, 0xdf),
660 REG_SEQ0(0x8058, 0x00),
661 REG_SEQ0(0x8059, 0x50),
662 REG_SEQ0(0x805a, 0x10),
663 REG_SEQ0(0x805a, 0x00),
664 };
665
666
667 struct reg_sequence seq_block_erase[] = {
668 REG_SEQ0(0x805a, 0x04),
669 REG_SEQ0(0x805a, 0x00),
670 REG_SEQ0(0x805b, 0x00),
671 REG_SEQ0(0x805c, 0x00),
672 REG_SEQ0(0x805d, 0x00),
673 REG_SEQ0(0x805a, 0x01),
674 REG_SEQ0(0x805a, 0x00),
675 };
676
677 ret = request_firmware(&fw, FW_FILE, lt9611uxc->dev);
678 if (ret < 0)
679 return ret;
680
681 dev_info(lt9611uxc->dev, "Updating firmware\n");
682 lt9611uxc_lock(lt9611uxc);
683
684 regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup));
685
686 /*
687 * Need erase block 2 timess here. Sometimes, block erase can fail.
688 * This is a workaroud.
689 */
690 regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
691 msleep(3000);
692 regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase));
693 msleep(3000);
694
695 for (offset = 0, remain = fw->size;
696 remain >= LT9611UXC_FW_PAGE_SIZE;
697 offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE)
698 lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset);
699
700 if (remain > 0) {
701 char buf[LT9611UXC_FW_PAGE_SIZE];
702
703 memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE);
704 memcpy(buf, fw->data + offset, remain);
705 lt9611uxc_firmware_write_page(lt9611uxc, offset, buf);
706 }
707 msleep(20);
708
709 readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size);
710 if (!readbuf) {
711 ret = -ENOMEM;
712 goto out;
713 }
714
715 if (!memcmp(readbuf, fw->data, fw->size)) {
716 dev_err(lt9611uxc->dev, "Firmware update failed\n");
717 print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET, 16, 1, readbuf, fw->size, false);
718 ret = -EINVAL;
719 } else {
720 dev_info(lt9611uxc->dev, "Firmware updates successfully\n");
721 ret = 0;
722 }
723 kfree(readbuf);
724
725 out:
726 lt9611uxc_unlock(lt9611uxc);
727 lt9611uxc_reset(lt9611uxc);
728 release_firmware(fw);
729
730 return ret;
731 }
732
lt9611uxc_firmware_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)733 static ssize_t lt9611uxc_firmware_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len)
734 {
735 struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
736 int ret;
737
738 ret = lt9611uxc_firmware_update(lt9611uxc);
739 if (ret < 0)
740 return ret;
741 return len;
742 }
743
lt9611uxc_firmware_show(struct device * dev,struct device_attribute * attr,char * buf)744 static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf)
745 {
746 struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev);
747
748 return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version);
749 }
750
751 static DEVICE_ATTR_RW(lt9611uxc_firmware);
752
753 static struct attribute *lt9611uxc_attrs[] = {
754 &dev_attr_lt9611uxc_firmware.attr,
755 NULL,
756 };
757
758 static const struct attribute_group lt9611uxc_attr_group = {
759 .attrs = lt9611uxc_attrs,
760 };
761
762 static const struct attribute_group *lt9611uxc_attr_groups[] = {
763 <9611uxc_attr_group,
764 NULL,
765 };
766
lt9611uxc_probe(struct i2c_client * client)767 static int lt9611uxc_probe(struct i2c_client *client)
768 {
769 struct lt9611uxc *lt9611uxc;
770 struct device *dev = &client->dev;
771 int ret;
772 bool fw_updated = false;
773
774 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
775 dev_err(dev, "device doesn't support I2C\n");
776 return -ENODEV;
777 }
778
779 lt9611uxc = devm_drm_bridge_alloc(dev, struct lt9611uxc, bridge, <9611uxc_bridge_funcs);
780 if (IS_ERR(lt9611uxc))
781 return PTR_ERR(lt9611uxc);
782
783 lt9611uxc->dev = dev;
784 lt9611uxc->client = client;
785 mutex_init(<9611uxc->ocm_lock);
786
787 lt9611uxc->regmap = devm_regmap_init_i2c(client, <9611uxc_regmap_config);
788 if (IS_ERR(lt9611uxc->regmap)) {
789 dev_err(lt9611uxc->dev, "regmap i2c init failed\n");
790 return PTR_ERR(lt9611uxc->regmap);
791 }
792
793 ret = lt9611uxc_parse_dt(dev, lt9611uxc);
794 if (ret) {
795 dev_err(dev, "failed to parse device tree\n");
796 return ret;
797 }
798
799 ret = lt9611uxc_gpio_init(lt9611uxc);
800 if (ret < 0)
801 goto err_of_put;
802
803 ret = lt9611uxc_regulator_init(lt9611uxc);
804 if (ret < 0)
805 goto err_of_put;
806
807 lt9611uxc_assert_5v(lt9611uxc);
808
809 ret = lt9611uxc_regulator_enable(lt9611uxc);
810 if (ret)
811 goto err_of_put;
812
813 lt9611uxc_reset(lt9611uxc);
814
815 ret = lt9611uxc_read_device_rev(lt9611uxc);
816 if (ret) {
817 dev_err(dev, "failed to read chip rev\n");
818 goto err_disable_regulators;
819 }
820
821 retry:
822 ret = lt9611uxc_read_version(lt9611uxc);
823 if (ret < 0) {
824 dev_err(dev, "failed to read FW version\n");
825 goto err_disable_regulators;
826 } else if (ret == 0) {
827 if (!fw_updated) {
828 fw_updated = true;
829 dev_err(dev, "FW version 0, enforcing firmware update\n");
830 ret = lt9611uxc_firmware_update(lt9611uxc);
831 if (ret < 0)
832 goto err_disable_regulators;
833 else
834 goto retry;
835 } else {
836 dev_err(dev, "FW version 0, update failed\n");
837 ret = -EOPNOTSUPP;
838 goto err_disable_regulators;
839 }
840 } else if (ret < 0x40) {
841 dev_info(dev, "FW version 0x%x, HPD not supported\n", ret);
842 } else {
843 lt9611uxc->hpd_supported = true;
844 }
845 lt9611uxc->fw_version = ret;
846
847 init_waitqueue_head(<9611uxc->wq);
848 INIT_WORK(<9611uxc->work, lt9611uxc_hpd_work);
849
850 ret = request_threaded_irq(client->irq, NULL,
851 lt9611uxc_irq_thread_handler,
852 IRQF_ONESHOT, "lt9611uxc", lt9611uxc);
853 if (ret) {
854 dev_err(dev, "failed to request irq\n");
855 goto err_disable_regulators;
856 }
857
858 i2c_set_clientdata(client, lt9611uxc);
859
860 lt9611uxc->bridge.of_node = client->dev.of_node;
861 lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
862 if (lt9611uxc->hpd_supported)
863 lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD;
864 lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
865
866 drm_bridge_add(<9611uxc->bridge);
867
868 /* Attach primary DSI */
869 lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node);
870 if (IS_ERR(lt9611uxc->dsi0)) {
871 ret = PTR_ERR(lt9611uxc->dsi0);
872 goto err_remove_bridge;
873 }
874
875 /* Attach secondary DSI, if specified */
876 if (lt9611uxc->dsi1_node) {
877 lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node);
878 if (IS_ERR(lt9611uxc->dsi1)) {
879 ret = PTR_ERR(lt9611uxc->dsi1);
880 goto err_remove_bridge;
881 }
882 }
883
884 ret = lt9611uxc_audio_init(dev, lt9611uxc);
885 if (ret)
886 goto err_remove_bridge;
887
888 return 0;
889
890 err_remove_bridge:
891 free_irq(client->irq, lt9611uxc);
892 cancel_work_sync(<9611uxc->work);
893 drm_bridge_remove(<9611uxc->bridge);
894
895 err_disable_regulators:
896 regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
897
898 err_of_put:
899 of_node_put(lt9611uxc->dsi1_node);
900 of_node_put(lt9611uxc->dsi0_node);
901
902 return ret;
903 }
904
lt9611uxc_remove(struct i2c_client * client)905 static void lt9611uxc_remove(struct i2c_client *client)
906 {
907 struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client);
908
909 free_irq(client->irq, lt9611uxc);
910 cancel_work_sync(<9611uxc->work);
911 lt9611uxc_audio_exit(lt9611uxc);
912 drm_bridge_remove(<9611uxc->bridge);
913
914 mutex_destroy(<9611uxc->ocm_lock);
915
916 regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies);
917
918 of_node_put(lt9611uxc->dsi1_node);
919 of_node_put(lt9611uxc->dsi0_node);
920 }
921
922 static const struct i2c_device_id lt9611uxc_id[] = {
923 { "lontium,lt9611uxc" },
924 { /* sentinel */ }
925 };
926
927 static const struct of_device_id lt9611uxc_match_table[] = {
928 { .compatible = "lontium,lt9611uxc" },
929 { /* sentinel */ }
930 };
931 MODULE_DEVICE_TABLE(of, lt9611uxc_match_table);
932
933 static struct i2c_driver lt9611uxc_driver = {
934 .driver = {
935 .name = "lt9611uxc",
936 .of_match_table = lt9611uxc_match_table,
937 .dev_groups = lt9611uxc_attr_groups,
938 },
939 .probe = lt9611uxc_probe,
940 .remove = lt9611uxc_remove,
941 .id_table = lt9611uxc_id,
942 };
943 module_i2c_driver(lt9611uxc_driver);
944
945 MODULE_AUTHOR("Dmitry Baryshkov <dmitry.baryshkov@linaro.org>");
946 MODULE_DESCRIPTION("Lontium LT9611UXC DSI/HDMI bridge driver");
947 MODULE_LICENSE("GPL v2");
948
949 MODULE_FIRMWARE(FW_FILE);
950