| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 39 unsigned DstIdx = 0; variable
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| H A D | TwoAddressInstructionPass.cpp | 739 unsigned DstIdx, in commuteInstruction()
1314 unsigned SrcIdx, unsigned DstIdx, unsigned &Dist, bool shouldOnlyCommute) { in tryInstructionTransform()
1520 unsigned DstIdx = 0; in collectTiedOperands() local
1568 unsigned DstIdx = TP.second; in processTiedPairs() local
1753 unsigned DstIdx = TO.second[0].second; in processStatepoint() local
1887 unsigned DstIdx = TiedPairs[0].second; in run() local
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| H A D | RegisterCoalescer.cpp | 1294 unsigned DstIdx = CP.isFlipped() ? CP.getSrcIdx() : CP.getDstIdx(); in reMaterializeTrivialDef() local
1984 unsigned DstIdx = CP.getDstIdx(); in joinCopy() local
3638 unsigned DstIdx = CP.getDstIdx(); in joinVirtRegs() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 86 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst); in runOnMachineFunction() local
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| H A D | R600Packetizer.cpp | 84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector() local
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| H A D | SIPeepholeSDWA.cpp | 420 auto DstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertToSDWA() local
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| H A D | R600ISelLowering.cpp | 224 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst); in EmitInstrWithCustomInserter() local
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| H A D | SIInstrInfo.cpp | 4774 int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst); in verifyInstruction() local
4891 const uint32_t DstIdx = in verifyInstruction() local
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| H A D | SIISelLowering.cpp | 15125 int DstIdx = in AddMemOpInit() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelKnownBits.cpp | 519 unsigned DstIdx = 0; in computeKnownBitsImpl() local
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| H A D | LegalizerHelper.cpp | 5817 unsigned DstIdx = 0; // Low bits of the result. in multiplyRegisters() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 1011 unsigned DstIdx = (Elt0UnmergeIdx * EltSize) / DstTy.getSizeInBits(); in tryCombineMergeLike() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGNonTrivialStruct.cpp | 33 enum { DstIdx = 0, SrcIdx = 1 }; enumerator
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| H A D | CGBuiltin.cpp | 21592 Value *DstIdx = EmitScalarExpr(E->getArg(2)); in EmitWebAssemblyBuiltinExpr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 409 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst); in decodeAVLdSt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 2432 unsigned DstIdx = (Imm >> 4) & 3; in commuteInstructionImpl() local
7229 unsigned DstIdx = (Imm >> 4) & 3; in foldMemoryOperandCustom() local
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| H A D | X86ISelLowering.cpp | 6009 unsigned DstIdx = 0; in getFauxShuffleMask() local
41289 unsigned DstIdx = (InsertPSMask >> 4) & 0x3; in combineTargetShuffle() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 8495 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst); in cvtVOP3DstOpSelOnly() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5028 for (unsigned DstIdx = 0; DstIdx < Mask.size(); DstIdx++) { lowerShuffleViaVRegSplitting() local
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