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Searched defs:DestReg (Results 1 – 25 of 110) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumbRegisterInfo.cpp61 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
81 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
103 const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
124 const DebugLoc &dl, Register DestReg, Register BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
251 const DebugLoc &dl, Register DestReg, in emitThumbRegPlusImmediate()
439 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
464 Register DestReg = FrameReg; in rewriteFrameIndex() local
H A DThumb1InstrInfo.cpp44 const DebugLoc &DL, Register DestReg, in copyPhysReg()
146 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg, in loadRegFromStackSlot()
H A DThumb2InstrInfo.cpp134 Register DestReg = MI.getOperand(0).getReg(); in optimizeSelect() local
152 const DebugLoc &DL, Register DestReg, in copyPhysReg()
211 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg, in loadRegFromStackSlot()
313 const DebugLoc &dl, Register DestReg, in emitT2RegPlusImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitConst32AndConst64.cpp69 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
76 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
H A DHexagonCopyToCombine.cpp127 Register DestReg = Op0.getReg(); in isCombinableInstType() local
140 Register DestReg = Op0.getReg(); in isCombinableInstType() local
237 unsigned DestReg, in isUnsafeToMoveAcross()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp388 Register DestReg = createResultReg(RC); in materializeFP() local
394 Register DestReg = createResultReg(RC); in materializeFP() local
409 Register DestReg = createResultReg(RC); in materializeGV() local
431 Register DestReg = createResultReg(RC); in materializeExternalCallSym() local
1015 Register DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1092 Register DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1130 Register DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1606 Register DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1734 Register DestReg = VA.getLocReg(); in selectRet() local
1836 unsigned DestReg) { in emitIntSExt32r1()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp866 void LoongArchAsmParser::emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg, in emitLAInstSeq()
954 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressAbs() local
981 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressPcrel() local
1003 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressPcrelLarge() local
1024 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressGot() local
1077 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressGotLarge() local
1101 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSLE() local
1116 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSIE() local
1170 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSIELarge() local
1191 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSLD() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp263 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
299 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
328 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
468 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
570 Register DestReg, Register CmpValReg, in tryToFoldBNEOnCmpXchgResult()
633 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
H A DRISCVMergeBaseOffset.cpp320 Register DestReg = Lo.getOperand(0).getReg(); in detectAndFoldOffset() local
380 Register DestReg = Lo.getOperand(0).getReg(); in foldIntoMemoryOps() local
H A DRISCVExpandPseudoInsts.cpp204 Register DestReg = MI.getOperand(0).getReg(); in expandCCOp() local
569 Register DestReg = MI.getOperand(0).getReg(); in expandAuipcInstPair() local
634 Register DestReg = in expandLoadTLSDescAddress() local
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZPostRewrite.cpp81 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux() local
102 Register DestReg = MBBI->getOperand(0).getReg(); in selectSELRMux() local
177 Register DestReg = MI.getOperand(0).getReg(); in expandCondMove() local
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandAtomicPseudoInsts.cpp168 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
236 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
260 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
397 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
526 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
H A DLoongArchExpandPseudoInsts.cpp191 Register DestReg = MI.getOperand(0).getReg(); in expandPcalau12iInstPair() local
224 unsigned IdentifyingMO, const MachineOperand &Symbol, Register DestReg, in expandLargeAddressLoad()
370 Register DestReg = MI.getOperand(0).getReg(); in expandLoadAddressTLSLE() local
487 Register DestReg = MI.getOperand(0).getReg(); in expandLoadAddressTLSDesc() local
742 Register DestReg = MI.getOperand(0).getReg(); in expandCopyCFR() local
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp142 inline MachineInstrBuilder build(const MCInstrDesc &MCID, Register DestReg) { in build()
145 inline MachineInstrBuilder build(unsigned InstOpc, Register DestReg) { in build()
260 Register DestReg = MI.getOperand(0).getReg(); in processLDQ() local
330 Register DestReg = MI.getOperand(0).getReg(); in processLDVM() local
416 Register DestReg = MI.getOperand(0).getReg(); in processLDVM512() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h383 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
396 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
415 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
427 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
438 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
498 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp33 const DebugLoc &DL, Register DestReg, in copyPhysReg()
151 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg, in loadRegFromStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp59 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, in loadRegFromStackSlot()
86 const DebugLoc &DL, Register DestReg, in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600MachineScheduler.cpp264 Register DestReg = MI->getOperand(0).getReg(); in getAluKind() local
350 Register DestReg = MI->getOperand(DstIndex).getReg(); in AssignSlot() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp1018 Register DestReg = MI.getOperand(0).getReg(); in lowerCRRestore() local
1185 Register DestReg = MI.getOperand(0).getReg(); in lowerCRBitRestore() local
1220 MCRegister DestReg, MCRegister SrcReg) { in emitAccCopyInfo()
1369 Register DestReg = MI.getOperand(0).getReg(); in lowerACCRestore() local
1444 Register DestReg = MI.getOperand(0).getReg(); in lowerWACCRestore() local
1497 Register DestReg = MI.getOperand(0).getReg(); in lowerQuadwordRestore() local
1570 auto restoreDMR = [&](Register DestReg, int BEIdx, int LEIdx) { in lowerDMRRestore()
1592 Register DestReg = MI.getOperand(0).getReg(); in lowerDMRRestore() local
H A DPPCFastISel.cpp806 bool IsZExt, Register DestReg, in PPCEmitCmp()
974 Register DestReg; in SelectFPTrunc() local
1082 Register DestReg = createResultReg(&PPC::SPERCRegClass); in SelectIToFP() local
1119 Register DestReg = createResultReg(RC); in SelectIToFP() local
1211 Register DestReg; in SelectFPToI() local
1795 Register DestReg, bool IsZExt) { in PPCEmitIntExt()
1993 Register DestReg = createResultReg(RC); in PPCMaterializeFP() local
2049 Register DestReg = createResultReg(RC); in PPCMaterializeGV() local
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.cpp437 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg, in loadRegFromStackSlot()
479 const DebugLoc &DL, Register DestReg, in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp38 const DebugLoc &DL, Register DestReg, in copyPhysReg()
162 Register DestReg, int FrameIndex, in loadRegFromStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp31 const DebugLoc &DL, Register DestReg, in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp329 const DebugLoc &DL, Register DestReg, in copyPhysReg()
378 Register DestReg, int FrameIndex, in loadRegFromStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp283 const DebugLoc &DL, Register DestReg, in copyPhysReg()
324 Register DestReg, int FrameIndex, in loadRegFromStackSlot()

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