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Searched defs:DefIdx (Results 1 – 25 of 40) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervalCalc.cpp36 SlotIndex DefIdx = createDeadDef() local
181 unsigned DefIdx; extendToUses() local
H A DTargetSchedule.cpp202 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency() local
142 unsigned DefIdx = 0; findDefIdx() local
H A DTargetInstrInfo.cpp1443 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
1645 unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const { in getOperandLatency()
1652 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceInputs()
1679 const MachineInstr &MI, unsigned DefIdx, in getExtractSubregInputs()
1704 const MachineInstr &MI, unsigned DefIdx, in getInsertSubregInputs()
H A DLiveRangeEdit.cpp167 SlotIndex DefIdx; in canRematerializeAt() local
H A DRenameIndependentSubregs.cpp335 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags() local
H A DMachineCombiner.cpp232 int DefIdx = in getDepth() local
H A DTargetRegisterInfo.cpp389 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
H A DMachineVerifier.cpp2494 unsigned DefIdx; in visitMachineOperand() local
2739 unsigned MONum, SlotIndex DefIdx, in checkLivenessAtDef()
2942 SlotIndex DefIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local
H A DMachineInstr.cpp280 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand() local
960 unsigned DefIdx; in getRegClassConstraint() local
1162 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) { in tieOperands()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.h141 unsigned DefIdx = 0; variable
H A DScheduleDAGSDNodes.cpp479 unsigned DefIdx = N->getOperand(i).getResNo(); in AddSchedEdges() local
659 unsigned DefIdx = Use->getOperand(OpIdx).getResNo(); in computeOperandLatency() local
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrItineraries.h184 hasPipelineForwarding(unsigned DefClass,unsigned DefIdx,unsigned UseClass,unsigned UseIdx) hasPipelineForwarding() argument
205 getOperandLatency(unsigned DefClass,unsigned DefIdx,unsigned UseClass,unsigned UseIdx) getOperandLatency() argument
H A DMCSubtargetInfo.h177 unsigned DefIdx) const { in getWriteLatencyEntry()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp623 int DefIdx = SwapMap[DefMI]; in formWebs() local
727 int DefIdx = SwapMap[DefMI]; in recordUnoptimizableWebs() local
803 int DefIdx = SwapMap[DefMI]; in markSwapsForRemoval() local
H A DPPCInstrInfo.h343 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
352 unsigned DefIdx) const override { in hasLowDefLatency()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp403 int DefIdx = mapRegToGPRIndex(MI.getOperand(0).getReg()); handleADRP() local
571 int DefIdx = mapRegToGPRIndex(Def.getReg()); runOnMachineFunction() local
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp45 for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries; in computeInstrLatency() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h591 unsigned DefIdx = 0; in getDefIndex() local
896 for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) { in tryCombineUnmergeDefs() local
1154 for (unsigned j = 0, DefIdx = Idx * NewNumDefs; j < NewNumDefs; in tryCombineUnmergeValues() local
1202 for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) { in tryCombineUnmergeValues() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp214 unsigned DefIdx = 0; in tryInlineAsm() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3879 unsigned DefIdx, unsigned DefAlign) const { in getVLDMDefCycle()
3919 unsigned DefIdx, unsigned DefAlign) const { in getLDMDefCycle()
4019 unsigned DefIdx, unsigned DefAlign, const MCInstrDesc &UseMCID, in getOperandLatency()
4132 unsigned &DefIdx, unsigned &Dist) { in getBundledDefMI()
4365 unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const { in getOperandLatency()
4399 unsigned DefIdx, const MCInstrDesc &DefMCID, unsigned DefAdj, in getOperandLatencyImpl()
4459 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
4807 unsigned DefIdx, in hasHighOperandLatency()
5453 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceLikeInputs()
5480 const MachineInstr &MI, unsigned DefIdx, in getExtractSubregLikeInputs()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1378 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceLikeInputs()
1392 unsigned DefIdx, in getExtractSubregLikeInputs()
1406 getInsertSubregLikeInputs(const MachineInstr &MI, unsigned DefIdx, in getInsertSubregLikeInputs()
1812 const MachineInstr &DefMI, unsigned DefIdx, in hasHighOperandLatency()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp217 for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; getLatency() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp383 unsigned DefIdx = OpInfo.getMatchedOperand(); in lowerInlineAsm() local
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp169 unsigned DefIdx = 0; in selectInlineAsm() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp560 int DefIdx = -1; in restoreLatency() local

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