1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright 2020 Cerno
3
4 #include <linux/clk-provider.h>
5 #include <linux/module.h>
6 #include <linux/platform_device.h>
7 #include <linux/reset-controller.h>
8 #include <linux/reset/reset-simple.h>
9
10 #define DVP_HT_RPI_SW_INIT 0x04
11 #define DVP_HT_RPI_MISC_CONFIG 0x08
12
13 #define NR_CLOCKS 2
14 #define NR_RESETS 6
15
16 struct clk_dvp {
17 struct clk_hw_onecell_data *data;
18 struct reset_simple_data reset;
19 };
20
21 static const struct clk_parent_data clk_dvp_parent = {
22 .index = 0,
23 };
24
clk_dvp_probe(struct platform_device * pdev)25 static int clk_dvp_probe(struct platform_device *pdev)
26 {
27 struct clk_hw_onecell_data *data;
28 struct clk_dvp *dvp;
29 void __iomem *base;
30 int ret;
31
32 dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
33 if (!dvp)
34 return -ENOMEM;
35 platform_set_drvdata(pdev, dvp);
36
37 dvp->data = devm_kzalloc(&pdev->dev,
38 struct_size(dvp->data, hws, NR_CLOCKS),
39 GFP_KERNEL);
40 if (!dvp->data)
41 return -ENOMEM;
42 data = dvp->data;
43
44 base = devm_platform_ioremap_resource(pdev, 0);
45 if (IS_ERR(base))
46 return PTR_ERR(base);
47
48 dvp->reset.rcdev.owner = THIS_MODULE;
49 dvp->reset.rcdev.nr_resets = NR_RESETS;
50 dvp->reset.rcdev.ops = &reset_simple_ops;
51 dvp->reset.rcdev.of_node = pdev->dev.of_node;
52 dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
53 spin_lock_init(&dvp->reset.lock);
54
55 ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev);
56 if (ret)
57 return ret;
58
59 data->num = NR_CLOCKS;
60
61 data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,
62 "hdmi0-108MHz",
63 &clk_dvp_parent, 0,
64 base + DVP_HT_RPI_MISC_CONFIG, 3,
65 CLK_GATE_SET_TO_DISABLE,
66 &dvp->reset.lock);
67 if (IS_ERR(data->hws[0]))
68 return PTR_ERR(data->hws[0]);
69
70 data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,
71 "hdmi1-108MHz",
72 &clk_dvp_parent, 0,
73 base + DVP_HT_RPI_MISC_CONFIG, 4,
74 CLK_GATE_SET_TO_DISABLE,
75 &dvp->reset.lock);
76 if (IS_ERR(data->hws[1])) {
77 ret = PTR_ERR(data->hws[1]);
78 goto unregister_clk0;
79 }
80
81 ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
82 data);
83 if (ret)
84 goto unregister_clk1;
85
86 return 0;
87
88 unregister_clk1:
89 clk_hw_unregister_gate(data->hws[1]);
90
91 unregister_clk0:
92 clk_hw_unregister_gate(data->hws[0]);
93 return ret;
94 };
95
clk_dvp_remove(struct platform_device * pdev)96 static void clk_dvp_remove(struct platform_device *pdev)
97 {
98 struct clk_dvp *dvp = platform_get_drvdata(pdev);
99 struct clk_hw_onecell_data *data = dvp->data;
100
101 clk_hw_unregister_gate(data->hws[1]);
102 clk_hw_unregister_gate(data->hws[0]);
103 }
104
105 static const struct of_device_id clk_dvp_dt_ids[] = {
106 { .compatible = "brcm,brcm2711-dvp", },
107 { /* sentinel */ }
108 };
109 MODULE_DEVICE_TABLE(of, clk_dvp_dt_ids);
110
111 static struct platform_driver clk_dvp_driver = {
112 .probe = clk_dvp_probe,
113 .remove = clk_dvp_remove,
114 .driver = {
115 .name = "brcm2711-dvp",
116 .of_match_table = clk_dvp_dt_ids,
117 },
118 };
119 module_platform_driver(clk_dvp_driver);
120
121 MODULE_AUTHOR("Maxime Ripard <maxime@cerno.tech>");
122 MODULE_DESCRIPTION("BCM2711 DVP clock driver");
123 MODULE_LICENSE("GPL");
124