1 /* SPDX-License-Identifier: GPL-2.0-only 2 * 3 * Copyright (c) 2021, MediaTek Inc. 4 * Copyright (c) 2021-2022, Intel Corporation. 5 * 6 * Authors: 7 * Haijun Liu <haijun.liu@mediatek.com> 8 * Eliot Lee <eliot.lee@intel.com> 9 * Ricardo Martinez <ricardo.martinez@linux.intel.com> 10 * 11 * Contributors: 12 * Amir Hanania <amir.hanania@intel.com> 13 * Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> 14 * Moises Veleta <moises.veleta@intel.com> 15 * Sreehari Kancharla <sreehari.kancharla@intel.com> 16 */ 17 18 #ifndef __T7XX_HIF_DPMA_TX_H__ 19 #define __T7XX_HIF_DPMA_TX_H__ 20 21 #include <linux/bits.h> 22 #include <linux/skbuff.h> 23 #include <linux/types.h> 24 25 #include "t7xx_hif_dpmaif.h" 26 27 #define DPMAIF_TX_DEFAULT_QUEUE 0 28 29 struct dpmaif_drb { 30 __le32 header; 31 union { 32 struct { 33 __le32 data_addr_l; 34 __le32 data_addr_h; 35 } pd; 36 struct { 37 __le32 msg_hdr; 38 __le32 reserved1; 39 } msg; 40 }; 41 __le32 reserved2; 42 }; 43 44 /* Header fields */ 45 #define DRB_HDR_DATA_LEN GENMASK(31, 16) 46 #define DRB_HDR_RESERVED GENMASK(15, 3) 47 #define DRB_HDR_CONT BIT(2) 48 #define DRB_HDR_DTYP GENMASK(1, 0) 49 50 #define DRB_MSG_DW2_RES GENMASK(31, 30) 51 #define DRB_MSG_L4_CHK BIT(29) 52 #define DRB_MSG_IP_CHK BIT(28) 53 #define DRB_MSG_RESERVED BIT(27) 54 #define DRB_MSG_NETWORK_TYPE GENMASK(26, 24) 55 #define DRB_MSG_CHANNEL_ID GENMASK(23, 16) 56 #define DRB_MSG_COUNT_L GENMASK(15, 0) 57 58 struct dpmaif_drb_skb { 59 struct sk_buff *skb; 60 dma_addr_t bus_addr; 61 unsigned int data_len; 62 u16 index:13; 63 u16 is_msg:1; 64 u16 is_frag:1; 65 u16 is_last:1; 66 }; 67 68 int t7xx_dpmaif_tx_send_skb(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int txq_number, 69 struct sk_buff *skb); 70 void t7xx_dpmaif_tx_thread_rel(struct dpmaif_ctrl *dpmaif_ctrl); 71 int t7xx_dpmaif_tx_thread_init(struct dpmaif_ctrl *dpmaif_ctrl); 72 void t7xx_dpmaif_txq_free(struct dpmaif_tx_queue *txq); 73 void t7xx_dpmaif_irq_tx_done(struct dpmaif_ctrl *dpmaif_ctrl, unsigned int que_mask); 74 int t7xx_dpmaif_txq_init(struct dpmaif_tx_queue *txq); 75 void t7xx_dpmaif_tx_stop(struct dpmaif_ctrl *dpmaif_ctrl); 76 void t7xx_dpmaif_tx_clear(struct dpmaif_ctrl *dpmaif_ctrl); 77 78 #endif /* __T7XX_HIF_DPMA_TX_H__ */ 79