1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ak4619.c -- Asahi Kasei ALSA SoC Audio driver 4 * 5 * Copyright (C) 2023 Renesas Electronics Corporation 6 * Khanh Le <khanh.le.xr@renesas.com> 7 * 8 * Based on ak4613.c by Kuninori Morimoto 9 * Based on da7213.c by Adam Thomson 10 * Based on ak4641.c by Harald Welte 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/i2c.h> 16 #include <linux/slab.h> 17 #include <linux/of_device.h> 18 #include <linux/module.h> 19 #include <linux/regmap.h> 20 #include <sound/soc.h> 21 #include <sound/pcm.h> 22 #include <sound/pcm_params.h> 23 #include <sound/tlv.h> 24 25 /* 26 * Registers 27 */ 28 29 #define PWR_MGMT 0x00 /* Power Management */ 30 #define AU_IFF1 0x01 /* Audio I/F Format */ 31 #define AU_IFF2 0x02 /* Audio I/F Format (Extended) */ 32 #define SYS_CLK 0x03 /* System Clock Setting */ 33 #define MIC_AMP1 0x04 /* MIC AMP Gain 1 */ 34 #define MIC_AMP2 0x05 /* MIC AMP Gain 2 */ 35 #define LADC1 0x06 /* ADC1 Lch Digital Volume */ 36 #define RADC1 0x07 /* ADC1 Rch Digital Volume */ 37 #define LADC2 0x08 /* ADC2 Lch Digital Volume */ 38 #define RADC2 0x09 /* ADC2 Rch Digital Volume */ 39 #define ADC_DF 0x0a /* ADC Digital Filter Setting */ 40 #define ADC_AI 0x0b /* ADC Analog Input Setting */ 41 #define ADC_MHPF 0x0D /* ADC Mute & HPF Control */ 42 #define LDAC1 0x0E /* DAC1 Lch Digital Volume */ 43 #define RDAC1 0x0F /* DAC1 Rch Digital Volume */ 44 #define LDAC2 0x10 /* DAC2 Lch Digital Volume */ 45 #define RDAC2 0x11 /* DAC2 Rch Digital Volume */ 46 #define DAC_IS 0x12 /* DAC Input Select Setting */ 47 #define DAC_DEMP 0x13 /* DAC De-Emphasis Setting */ 48 #define DAC_MF 0x14 /* DAC Mute & Filter Setting */ 49 50 /* 51 * Bit fields 52 */ 53 54 /* Power Management */ 55 #define PMAD2 BIT(5) 56 #define PMAD1 BIT(4) 57 #define PMDA2 BIT(2) 58 #define PMDA1 BIT(1) 59 #define RSTN BIT(0) 60 61 /* Audio_I/F Format */ 62 #define DCF_STEREO_I2S (0x0 << 4) 63 #define DCF_STEREO_MSB (0x5 << 4) 64 #define DCF_PCM_SF (0x6 << 4) 65 #define DCF_PCM_LF (0x7 << 4) 66 #define DSL_32 (0x3 << 2) 67 #define DCF_MASK (0x7 << 4) 68 #define DSL_MASK (0x3 << 2) 69 #define BCKP BIT(1) 70 71 /* Audio_I/F Format (Extended) */ 72 #define DIDL_24 (0x0 << 2) 73 #define DIDL_20 (0x1 << 2) 74 #define DIDL_16 (0x2 << 2) 75 #define DIDL_32 (0x3 << 2) 76 #define DODL_24 (0x0 << 0) 77 #define DODL_20 (0x1 << 0) 78 #define DODL_16 (0x2 << 0) 79 #define DIDL_MASK (0x3 << 2) 80 #define DODL_MASK (0x3 << 0) 81 #define SLOT BIT(4) 82 83 /* System Clock Setting */ 84 #define FS_MASK 0x7 85 86 /* MIC AMP Gain */ 87 #define MGNL_SHIFT 4 88 #define MGNR_SHIFT 0 89 #define MGN_MAX 0xB 90 91 /* ADC Digital Volume */ 92 #define VOLAD_SHIFT 0 93 #define VOLAD_MAX 0xFF 94 95 /* ADC Digital Filter Setting */ 96 #define AD1SL_SHIFT 0 97 #define AD2SL_SHIFT 4 98 99 /* Analog Input Select */ 100 #define AD1LSEL_SHIFT 6 101 #define AD1RSEL_SHIFT 4 102 #define AD2LSEL_SHIFT 2 103 #define AD2RSEL_SHIFT 0 104 105 /* ADC Mute & HPF Control */ 106 #define ATSPAD_SHIFT 7 107 #define AD1MUTE_SHIFT 5 108 #define AD2MUTE_SHIFT 6 109 #define AD1MUTE_MAX 1 110 #define AD2MUTE_MAX 1 111 #define AD1MUTE_EN BIT(5) 112 #define AD2MUTE_EN BIT(6) 113 #define AD1HPFN_SHIFT 1 114 #define AD1HPFN_MAX 1 115 #define AD2HPFN_SHIFT 2 116 #define AD2HPFN_MAX 1 117 118 /* DAC Digital Volume */ 119 #define VOLDA_SHIFT 0 120 #define VOLDA_MAX 0xFF 121 122 /* DAC Input Select Setting */ 123 #define DAC1SEL_SHIFT 0 124 #define DAC2SEL_SHIFT 2 125 126 /* DAC De-Emphasis Setting */ 127 #define DEM1_32000 (0x3 << 0) 128 #define DEM1_44100 (0x0 << 0) 129 #define DEM1_48000 (0x2 << 0) 130 #define DEM1_OFF (0x1 << 0) 131 #define DEM2_32000 (0x3 << 2) 132 #define DEM2_44100 (0x0 << 2) 133 #define DEM2_48000 (0x2 << 2) 134 #define DEM2_OFF (0x1 << 2) 135 #define DEM1_MASK (0x3 << 0) 136 #define DEM2_MASK (0x3 << 2) 137 #define DEM1_SHIFT 0 138 #define DEM2_SHIFT 2 139 140 /* DAC Mute & Filter Setting */ 141 #define DA1MUTE_SHIFT 4 142 #define DA1MUTE_MAX 1 143 #define DA2MUTE_SHIFT 5 144 #define DA2MUTE_MAX 1 145 #define DA1MUTE_EN BIT(4) 146 #define DA2MUTE_EN BIT(5) 147 #define ATSPDA_SHIFT 7 148 #define DA1SL_SHIFT 0 149 #define DA2SL_SHIFT 2 150 151 /* Codec private data */ 152 struct ak4619_priv { 153 struct regmap *regmap; 154 struct snd_pcm_hw_constraint_list constraint; 155 struct gpio_desc *pdn_gpio; 156 int deemph_en; 157 unsigned int playback_rate; 158 unsigned int sysclk; 159 }; 160 161 /* 162 * DAC Volume 163 * 164 * max : 0x00 : +12.0 dB 165 * ( 0.5 dB step ) 166 * min : 0xFE : -115.0 dB 167 * mute: 0xFF 168 */ 169 static const DECLARE_TLV_DB_SCALE(dac_tlv, -11550, 50, 1); 170 171 /* 172 * MIC Volume 173 * 174 * max : 0x0B : +27.0 dB 175 * ( 3 dB step ) 176 * min: 0x00 : -6.0 dB 177 */ 178 static const DECLARE_TLV_DB_SCALE(mic_tlv, -600, 300, 0); 179 180 /* 181 * ADC Volume 182 * 183 * max : 0x00 : +24.0 dB 184 * ( 0.5 dB step ) 185 * min : 0xFE : -103.0 dB 186 * mute: 0xFF 187 */ 188 static const DECLARE_TLV_DB_SCALE(adc_tlv, -10350, 50, 1); 189 190 /* ADC & DAC Volume Level Transition Time select */ 191 static const char * const ak4619_vol_trans_txt[] = { 192 "4/fs", "16/fs" 193 }; 194 195 static SOC_ENUM_SINGLE_DECL(ak4619_adc_vol_trans, ADC_MHPF, ATSPAD_SHIFT, ak4619_vol_trans_txt); 196 static SOC_ENUM_SINGLE_DECL(ak4619_dac_vol_trans, DAC_MF, ATSPDA_SHIFT, ak4619_vol_trans_txt); 197 198 /* ADC Digital Filter select */ 199 static const char * const ak4619_adc_digi_fil_txt[] = { 200 "Sharp Roll-Off Filter", 201 "Slow Roll-Off Filter", 202 "Short Delay Sharp Roll-Off Filter", 203 "Short Delay Slow Roll-Off Filter", 204 "Voice Filter" 205 }; 206 207 static SOC_ENUM_SINGLE_DECL(ak4619_adc_1_digi_fil, ADC_DF, AD1SL_SHIFT, ak4619_adc_digi_fil_txt); 208 static SOC_ENUM_SINGLE_DECL(ak4619_adc_2_digi_fil, ADC_DF, AD2SL_SHIFT, ak4619_adc_digi_fil_txt); 209 210 /* DAC De-Emphasis Filter select */ 211 static const char * const ak4619_dac_de_emp_txt[] = { 212 "44.1kHz", "OFF", "48kHz", "32kHz" 213 }; 214 215 static SOC_ENUM_SINGLE_DECL(ak4619_dac_1_de_emp, DAC_DEMP, DEM1_SHIFT, ak4619_dac_de_emp_txt); 216 static SOC_ENUM_SINGLE_DECL(ak4619_dac_2_de_emp, DAC_DEMP, DEM2_SHIFT, ak4619_dac_de_emp_txt); 217 218 /* DAC Digital Filter select */ 219 static const char * const ak4619_dac_digi_fil_txt[] = { 220 "Sharp Roll-Off Filter", 221 "Slow Roll-Off Filter", 222 "Short Delay Sharp Roll-Off Filter", 223 "Short Delay Slow Roll-Off Filter" 224 }; 225 226 static SOC_ENUM_SINGLE_DECL(ak4619_dac_1_digi_fil, DAC_MF, DA1SL_SHIFT, ak4619_dac_digi_fil_txt); 227 static SOC_ENUM_SINGLE_DECL(ak4619_dac_2_digi_fil, DAC_MF, DA2SL_SHIFT, ak4619_dac_digi_fil_txt); 228 229 /* 230 * Control functions 231 */ 232 233 static void ak4619_set_deemph(struct snd_soc_component *component) 234 { 235 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 236 u8 dem = 0; 237 238 if (!ak4619->deemph_en) 239 return; 240 241 switch (ak4619->playback_rate) { 242 case 32000: 243 dem |= DEM1_32000 | DEM2_32000; 244 break; 245 case 44100: 246 dem |= DEM1_44100 | DEM2_44100; 247 break; 248 case 48000: 249 dem |= DEM1_48000 | DEM2_48000; 250 break; 251 default: 252 dem |= DEM1_OFF | DEM2_OFF; 253 break; 254 } 255 snd_soc_component_update_bits(component, DAC_DEMP, DEM1_MASK | DEM2_MASK, dem); 256 } 257 258 static int ak4619_put_deemph(struct snd_kcontrol *kcontrol, 259 struct snd_ctl_elem_value *ucontrol) 260 { 261 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 262 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 263 int deemph_en = ucontrol->value.integer.value[0]; 264 int ret = 0; 265 266 switch (deemph_en) { 267 case 0: 268 case 1: 269 break; 270 default: 271 return -EINVAL; 272 } 273 274 if (ak4619->deemph_en != deemph_en) 275 ret = 1; /* The value changed */ 276 277 ak4619->deemph_en = deemph_en; 278 ak4619_set_deemph(component); 279 280 return ret; 281 } 282 283 static int ak4619_get_deemph(struct snd_kcontrol *kcontrol, 284 struct snd_ctl_elem_value *ucontrol) 285 { 286 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 287 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 288 289 ucontrol->value.integer.value[0] = ak4619->deemph_en; 290 291 return 0; 292 }; 293 294 /* 295 * KControls 296 */ 297 static const struct snd_kcontrol_new ak4619_snd_controls[] = { 298 299 /* Volume controls */ 300 SOC_DOUBLE_R_TLV("DAC 1 Volume", LDAC1, RDAC1, VOLDA_SHIFT, VOLDA_MAX, 1, dac_tlv), 301 SOC_DOUBLE_R_TLV("DAC 2 Volume", LDAC2, RDAC2, VOLDA_SHIFT, VOLDA_MAX, 1, dac_tlv), 302 SOC_DOUBLE_R_TLV("ADC 1 Volume", LADC1, RADC1, VOLAD_SHIFT, VOLAD_MAX, 1, adc_tlv), 303 SOC_DOUBLE_R_TLV("ADC 2 Volume", LADC2, RADC2, VOLAD_SHIFT, VOLAD_MAX, 1, adc_tlv), 304 305 SOC_DOUBLE_TLV("Mic 1 Volume", MIC_AMP1, MGNL_SHIFT, MGNR_SHIFT, MGN_MAX, 0, mic_tlv), 306 SOC_DOUBLE_TLV("Mic 2 Volume", MIC_AMP2, MGNL_SHIFT, MGNR_SHIFT, MGN_MAX, 0, mic_tlv), 307 308 /* Volume Level Transition Time controls */ 309 SOC_ENUM("ADC Volume Level Transition Time", ak4619_adc_vol_trans), 310 SOC_ENUM("DAC Volume Level Transition Time", ak4619_dac_vol_trans), 311 312 /* Mute controls */ 313 SOC_SINGLE("DAC 1 Switch", DAC_MF, DA1MUTE_SHIFT, DA1MUTE_MAX, 1), 314 SOC_SINGLE("DAC 2 Switch", DAC_MF, DA2MUTE_SHIFT, DA2MUTE_MAX, 1), 315 316 SOC_SINGLE("ADC 1 Switch", ADC_MHPF, AD1MUTE_SHIFT, AD1MUTE_MAX, 1), 317 SOC_SINGLE("ADC 2 Switch", ADC_MHPF, AD2MUTE_SHIFT, AD2MUTE_MAX, 1), 318 319 /* Filter controls */ 320 SOC_ENUM("ADC 1 Digital Filter", ak4619_adc_1_digi_fil), 321 SOC_ENUM("ADC 2 Digital Filter", ak4619_adc_2_digi_fil), 322 323 SOC_SINGLE("ADC 1 HPF", ADC_MHPF, AD1HPFN_SHIFT, AD1HPFN_MAX, 1), 324 SOC_SINGLE("ADC 2 HPF", ADC_MHPF, AD2HPFN_SHIFT, AD2HPFN_MAX, 1), 325 326 SOC_ENUM("DAC 1 De-Emphasis Filter", ak4619_dac_1_de_emp), 327 SOC_ENUM("DAC 2 De-Emphasis Filter", ak4619_dac_2_de_emp), 328 329 SOC_ENUM("DAC 1 Digital Filter", ak4619_dac_1_digi_fil), 330 SOC_ENUM("DAC 2 Digital Filter", ak4619_dac_2_digi_fil), 331 332 SOC_SINGLE_BOOL_EXT("Playback De-Emphasis Switch", 0, ak4619_get_deemph, ak4619_put_deemph), 333 }; 334 335 /* 336 * DAPM 337 */ 338 339 /* Analog input mode */ 340 static const char * const ak4619_analog_in_txt[] = { 341 "Differential", "Single-Ended1", "Single-Ended2", "Pseudo Differential" 342 }; 343 344 static SOC_ENUM_SINGLE_DECL(ak4619_ad_1_left_in, ADC_AI, AD1LSEL_SHIFT, ak4619_analog_in_txt); 345 static SOC_ENUM_SINGLE_DECL(ak4619_ad_1_right_in, ADC_AI, AD1RSEL_SHIFT, ak4619_analog_in_txt); 346 static SOC_ENUM_SINGLE_DECL(ak4619_ad_2_left_in, ADC_AI, AD2LSEL_SHIFT, ak4619_analog_in_txt); 347 static SOC_ENUM_SINGLE_DECL(ak4619_ad_2_right_in, ADC_AI, AD2RSEL_SHIFT, ak4619_analog_in_txt); 348 349 static const struct snd_kcontrol_new ak4619_ad_1_left_in_mux = 350 SOC_DAPM_ENUM("Analog Input 1 Left MUX", ak4619_ad_1_left_in); 351 static const struct snd_kcontrol_new ak4619_ad_1_right_in_mux = 352 SOC_DAPM_ENUM("Analog Input 1 Right MUX", ak4619_ad_1_right_in); 353 static const struct snd_kcontrol_new ak4619_ad_2_left_in_mux = 354 SOC_DAPM_ENUM("Analog Input 2 Left MUX", ak4619_ad_2_left_in); 355 static const struct snd_kcontrol_new ak4619_ad_2_right_in_mux = 356 SOC_DAPM_ENUM("Analog Input 2 Right MUX", ak4619_ad_2_right_in); 357 358 /* DAC source mux */ 359 static const char * const ak4619_dac_in_txt[] = { 360 "SDIN1", "SDIN2", "SDOUT1", "SDOUT2" 361 }; 362 363 static SOC_ENUM_SINGLE_DECL(ak4619_dac_1_in, DAC_IS, DAC1SEL_SHIFT, ak4619_dac_in_txt); 364 static SOC_ENUM_SINGLE_DECL(ak4619_dac_2_in, DAC_IS, DAC2SEL_SHIFT, ak4619_dac_in_txt); 365 366 static const struct snd_kcontrol_new ak4619_dac_1_in_mux = 367 SOC_DAPM_ENUM("DAC 1 Source MUX", ak4619_dac_1_in); 368 static const struct snd_kcontrol_new ak4619_dac_2_in_mux = 369 SOC_DAPM_ENUM("DAC 2 Source MUX", ak4619_dac_2_in); 370 371 static const struct snd_soc_dapm_widget ak4619_dapm_widgets[] = { 372 373 /* DACs */ 374 SND_SOC_DAPM_DAC("DAC1", NULL, PWR_MGMT, 1, 0), 375 SND_SOC_DAPM_DAC("DAC2", NULL, PWR_MGMT, 2, 0), 376 377 /* ADCs */ 378 SND_SOC_DAPM_ADC("ADC1", NULL, PWR_MGMT, 4, 0), 379 SND_SOC_DAPM_ADC("ADC2", NULL, PWR_MGMT, 5, 0), 380 381 /* Outputs */ 382 SND_SOC_DAPM_OUTPUT("AOUT1L"), 383 SND_SOC_DAPM_OUTPUT("AOUT2L"), 384 385 SND_SOC_DAPM_OUTPUT("AOUT1R"), 386 SND_SOC_DAPM_OUTPUT("AOUT2R"), 387 388 /* Inputs */ 389 SND_SOC_DAPM_INPUT("AIN1L"), 390 SND_SOC_DAPM_INPUT("AIN2L"), 391 SND_SOC_DAPM_INPUT("AIN4L"), 392 SND_SOC_DAPM_INPUT("AIN5L"), 393 394 SND_SOC_DAPM_INPUT("AIN1R"), 395 SND_SOC_DAPM_INPUT("AIN2R"), 396 SND_SOC_DAPM_INPUT("AIN4R"), 397 SND_SOC_DAPM_INPUT("AIN5R"), 398 399 SND_SOC_DAPM_INPUT("MIC1L"), 400 SND_SOC_DAPM_INPUT("MIC1R"), 401 SND_SOC_DAPM_INPUT("MIC2L"), 402 SND_SOC_DAPM_INPUT("MIC2R"), 403 404 /* DAI */ 405 SND_SOC_DAPM_AIF_IN("SDIN1", "Playback", 0, SND_SOC_NOPM, 0, 0), 406 SND_SOC_DAPM_AIF_IN("SDIN2", "Playback", 0, SND_SOC_NOPM, 0, 0), 407 SND_SOC_DAPM_AIF_OUT("SDOUT1", "Capture", 0, SND_SOC_NOPM, 0, 0), 408 SND_SOC_DAPM_AIF_OUT("SDOUT2", "Capture", 0, SND_SOC_NOPM, 0, 0), 409 410 /* MUXs for Mic PGA source selection */ 411 SND_SOC_DAPM_MUX("Analog Input 1 Left MUX", SND_SOC_NOPM, 0, 0, &ak4619_ad_1_left_in_mux), 412 SND_SOC_DAPM_MUX("Analog Input 1 Right MUX", SND_SOC_NOPM, 0, 0, &ak4619_ad_1_right_in_mux), 413 SND_SOC_DAPM_MUX("Analog Input 2 Left MUX", SND_SOC_NOPM, 0, 0, &ak4619_ad_2_left_in_mux), 414 SND_SOC_DAPM_MUX("Analog Input 2 Right MUX", SND_SOC_NOPM, 0, 0, &ak4619_ad_2_right_in_mux), 415 416 /* MUXs for DAC source selection */ 417 SND_SOC_DAPM_MUX("DAC 1 Source MUX", SND_SOC_NOPM, 0, 0, &ak4619_dac_1_in_mux), 418 SND_SOC_DAPM_MUX("DAC 2 Source MUX", SND_SOC_NOPM, 0, 0, &ak4619_dac_2_in_mux), 419 }; 420 421 static const struct snd_soc_dapm_route ak4619_intercon[] = { 422 /* Dest Connecting Widget Source */ 423 424 /* Output path */ 425 {"AOUT1L", NULL, "DAC1"}, 426 {"AOUT2L", NULL, "DAC2"}, 427 428 {"AOUT1R", NULL, "DAC1"}, 429 {"AOUT2R", NULL, "DAC2"}, 430 431 {"DAC1", NULL, "DAC 1 Source MUX"}, 432 {"DAC2", NULL, "DAC 2 Source MUX"}, 433 434 {"DAC 1 Source MUX", "SDIN1", "SDIN1"}, 435 {"DAC 1 Source MUX", "SDIN2", "SDIN2"}, 436 {"DAC 1 Source MUX", "SDOUT1", "SDOUT1"}, 437 {"DAC 1 Source MUX", "SDOUT2", "SDOUT2"}, 438 439 {"DAC 2 Source MUX", "SDIN1", "SDIN1"}, 440 {"DAC 2 Source MUX", "SDIN2", "SDIN2"}, 441 {"DAC 2 Source MUX", "SDOUT1", "SDOUT1"}, 442 {"DAC 2 Source MUX", "SDOUT2", "SDOUT2"}, 443 444 /* Input path */ 445 {"SDOUT1", NULL, "ADC1"}, 446 {"SDOUT2", NULL, "ADC2"}, 447 448 {"ADC1", NULL, "Analog Input 1 Left MUX"}, 449 {"ADC1", NULL, "Analog Input 1 Right MUX"}, 450 451 {"ADC2", NULL, "Analog Input 2 Left MUX"}, 452 {"ADC2", NULL, "Analog Input 2 Right MUX"}, 453 454 {"Analog Input 1 Left MUX", "Differential", "MIC1L"}, 455 {"Analog Input 1 Left MUX", "Single-Ended1", "MIC1L"}, 456 {"Analog Input 1 Left MUX", "Single-Ended2", "MIC1L"}, 457 {"Analog Input 1 Left MUX", "Pseudo Differential", "MIC1L"}, 458 459 {"Analog Input 1 Right MUX", "Differential", "MIC1R"}, 460 {"Analog Input 1 Right MUX", "Single-Ended1", "MIC1R"}, 461 {"Analog Input 1 Right MUX", "Single-Ended2", "MIC1R"}, 462 {"Analog Input 1 Right MUX", "Pseudo Differential", "MIC1R"}, 463 464 {"Analog Input 2 Left MUX", "Differential", "MIC2L"}, 465 {"Analog Input 2 Left MUX", "Single-Ended1", "MIC2L"}, 466 {"Analog Input 2 Left MUX", "Single-Ended2", "MIC2L"}, 467 {"Analog Input 2 Left MUX", "Pseudo Differential", "MIC2L"}, 468 469 {"Analog Input 2 Right MUX", "Differential", "MIC2R"}, 470 {"Analog Input 2 Right MUX", "Single-Ended1", "MIC2R"}, 471 {"Analog Input 2 Right MUX", "Single-Ended2", "MIC2R"}, 472 {"Analog Input 2 Right MUX", "Pseudo Differential", "MIC2R"}, 473 474 {"MIC1L", NULL, "AIN1L"}, 475 {"MIC1L", NULL, "AIN2L"}, 476 477 {"MIC1R", NULL, "AIN1R"}, 478 {"MIC1R", NULL, "AIN2R"}, 479 480 {"MIC2L", NULL, "AIN4L"}, 481 {"MIC2L", NULL, "AIN5L"}, 482 483 {"MIC2R", NULL, "AIN4R"}, 484 {"MIC2R", NULL, "AIN5R"}, 485 }; 486 487 static const struct reg_default ak4619_reg_defaults[] = { 488 { PWR_MGMT, 0x00 }, 489 { AU_IFF1, 0x0C }, 490 { AU_IFF2, 0x0C }, 491 { SYS_CLK, 0x00 }, 492 { MIC_AMP1, 0x22 }, 493 { MIC_AMP2, 0x22 }, 494 { LADC1, 0x30 }, 495 { RADC1, 0x30 }, 496 { LADC2, 0x30 }, 497 { RADC2, 0x30 }, 498 { ADC_DF, 0x00 }, 499 { ADC_AI, 0x00 }, 500 { ADC_MHPF, 0x00 }, 501 { LDAC1, 0x18 }, 502 { RDAC1, 0x18 }, 503 { LDAC2, 0x18 }, 504 { RDAC2, 0x18 }, 505 { DAC_IS, 0x04 }, 506 { DAC_DEMP, 0x05 }, 507 { DAC_MF, 0x0A }, 508 }; 509 510 static int ak4619_set_bias_level(struct snd_soc_component *component, 511 enum snd_soc_bias_level level) 512 { 513 u8 pwr_ctrl = 0; 514 515 switch (level) { 516 case SND_SOC_BIAS_ON: 517 pwr_ctrl |= RSTN; 518 fallthrough; 519 case SND_SOC_BIAS_PREPARE: 520 pwr_ctrl |= PMAD1 | PMAD2 | PMDA1 | PMDA2; 521 fallthrough; 522 case SND_SOC_BIAS_STANDBY: 523 case SND_SOC_BIAS_OFF: 524 default: 525 break; 526 } 527 528 snd_soc_component_write(component, PWR_MGMT, pwr_ctrl); 529 530 return 0; 531 } 532 533 static int ak4619_dai_hw_params(struct snd_pcm_substream *substream, 534 struct snd_pcm_hw_params *params, 535 struct snd_soc_dai *dai) 536 { 537 struct snd_soc_component *component = dai->component; 538 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 539 unsigned int width; 540 unsigned int rate; 541 unsigned int fs; 542 bool is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 543 u8 dai_ctrl = 0; 544 u8 clk_mode = 0; 545 546 width = params_width(params); 547 switch (width) { 548 case 16: 549 dai_ctrl |= is_play ? DIDL_16 : DODL_16; 550 break; 551 case 20: 552 dai_ctrl |= is_play ? DIDL_20 : DODL_20; 553 break; 554 case 24: 555 dai_ctrl |= is_play ? DIDL_24 : DODL_24; 556 break; 557 case 32: 558 if (is_play) 559 dai_ctrl |= DIDL_32; 560 else 561 return -EINVAL; 562 break; 563 default: 564 return -EINVAL; 565 } 566 567 rate = params_rate(params); 568 if (rate) 569 fs = ak4619->sysclk / rate; 570 else 571 return -EINVAL; 572 573 switch (rate) { 574 case 8000: 575 case 11025: 576 case 12000: 577 case 16000: 578 case 22050: 579 case 24000: 580 case 32000: 581 case 44100: 582 case 48000: 583 switch (fs) { 584 case 256: 585 clk_mode |= (0x0 << 0); 586 break; 587 case 384: 588 clk_mode |= (0x2 << 0); 589 break; 590 case 512: 591 clk_mode |= (0x3 << 0); 592 break; 593 default: 594 return -EINVAL; 595 } 596 break; 597 case 64000: 598 case 88200: 599 case 96000: 600 if (fs == 256) 601 clk_mode |= (0x1 << 0); 602 else 603 return -EINVAL; 604 break; 605 case 176400: 606 case 192000: 607 if (fs == 128) 608 clk_mode |= (0x4 << 0); 609 else 610 return -EINVAL; 611 break; 612 default: 613 return -EINVAL; 614 } 615 616 snd_soc_component_update_bits(component, SYS_CLK, FS_MASK, clk_mode); 617 snd_soc_component_update_bits(component, AU_IFF2, 618 is_play ? DIDL_MASK : DODL_MASK, dai_ctrl); 619 620 if (is_play) { 621 ak4619->playback_rate = rate; 622 ak4619_set_deemph(component); 623 } 624 625 return 0; 626 } 627 628 static int ak4619_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 629 { 630 struct snd_soc_component *component = dai->component; 631 u8 dai_fmt1 = 0; 632 u8 dai_fmt2 = 0; 633 634 /* Set clock normal/inverted */ 635 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 636 case SND_SOC_DAIFMT_NB_NF: 637 break; 638 case SND_SOC_DAIFMT_IB_NF: 639 dai_fmt1 |= BCKP; 640 break; 641 case SND_SOC_DAIFMT_NB_IF: 642 case SND_SOC_DAIFMT_IB_IF: 643 default: 644 return -EINVAL; 645 } 646 647 /* Only Stereo modes are supported */ 648 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 649 case SND_SOC_DAIFMT_I2S: 650 dai_fmt1 |= DCF_STEREO_I2S; 651 break; 652 case SND_SOC_DAIFMT_LEFT_J: 653 dai_fmt1 |= DCF_STEREO_MSB; 654 break; 655 case SND_SOC_DAIFMT_DSP_A: /* L data MSB after FRM LRC */ 656 dai_fmt1 |= DCF_PCM_SF; 657 dai_fmt2 |= SLOT; 658 break; 659 case SND_SOC_DAIFMT_DSP_B: /* L data MSB during FRM LRC */ 660 dai_fmt1 |= DCF_PCM_LF; 661 dai_fmt2 |= SLOT; 662 break; 663 default: 664 return -EINVAL; 665 } 666 667 /* Only slave mode is support */ 668 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 669 case SND_SOC_DAIFMT_CBC_CFC: 670 break; 671 default: 672 return -EINVAL; 673 } 674 675 /* By default only 64 BICK per LRCLK is supported */ 676 dai_fmt1 |= DSL_32; 677 678 snd_soc_component_update_bits(component, AU_IFF1, DCF_MASK | 679 DSL_MASK | BCKP, dai_fmt1); 680 snd_soc_component_update_bits(component, AU_IFF2, SLOT, dai_fmt2); 681 682 return 0; 683 } 684 685 static int ak4619_dai_set_sysclk(struct snd_soc_dai *codec_dai, 686 int clk_id, unsigned int freq, int dir) 687 { 688 struct snd_soc_component *component = codec_dai->component; 689 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 690 691 ak4619->sysclk = freq; 692 693 return 0; 694 } 695 696 static int ak4619_dai_mute(struct snd_soc_dai *dai, int mute, int direction) 697 { 698 struct snd_soc_component *component = dai->component; 699 700 snd_soc_component_update_bits(component, DAC_MF, DA1MUTE_EN, mute ? DA1MUTE_EN : 0); 701 snd_soc_component_update_bits(component, DAC_MF, DA2MUTE_EN, mute ? DA2MUTE_EN : 0); 702 703 return 0; 704 } 705 706 static void ak4619_hw_constraints(struct ak4619_priv *ak4619, 707 struct snd_pcm_runtime *runtime) 708 { 709 struct snd_pcm_hw_constraint_list *constraint = &ak4619->constraint; 710 int ak4619_rate_mask = 0; 711 unsigned int fs; 712 int i; 713 static const unsigned int ak4619_sr[] = { 714 8000, 715 11025, 716 12000, 717 16000, 718 22050, 719 24000, 720 32000, 721 44100, 722 48000, 723 64000, 724 88200, 725 96000, 726 176400, 727 192000, 728 }; 729 730 /* 731 * [8kHz - 48kHz] : 256fs, 384fs or 512fs 732 * [64kHz - 96kHz] : 256fs 733 * [176.4kHz, 192kHz] : 128fs 734 */ 735 736 for (i = 0; i < ARRAY_SIZE(ak4619_sr); i++) { 737 fs = ak4619->sysclk / ak4619_sr[i]; 738 739 switch (fs) { 740 case 512: 741 case 384: 742 case 256: 743 ak4619_rate_mask |= (1 << i); 744 break; 745 case 128: 746 switch (i) { 747 case (ARRAY_SIZE(ak4619_sr) - 1): 748 case (ARRAY_SIZE(ak4619_sr) - 2): 749 ak4619_rate_mask |= (1 << i); 750 break; 751 default: 752 break; 753 } 754 break; 755 default: 756 break; 757 } 758 } 759 760 constraint->list = ak4619_sr; 761 constraint->mask = ak4619_rate_mask; 762 constraint->count = ARRAY_SIZE(ak4619_sr); 763 764 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, constraint); 765 }; 766 767 #define PLAYBACK_MODE 0 768 #define CAPTURE_MODE 1 769 770 static int ak4619_dai_startup(struct snd_pcm_substream *substream, 771 struct snd_soc_dai *dai) 772 { 773 struct snd_soc_component *component = dai->component; 774 struct ak4619_priv *ak4619 = snd_soc_component_get_drvdata(component); 775 776 ak4619_hw_constraints(ak4619, substream->runtime); 777 778 return 0; 779 } 780 781 static u64 ak4619_dai_formats[] = { 782 /* First Priority */ 783 SND_SOC_POSSIBLE_DAIFMT_I2S | 784 SND_SOC_POSSIBLE_DAIFMT_LEFT_J, 785 786 /* Second Priority */ 787 SND_SOC_POSSIBLE_DAIFMT_I2S | 788 SND_SOC_POSSIBLE_DAIFMT_LEFT_J | 789 SND_SOC_POSSIBLE_DAIFMT_DSP_A | 790 SND_SOC_POSSIBLE_DAIFMT_DSP_B, 791 }; 792 793 static const struct snd_soc_dai_ops ak4619_dai_ops = { 794 .startup = ak4619_dai_startup, 795 .set_sysclk = ak4619_dai_set_sysclk, 796 .set_fmt = ak4619_dai_set_fmt, 797 .hw_params = ak4619_dai_hw_params, 798 .mute_stream = ak4619_dai_mute, 799 .auto_selectable_formats = ak4619_dai_formats, 800 .num_auto_selectable_formats = ARRAY_SIZE(ak4619_dai_formats), 801 }; 802 803 static int ak4619_suspend(struct snd_soc_component *component) 804 { 805 struct regmap *regmap = dev_get_regmap(component->dev, NULL); 806 807 regcache_cache_only(regmap, true); 808 regcache_mark_dirty(regmap); 809 return 0; 810 } 811 812 static int ak4619_resume(struct snd_soc_component *component) 813 { 814 struct regmap *regmap = dev_get_regmap(component->dev, NULL); 815 816 regcache_cache_only(regmap, false); 817 return regcache_sync(regmap); 818 } 819 820 static const struct snd_soc_component_driver soc_component_dev_ak4619 = { 821 .suspend = ak4619_suspend, 822 .resume = ak4619_resume, 823 .set_bias_level = ak4619_set_bias_level, 824 .controls = ak4619_snd_controls, 825 .num_controls = ARRAY_SIZE(ak4619_snd_controls), 826 .dapm_widgets = ak4619_dapm_widgets, 827 .num_dapm_widgets = ARRAY_SIZE(ak4619_dapm_widgets), 828 .dapm_routes = ak4619_intercon, 829 .num_dapm_routes = ARRAY_SIZE(ak4619_intercon), 830 .idle_bias_on = 1, 831 .endianness = 1, 832 }; 833 834 static const struct regmap_config ak4619_regmap_cfg = { 835 .reg_bits = 8, 836 .val_bits = 8, 837 .max_register = 0x14, 838 .reg_defaults = ak4619_reg_defaults, 839 .num_reg_defaults = ARRAY_SIZE(ak4619_reg_defaults), 840 .cache_type = REGCACHE_MAPLE, 841 }; 842 843 static const struct of_device_id ak4619_of_match[] = { 844 { .compatible = "asahi-kasei,ak4619", .data = &ak4619_regmap_cfg }, 845 {}, 846 }; 847 MODULE_DEVICE_TABLE(of, ak4619_of_match); 848 849 static const struct i2c_device_id ak4619_i2c_id[] = { 850 { .name = "ak4619", .driver_data = (kernel_ulong_t)&ak4619_regmap_cfg }, 851 { } 852 }; 853 MODULE_DEVICE_TABLE(i2c, ak4619_i2c_id); 854 855 #define AK4619_RATES SNDRV_PCM_RATE_8000_192000 856 857 #define AK4619_DAC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ 858 SNDRV_PCM_FMTBIT_S20_LE |\ 859 SNDRV_PCM_FMTBIT_S24_LE |\ 860 SNDRV_PCM_FMTBIT_S32_LE) 861 862 #define AK4619_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ 863 SNDRV_PCM_FMTBIT_S20_LE |\ 864 SNDRV_PCM_FMTBIT_S24_LE) 865 866 static struct snd_soc_dai_driver ak4619_dai = { 867 .name = "ak4619-hifi", 868 .playback = { 869 .stream_name = "Playback", 870 .channels_min = 1, 871 .channels_max = 2, 872 .rates = AK4619_RATES, 873 .formats = AK4619_DAC_FORMATS, 874 }, 875 .capture = { 876 .stream_name = "Capture", 877 .channels_min = 1, 878 .channels_max = 2, 879 .rates = AK4619_RATES, 880 .formats = AK4619_ADC_FORMATS, 881 }, 882 .ops = &ak4619_dai_ops, 883 .symmetric_rate = 1, 884 }; 885 886 static int ak4619_i2c_probe(struct i2c_client *i2c) 887 { 888 struct device *dev = &i2c->dev; 889 struct ak4619_priv *ak4619; 890 int ret; 891 892 ak4619 = devm_kzalloc(dev, sizeof(*ak4619), GFP_KERNEL); 893 if (!ak4619) 894 return -ENOMEM; 895 896 i2c_set_clientdata(i2c, ak4619); 897 898 ak4619->pdn_gpio = devm_gpiod_get_optional(dev, "powerdown", 899 GPIOD_OUT_LOW); 900 if (IS_ERR(ak4619->pdn_gpio)) 901 return dev_err_probe(dev, PTR_ERR(ak4619->pdn_gpio), 902 "powerdown GPIO request failed\n"); 903 if (ak4619->pdn_gpio) 904 msleep(10); 905 906 ak4619->regmap = devm_regmap_init_i2c(i2c, &ak4619_regmap_cfg); 907 if (IS_ERR(ak4619->regmap)) { 908 ret = PTR_ERR(ak4619->regmap); 909 dev_err(dev, "regmap_init() failed: %d\n", ret); 910 if (ak4619->pdn_gpio) 911 gpiod_set_value_cansleep(ak4619->pdn_gpio, 1); 912 return ret; 913 } 914 915 ret = devm_snd_soc_register_component(dev, &soc_component_dev_ak4619, 916 &ak4619_dai, 1); 917 if (ret < 0) { 918 dev_err(dev, "Failed to register ak4619 component: %d\n", 919 ret); 920 if (ak4619->pdn_gpio) 921 gpiod_set_value_cansleep(ak4619->pdn_gpio, 1); 922 return ret; 923 } 924 925 return 0; 926 } 927 928 static struct i2c_driver ak4619_i2c_driver = { 929 .driver = { 930 .name = "ak4619-codec", 931 .of_match_table = ak4619_of_match, 932 }, 933 .probe = ak4619_i2c_probe, 934 .id_table = ak4619_i2c_id, 935 }; 936 module_i2c_driver(ak4619_i2c_driver); 937 938 MODULE_DESCRIPTION("SoC AK4619 driver"); 939 MODULE_AUTHOR("Khanh Le <khanh.le.xr@renesas.com>"); 940 MODULE_LICENSE("GPL v2"); 941