1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/drivers/gpio/gpio-mb86s7x.c
4 *
5 * Copyright (C) 2015 Fujitsu Semiconductor Limited
6 * Copyright (C) 2015 Linaro Ltd.
7 */
8
9 #include <linux/acpi.h>
10 #include <linux/io.h>
11 #include <linux/init.h>
12 #include <linux/clk.h>
13 #include <linux/module.h>
14 #include <linux/err.h>
15 #include <linux/errno.h>
16 #include <linux/ioport.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/platform_device.h>
19 #include <linux/spinlock.h>
20 #include <linux/slab.h>
21
22 #include "gpiolib-acpi.h"
23
24 /*
25 * Only first 8bits of a register correspond to each pin,
26 * so there are 4 registers for 32 pins.
27 */
28 #define PDR(x) (0x0 + x / 8 * 4)
29 #define DDR(x) (0x10 + x / 8 * 4)
30 #define PFR(x) (0x20 + x / 8 * 4)
31
32 #define OFFSET(x) BIT((x) % 8)
33
34 struct mb86s70_gpio_chip {
35 struct gpio_chip gc;
36 void __iomem *base;
37 spinlock_t lock;
38 };
39
mb86s70_gpio_request(struct gpio_chip * gc,unsigned gpio)40 static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
41 {
42 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
43 unsigned long flags;
44 u32 val;
45
46 spin_lock_irqsave(&gchip->lock, flags);
47
48 val = readl(gchip->base + PFR(gpio));
49 val &= ~OFFSET(gpio);
50 writel(val, gchip->base + PFR(gpio));
51
52 spin_unlock_irqrestore(&gchip->lock, flags);
53
54 return 0;
55 }
56
mb86s70_gpio_free(struct gpio_chip * gc,unsigned gpio)57 static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
58 {
59 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
60 unsigned long flags;
61 u32 val;
62
63 spin_lock_irqsave(&gchip->lock, flags);
64
65 val = readl(gchip->base + PFR(gpio));
66 val |= OFFSET(gpio);
67 writel(val, gchip->base + PFR(gpio));
68
69 spin_unlock_irqrestore(&gchip->lock, flags);
70 }
71
mb86s70_gpio_direction_input(struct gpio_chip * gc,unsigned gpio)72 static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
73 {
74 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
75 unsigned long flags;
76 unsigned char val;
77
78 spin_lock_irqsave(&gchip->lock, flags);
79
80 val = readl(gchip->base + DDR(gpio));
81 val &= ~OFFSET(gpio);
82 writel(val, gchip->base + DDR(gpio));
83
84 spin_unlock_irqrestore(&gchip->lock, flags);
85
86 return 0;
87 }
88
mb86s70_gpio_direction_output(struct gpio_chip * gc,unsigned gpio,int value)89 static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
90 unsigned gpio, int value)
91 {
92 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
93 unsigned long flags;
94 unsigned char val;
95
96 spin_lock_irqsave(&gchip->lock, flags);
97
98 val = readl(gchip->base + PDR(gpio));
99 if (value)
100 val |= OFFSET(gpio);
101 else
102 val &= ~OFFSET(gpio);
103 writel(val, gchip->base + PDR(gpio));
104
105 val = readl(gchip->base + DDR(gpio));
106 val |= OFFSET(gpio);
107 writel(val, gchip->base + DDR(gpio));
108
109 spin_unlock_irqrestore(&gchip->lock, flags);
110
111 return 0;
112 }
113
mb86s70_gpio_get(struct gpio_chip * gc,unsigned gpio)114 static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
115 {
116 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
117
118 return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
119 }
120
mb86s70_gpio_set(struct gpio_chip * gc,unsigned int gpio,int value)121 static int mb86s70_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)
122 {
123 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
124 unsigned long flags;
125 unsigned char val;
126
127 spin_lock_irqsave(&gchip->lock, flags);
128
129 val = readl(gchip->base + PDR(gpio));
130 if (value)
131 val |= OFFSET(gpio);
132 else
133 val &= ~OFFSET(gpio);
134 writel(val, gchip->base + PDR(gpio));
135
136 spin_unlock_irqrestore(&gchip->lock, flags);
137
138 return 0;
139 }
140
mb86s70_gpio_to_irq(struct gpio_chip * gc,unsigned int offset)141 static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
142 {
143 int irq, index;
144
145 for (index = 0;; index++) {
146 irq = platform_get_irq(to_platform_device(gc->parent), index);
147 if (irq < 0)
148 return irq;
149 if (irq_get_irq_data(irq)->hwirq == offset)
150 return irq;
151 }
152 return -EINVAL;
153 }
154
mb86s70_gpio_probe(struct platform_device * pdev)155 static int mb86s70_gpio_probe(struct platform_device *pdev)
156 {
157 struct mb86s70_gpio_chip *gchip;
158 struct clk *clk;
159 int ret;
160
161 gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
162 if (gchip == NULL)
163 return -ENOMEM;
164
165 platform_set_drvdata(pdev, gchip);
166
167 gchip->base = devm_platform_ioremap_resource(pdev, 0);
168 if (IS_ERR(gchip->base))
169 return PTR_ERR(gchip->base);
170
171 clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
172 if (IS_ERR(clk))
173 return PTR_ERR(clk);
174
175 spin_lock_init(&gchip->lock);
176
177 gchip->gc.direction_output = mb86s70_gpio_direction_output;
178 gchip->gc.direction_input = mb86s70_gpio_direction_input;
179 gchip->gc.request = mb86s70_gpio_request;
180 gchip->gc.free = mb86s70_gpio_free;
181 gchip->gc.get = mb86s70_gpio_get;
182 gchip->gc.set = mb86s70_gpio_set;
183 gchip->gc.to_irq = mb86s70_gpio_to_irq;
184 gchip->gc.label = dev_name(&pdev->dev);
185 gchip->gc.ngpio = 32;
186 gchip->gc.owner = THIS_MODULE;
187 gchip->gc.parent = &pdev->dev;
188 gchip->gc.base = -1;
189
190 ret = gpiochip_add_data(&gchip->gc, gchip);
191 if (ret)
192 return dev_err_probe(&pdev->dev, ret,
193 "couldn't register gpio driver\n");
194
195 acpi_gpiochip_request_interrupts(&gchip->gc);
196
197 return 0;
198 }
199
mb86s70_gpio_remove(struct platform_device * pdev)200 static void mb86s70_gpio_remove(struct platform_device *pdev)
201 {
202 struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
203
204 acpi_gpiochip_free_interrupts(&gchip->gc);
205 gpiochip_remove(&gchip->gc);
206 }
207
208 static const struct of_device_id mb86s70_gpio_dt_ids[] = {
209 { .compatible = "fujitsu,mb86s70-gpio" },
210 { /* sentinel */ }
211 };
212 MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
213
214 #ifdef CONFIG_ACPI
215 static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = {
216 { "SCX0007" },
217 { /* sentinel */ }
218 };
219 MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids);
220 #endif
221
222 static struct platform_driver mb86s70_gpio_driver = {
223 .driver = {
224 .name = "mb86s70-gpio",
225 .of_match_table = mb86s70_gpio_dt_ids,
226 .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids),
227 },
228 .probe = mb86s70_gpio_probe,
229 .remove = mb86s70_gpio_remove,
230 };
231 module_platform_driver(mb86s70_gpio_driver);
232
233 MODULE_DESCRIPTION("MB86S7x GPIO Driver");
234 MODULE_ALIAS("platform:mb86s70-gpio");
235 MODULE_LICENSE("GPL");
236