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Searched defs:DCN_BASE__INST0_SEG5 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn316.c38 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddmub_dcn315.c38 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddmub_dcn314.c38 #define DCN_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_translate_dcn315.c43 #define DCN_BASE__INST0_SEG5 0 macro
H A Dhw_factory_dcn315.c50 #define DCN_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c99 #define DCN_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c101 #define DCN_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h272 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h366 #define DCN_BASE__INST0_SEG5 0 macro
H A Dbeige_goby_ip_offset.h444 #define DCN_BASE__INST0_SEG5 0 macro
H A Dyellow_carp_offset.h390 #define DCN_BASE__INST0_SEG5 0 macro
H A Dvangogh_ip_offset.h455 #define DCN_BASE__INST0_SEG5 0 macro