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Searched defs:DCN_BASE__INST0_SEG3 (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn316.c36 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Ddmub_dcn315.c36 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Ddmub_dcn314.c36 #define DCN_BASE__INST0_SEG3 0x00009000 macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_translate_dcn315.c41 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Dhw_factory_dcn315.c48 #define DCN_BASE__INST0_SEG3 0x00009000 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c97 #define DCN_BASE__INST0_SEG3 0x00009000 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c99 #define DCN_BASE__INST0_SEG3 0x00009000 macro
/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h270 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Ddimgrey_cavefish_ip_offset.h364 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Dsienna_cichlid_ip_offset.h371 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Dvega10_ip_offset.h306 #define DCN_BASE__INST0_SEG3 0 macro
H A Dbeige_goby_ip_offset.h442 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Drenoir_ip_offset.h1370 #define DCN_BASE__INST0_SEG3 0 macro
H A Dyellow_carp_offset.h388 #define DCN_BASE__INST0_SEG3 0x00009000 macro
H A Dvangogh_ip_offset.h453 #define DCN_BASE__INST0_SEG3 0x00009000 macro