| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGTargetInfo.h | 51 virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemcpy() argument
68 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove() argument
81 virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemset() argument
95 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemcmp() argument
107 EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemchr() argument
120 EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrcpy() argument
132 EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForStrcmp() argument
140 EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrlen() argument
146 EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrnlen() argument
152 virtual SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, cons argument
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| H A D | SelectionDAGAddressAnalysis.h | 66 const SelectionDAG &DAG) const { in equalBaseIndex()
77 bool contains(const SelectionDAG &DAG, int64_t BitSize, in contains()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 24 static SDValue createMemMemNode(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in createMemMemNode()
41 static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemImm()
50 static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemReg()
61 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
77 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in memsetStore()
89 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, in EmitTargetCodeForMemset()
163 SelectionDAG &DAG) { in addIPMSequence()
173 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp()
189 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, in EmitTargetCodeForMemchr()
215 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, in EmitTargetCodeForStrcpy()
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| H A D | SystemZISelLowering.cpp | 1476 static SDValue convertLocVTToValVT(SelectionDAG &DAG, const SDLoc &DL, in convertLocVTToValVT()
1505 static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL, in convertValVTToLocVT()
1540 static SDValue lowerI128ToGR128(SelectionDAG &DAG, SDValue In) { in lowerI128ToGR128()
1559 static SDValue lowerGR128ToI128(SelectionDAG &DAG, SDValue In) { in lowerGR128ToI128()
1578 SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, in splitValueIntoRegisterParts()
1591 SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, in joinRegisterPartsIntoValue()
1605 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
1804 static SDValue getADAEntry(SelectionDAG &DAG, SDValue Val, SDLoc DL, in getADAEntry()
1825 static SDValue getADAEntry(SelectionDAG &DAG, const GlobalValue *GV, SDLoc DL, in getADAEntry()
1848 static bool getzOSCalleeAndADA(SelectionDAG &DAG, SDValue &Callee, SDValue &ADA, in getzOSCalleeAndADA()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.h | 143 SelectionDAG &DAG; variable
149 VECustomDAG(SelectionDAG &DAG, SDLoc DL) : DAG(DAG), DL(DL) {} in VECustomDAG()
151 VECustomDAG(SelectionDAG &DAG, SDValue WhereOp) : DAG(DAG), DL(WhereOp) {} in VECustomDAG()
153 VECustomDAG(SelectionDAG &DAG, const SDNode *WhereN) : DAG(DAG), DL(WhereN) {} in VECustomDAG()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGAddressAnalysis.cpp | 25 const SelectionDAG &DAG, in equalBaseIndex()
97 const SelectionDAG &DAG, bool &IsAlias) { in computeAliasing()
177 bool BaseIndexOffset::contains(const SelectionDAG &DAG, int64_t BitSize, in contains()
199 const SelectionDAG &DAG) { in matchLSNode()
302 const SelectionDAG &DAG) { in match()
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| H A D | MatchContext.h | 23 SelectionDAG &DAG; variable
28 EmptyMatchContext(SelectionDAG &DAG, const TargetLowering &TLI, SDNode *Root) in EmptyMatchContext()
52 SelectionDAG &DAG; variable
59 VPMatchContext(SelectionDAG &DAG, const TargetLowering &TLI, SDNode *_Root) in VPMatchContext()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 481 static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG, in performANDCombine()
596 static SDValue performORCombine(SDNode *N, SelectionDAG &DAG, in performORCombine()
717 SelectionDAG &DAG, in shouldTransformMulToShiftsAddsSubs()
793 EVT ShiftTy, SelectionDAG &DAG) { in genConstMult()
828 static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG, in performMULCombine()
845 SelectionDAG &DAG, in performDSPShiftCombine()
869 static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG, in performSHLCombine()
892 static SDValue performSRACombine(SDNode *N, SelectionDAG &DAG, in performSRACombine()
938 static SDValue performSRLCombine(SDNode *N, SelectionDAG &DAG, in performSRLCombine()
967 static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG) { in performSETCCCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 466 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VREPLVEI()
508 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VSHUF4I()
571 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VPACKEV()
611 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VPACKOD()
652 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VILVH()
695 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VILVL()
735 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VPICKEV()
777 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VPICKOD()
807 SelectionDAG &DAG) { in lowerVECTOR_SHUFFLE_VSHUF()
831 SDValue V1, SDValue V2, SelectionDAG &DAG) { in lower128BitShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 32 SelectionDAG &DAG, ArrayRef<MCPhysReg> ClobberSet) const { in isBaseRegConflictPossible()
48 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset()
156 static SDValue emitRepmovs(const X86Subtarget &Subtarget, SelectionDAG &DAG, in emitRepmovs()
178 static SDValue emitRepmovsB(const X86Subtarget &Subtarget, SelectionDAG &DAG, in emitRepmovsB()
208 SelectionDAG &DAG, const X86Subtarget &Subtarget, const SDLoc &dl, in emitConstantSizeRepmov()
264 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
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| H A D | X86ISelLowering.cpp | 2605 SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val, in emitStackGuardXorFP()
2840 SelectionDAG &DAG) { in TranslateX86CC()
3260 const SelectionDAG &DAG, in isLoadBitCastBeneficial()
3491 SelectionDAG &DAG, SDNode *N, unsigned ExpansionFactor) const { in preferredShiftLegalizationStrategy()
3786 static SDValue getConstVector(ArrayRef<int> Values, MVT VT, SelectionDAG &DAG, in getConstVector()
3817 MVT VT, SelectionDAG &DAG, const SDLoc &dl) { in getConstVector()
3858 SelectionDAG &DAG, const SDLoc &dl) { in getConstVector()
3865 SelectionDAG &DAG, const SDLoc &dl) { in getZeroVector()
3914 static SDValue extractSubVector(SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, in extractSubVector()
3952 SelectionDAG &DAG, const SDLoc &dl) { in extract128BitVector()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 25 SelectionDAG &DAG, const SDLoc &DL, in EmitMOPS()
86 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitStreamingCompatibleMemLibCall()
144 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
162 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemset()
180 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemmove()
199 static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl, in EmitUnrolledSetTag()
252 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Addr, in EmitTargetCodeForSetTag()
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| H A D | AArch64ISelLowering.cpp | 234 static inline bool isPackedVectorType(EVT VT, SelectionDAG &DAG) { in isPackedVectorType()
343 extractPtrauthBlendDiscriminators(SDValue Disc, SelectionDAG *DAG) { in extractPtrauthBlendDiscriminators()
2309 const SelectionDAG &DAG, unsigned Depth) const { in computeKnownBitsForTargetNode() argument
2435 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, in ComputeNumSignBitsForTargetNode()
3412 static bool cannotBeIntMin(SDValue CheckedVal, SelectionDAG &DAG) { in cannotBeIntMin()
3427 static bool isCMN(SDValue Op, ISD::CondCode CC, SelectionDAG &DAG) { in isCMN()
3435 SelectionDAG &DAG, SDValue Chain, in emitStrictFPComparison()
3456 const SDLoc &dl, SelectionDAG &DAG) { in emitComparison()
3565 const SDLoc &DL, SelectionDAG &DAG) { in emitConditionalComparison()
3679 static SDValue emitConjunctionRec(SelectionDAG &DAG, SDValue Val, in emitConjunctionRec()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.h | 26 const ScheduleDAG *DAG; variable
56 const ScheduleDAG &DAG; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.h | 329 OccInitialScheduleStage(GCNSchedStageID StageID, GCNScheduleDAGMILive &DAG) in OccInitialScheduleStage()
347 UnclusteredHighRPStage(GCNSchedStageID StageID, GCNScheduleDAGMILive &DAG) in UnclusteredHighRPStage()
362 ClusteredLowOccStage(GCNSchedStageID StageID, GCNScheduleDAGMILive &DAG) in ClusteredLowOccStage()
398 PreRARematStage(GCNSchedStageID StageID, GCNScheduleDAGMILive &DAG) in PreRARematStage()
406 ILPInitialScheduleStage(GCNSchedStageID StageID, GCNScheduleDAGMILive &DAG) in ILPInitialScheduleStage()
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| H A D | AMDGPUExportClustering.cpp | 59 static void buildCluster(ArrayRef<SUnit *> Exports, ScheduleDAGInstrs *DAG) { in buildCluster()
82 static void removeExportDependencies(ScheduleDAGInstrs *DAG, SUnit &SU) { in removeExportDependencies()
108 void ExportClustering::apply(ScheduleDAGInstrs *DAG) { in apply()
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| H A D | AMDGPUISelLowering.cpp | 51 unsigned AMDGPUTargetLowering::numBitsUnsigned(SDValue Op, SelectionDAG &DAG) { in numBitsUnsigned()
55 unsigned AMDGPUTargetLowering::numBitsSigned(SDValue Op, SelectionDAG &DAG) { in numBitsSigned()
857 const SelectionDAG &DAG, in isLoadBitCastBeneficial()
909 SDValue Op, SelectionDAG &DAG, bool LegalOperations, bool ForCodeSize, in getNegatedExpression()
1292 SelectionDAG &DAG, in addTokenForArgument()
1329 SelectionDAG &DAG = CLI.DAG; in lowerUnhandledCall() local
1598 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacyImpl() local
1672 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy() local
1905 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, in LowerDIVREM24()
2021 SelectionDAG &DAG, in LowerUDIVREM64()
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| H A D | AMDGPUIGroupLP.cpp | 154 ScheduleDAGInstrs *DAG; member in __anon5d856e630111::SchedGroup
231 ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in SchedGroup()
237 ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in SchedGroup()
244 static void resetEdges(SUnit &SU, ScheduleDAGInstrs *DAG) { in resetEdges()
273 ScheduleDAGMI *DAG; member in __anon5d856e630111::PipelineSolver
364 ScheduleDAGMI *DAG, bool IsBottomUp = true) in PipelineSolver()
842 ScheduleDAGInstrs *DAG; member in __anon5d856e630111::IGLPStrategy
859 IGLPStrategy(ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in IGLPStrategy()
873 bool shouldApplyStrategy(ScheduleDAGInstrs *DAG, in shouldApplyStrategy()
878 MFMASmallGemmOpt(ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in MFMASmallGemmOpt()
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| H A D | SIMachineScheduler.h | 59 SIScheduleDAGMI *DAG; variable
101 SIScheduleBlock(SIScheduleDAGMI *DAG, SIScheduleBlockCreator *BC, in SIScheduleBlock()
223 SIScheduleDAGMI *DAG; variable
319 SIScheduleDAGMI *DAG; variable
412 SIScheduleDAGMI *DAG; variable
416 SIScheduler(SIScheduleDAGMI *DAG) : DAG(DAG), BlockCreator(DAG) {} in SIScheduler()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySelectionDAGInfo.cpp | 22 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
46 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MacroFusion.cpp | 53 bool llvm::fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU, in fuseInstructionPair() argument
153 apply(ScheduleDAGInstrs * DAG) apply() argument
167 scheduleAdjacentImpl(ScheduleDAGInstrs & DAG,SUnit & AnchorSU) scheduleAdjacentImpl() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 199 static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, in convertValVTToLocVT()
215 static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, in convertLocVTToValVT()
230 SelectionDAG &DAG, SDValue Chain, in unpackFromRegLoc()
261 static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, in unpackFromMemLoc()
288 static SDValue unpack64(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, in unpack64()
330 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
507 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
784 SelectionDAG &DAG, in getTargetConstantPoolValue()
1045 SelectionDAG &DAG, in getTargetConstantPoolValue()
1056 SelectionDAG &DAG, in getTargetConstantPoolValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 39 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitSpecializedLibcall()
142 const SelectionDAG &DAG, in shouldGenerateInlineTPLoop()
169 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
287 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemmove()
295 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemset()
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| H A D | ARMISelLowering.cpp | 160 SelectionDAG &DAG, const SDLoc &DL) { in handleCMSEValue()
2033 static bool isS16(const SDValue &Op, SelectionDAG &DAG) { in isS16()
2172 SDValue ARMTargetLowering::MoveToHPR(const SDLoc &dl, SelectionDAG &DAG, in MoveToHPR()
2186 SDValue ARMTargetLowering::MoveFromHPR(const SDLoc &dl, SelectionDAG &DAG, in MoveFromHPR()
2206 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, in LowerCallResult()
2301 const SDLoc &dl, SelectionDAG &DAG, const CCValAssign &VA, SDValue StackPtr, in computeAddrForCallArg()
2327 void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, in PassF64ArgInRegs()
2368 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
3020 const SelectionDAG &DAG = CLI.DAG; in IsEligibleForTailCallOptimization() local
3160 const SDLoc &DL, SelectionDAG &DAG) { in LowerInterruptReturn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 420 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
434 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments_32()
629 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments_64()
765 static bool hasReturnsTwiceAttr(SelectionDAG &DAG, SDValue Callee, in hasReturnsTwiceAttr()
823 SelectionDAG &DAG = CLI.DAG; in LowerCall_32() local
1224 SelectionDAG &DAG = CLI.DAG; in LowerCall_64() local
2056 const SelectionDAG &DAG, in computeKnownBitsForTargetNode()
2339 SparcTargetLowering::LowerF128Op(SDValue Op, SelectionDAG &DAG, in LowerF128Op()
2491 LowerF128_FPEXTEND(SDValue Op, SelectionDAG &DAG, in LowerF128_FPEXTEND()
2507 LowerF128_FPROUND(SDValue Op, SelectionDAG &DAG, in LowerF128_FPROUND()
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