1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Pin-multiplex helper macros for TI DaVinci family devices
4 *
5 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * 2007 (c) MontaVista Software, Inc.
8 *
9 * Copyright (C) 2008 Texas Instruments.
10 */
11 #ifndef _MACH_DAVINCI_MUX_H_
12 #define _MACH_DAVINCI_MUX_H_
13
14 struct mux_config {
15 const char *name;
16 const char *mux_reg_name;
17 const unsigned char mux_reg;
18 const unsigned char mask_offset;
19 const unsigned char mask;
20 const unsigned char mode;
21 bool debug;
22 };
23
24 enum davinci_da850_index {
25 /* UART0 function */
26 DA850_NUART0_CTS,
27 DA850_NUART0_RTS,
28 DA850_UART0_RXD,
29 DA850_UART0_TXD,
30
31 /* UART1 function */
32 DA850_NUART1_CTS,
33 DA850_NUART1_RTS,
34 DA850_UART1_RXD,
35 DA850_UART1_TXD,
36
37 /* UART2 function */
38 DA850_NUART2_CTS,
39 DA850_NUART2_RTS,
40 DA850_UART2_RXD,
41 DA850_UART2_TXD,
42
43 /* I2C1 function */
44 DA850_I2C1_SCL,
45 DA850_I2C1_SDA,
46
47 /* I2C0 function */
48 DA850_I2C0_SDA,
49 DA850_I2C0_SCL,
50
51 /* EMAC function */
52 DA850_MII_TXEN,
53 DA850_MII_TXCLK,
54 DA850_MII_COL,
55 DA850_MII_TXD_3,
56 DA850_MII_TXD_2,
57 DA850_MII_TXD_1,
58 DA850_MII_TXD_0,
59 DA850_MII_RXER,
60 DA850_MII_CRS,
61 DA850_MII_RXCLK,
62 DA850_MII_RXDV,
63 DA850_MII_RXD_3,
64 DA850_MII_RXD_2,
65 DA850_MII_RXD_1,
66 DA850_MII_RXD_0,
67 DA850_MDIO_CLK,
68 DA850_MDIO_D,
69 DA850_RMII_TXD_0,
70 DA850_RMII_TXD_1,
71 DA850_RMII_TXEN,
72 DA850_RMII_CRS_DV,
73 DA850_RMII_RXD_0,
74 DA850_RMII_RXD_1,
75 DA850_RMII_RXER,
76 DA850_RMII_MHZ_50_CLK,
77
78 /* McASP function */
79 DA850_ACLKR,
80 DA850_ACLKX,
81 DA850_AFSR,
82 DA850_AFSX,
83 DA850_AHCLKR,
84 DA850_AHCLKX,
85 DA850_AMUTE,
86 DA850_AXR_15,
87 DA850_AXR_14,
88 DA850_AXR_13,
89 DA850_AXR_12,
90 DA850_AXR_11,
91 DA850_AXR_10,
92 DA850_AXR_9,
93 DA850_AXR_8,
94 DA850_AXR_7,
95 DA850_AXR_6,
96 DA850_AXR_5,
97 DA850_AXR_4,
98 DA850_AXR_3,
99 DA850_AXR_2,
100 DA850_AXR_1,
101 DA850_AXR_0,
102
103 /* LCD function */
104 DA850_LCD_D_7,
105 DA850_LCD_D_6,
106 DA850_LCD_D_5,
107 DA850_LCD_D_4,
108 DA850_LCD_D_3,
109 DA850_LCD_D_2,
110 DA850_LCD_D_1,
111 DA850_LCD_D_0,
112 DA850_LCD_D_15,
113 DA850_LCD_D_14,
114 DA850_LCD_D_13,
115 DA850_LCD_D_12,
116 DA850_LCD_D_11,
117 DA850_LCD_D_10,
118 DA850_LCD_D_9,
119 DA850_LCD_D_8,
120 DA850_LCD_PCLK,
121 DA850_LCD_HSYNC,
122 DA850_LCD_VSYNC,
123 DA850_NLCD_AC_ENB_CS,
124
125 /* MMC/SD0 function */
126 DA850_MMCSD0_DAT_0,
127 DA850_MMCSD0_DAT_1,
128 DA850_MMCSD0_DAT_2,
129 DA850_MMCSD0_DAT_3,
130 DA850_MMCSD0_CLK,
131 DA850_MMCSD0_CMD,
132
133 /* MMC/SD1 function */
134 DA850_MMCSD1_DAT_0,
135 DA850_MMCSD1_DAT_1,
136 DA850_MMCSD1_DAT_2,
137 DA850_MMCSD1_DAT_3,
138 DA850_MMCSD1_CLK,
139 DA850_MMCSD1_CMD,
140
141 /* EMIF2.5/EMIFA function */
142 DA850_EMA_D_7,
143 DA850_EMA_D_6,
144 DA850_EMA_D_5,
145 DA850_EMA_D_4,
146 DA850_EMA_D_3,
147 DA850_EMA_D_2,
148 DA850_EMA_D_1,
149 DA850_EMA_D_0,
150 DA850_EMA_A_1,
151 DA850_EMA_A_2,
152 DA850_NEMA_CS_3,
153 DA850_NEMA_CS_4,
154 DA850_NEMA_WE,
155 DA850_NEMA_OE,
156 DA850_EMA_D_15,
157 DA850_EMA_D_14,
158 DA850_EMA_D_13,
159 DA850_EMA_D_12,
160 DA850_EMA_D_11,
161 DA850_EMA_D_10,
162 DA850_EMA_D_9,
163 DA850_EMA_D_8,
164 DA850_EMA_A_0,
165 DA850_EMA_A_3,
166 DA850_EMA_A_4,
167 DA850_EMA_A_5,
168 DA850_EMA_A_6,
169 DA850_EMA_A_7,
170 DA850_EMA_A_8,
171 DA850_EMA_A_9,
172 DA850_EMA_A_10,
173 DA850_EMA_A_11,
174 DA850_EMA_A_12,
175 DA850_EMA_A_13,
176 DA850_EMA_A_14,
177 DA850_EMA_A_15,
178 DA850_EMA_A_16,
179 DA850_EMA_A_17,
180 DA850_EMA_A_18,
181 DA850_EMA_A_19,
182 DA850_EMA_A_20,
183 DA850_EMA_A_21,
184 DA850_EMA_A_22,
185 DA850_EMA_A_23,
186 DA850_EMA_BA_1,
187 DA850_EMA_CLK,
188 DA850_EMA_WAIT_1,
189 DA850_NEMA_CS_2,
190
191 /* GPIO function */
192 DA850_GPIO2_4,
193 DA850_GPIO2_6,
194 DA850_GPIO2_8,
195 DA850_GPIO2_15,
196 DA850_GPIO3_12,
197 DA850_GPIO3_13,
198 DA850_GPIO4_0,
199 DA850_GPIO4_1,
200 DA850_GPIO6_9,
201 DA850_GPIO6_10,
202 DA850_GPIO6_13,
203 DA850_RTC_ALARM,
204
205 /* VPIF Capture */
206 DA850_VPIF_DIN0,
207 DA850_VPIF_DIN1,
208 DA850_VPIF_DIN2,
209 DA850_VPIF_DIN3,
210 DA850_VPIF_DIN4,
211 DA850_VPIF_DIN5,
212 DA850_VPIF_DIN6,
213 DA850_VPIF_DIN7,
214 DA850_VPIF_DIN8,
215 DA850_VPIF_DIN9,
216 DA850_VPIF_DIN10,
217 DA850_VPIF_DIN11,
218 DA850_VPIF_DIN12,
219 DA850_VPIF_DIN13,
220 DA850_VPIF_DIN14,
221 DA850_VPIF_DIN15,
222 DA850_VPIF_CLKIN0,
223 DA850_VPIF_CLKIN1,
224 DA850_VPIF_CLKIN2,
225 DA850_VPIF_CLKIN3,
226
227 /* VPIF Display */
228 DA850_VPIF_DOUT0,
229 DA850_VPIF_DOUT1,
230 DA850_VPIF_DOUT2,
231 DA850_VPIF_DOUT3,
232 DA850_VPIF_DOUT4,
233 DA850_VPIF_DOUT5,
234 DA850_VPIF_DOUT6,
235 DA850_VPIF_DOUT7,
236 DA850_VPIF_DOUT8,
237 DA850_VPIF_DOUT9,
238 DA850_VPIF_DOUT10,
239 DA850_VPIF_DOUT11,
240 DA850_VPIF_DOUT12,
241 DA850_VPIF_DOUT13,
242 DA850_VPIF_DOUT14,
243 DA850_VPIF_DOUT15,
244 DA850_VPIF_CLKO2,
245 DA850_VPIF_CLKO3,
246 };
247
248 #define PINMUX(x) (4 * (x))
249
250 #ifdef CONFIG_DAVINCI_MUX
251 /* setup pin muxing */
252 extern int davinci_cfg_reg(unsigned long reg_cfg);
253 #else
254 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
davinci_cfg_reg(unsigned long reg_cfg)255 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
256 #endif
257
258
259 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
260 [soc##_##desc] = { \
261 .name = #desc, \
262 .debug = dbg, \
263 .mux_reg_name = "PINMUX"#muxreg, \
264 .mux_reg = PINMUX(muxreg), \
265 .mask_offset = mode_offset, \
266 .mask = mode_mask, \
267 .mode = mux_mode, \
268 },
269
270 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
271 [soc##_##desc] = { \
272 .name = #desc, \
273 .debug = dbg, \
274 .mux_reg_name = "INTMUX", \
275 .mux_reg = INTMUX, \
276 .mask_offset = mode_offset, \
277 .mask = mode_mask, \
278 .mode = mux_mode, \
279 },
280
281 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
282 [soc##_##desc] = { \
283 .name = #desc, \
284 .debug = dbg, \
285 .mux_reg_name = "EVTMUX", \
286 .mux_reg = EVTMUX, \
287 .mask_offset = mode_offset, \
288 .mask = mode_mask, \
289 .mode = mux_mode, \
290 },
291
292 #endif /* _MACH_DAVINCI_MUX_H */
293