xref: /linux/sound/soc/samsung/spdif.c (revision 922fc982af98183f73599784ae5c207af3ca0c60)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
4 //
5 // Copyright (c) 2010 Samsung Electronics Co. Ltd
6 //		http://www.samsung.com/
7 
8 #include <linux/clk.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 
12 #include <sound/soc.h>
13 #include <sound/pcm_params.h>
14 
15 #include <linux/platform_data/asoc-s3c.h>
16 
17 #include "dma.h"
18 #include "spdif.h"
19 
20 /* Registers */
21 #define CLKCON				0x00
22 #define CON				0x04
23 #define BSTAS				0x08
24 #define CSTAS				0x0C
25 #define DATA_OUTBUF			0x10
26 #define DCNT				0x14
27 #define BSTAS_S				0x18
28 #define DCNT_S				0x1C
29 
30 #define CLKCTL_MASK			0x7
31 #define CLKCTL_MCLK_EXT			(0x1 << 2)
32 #define CLKCTL_PWR_ON			(0x1 << 0)
33 
34 #define CON_MASK			0x3ffffff
35 #define CON_FIFO_TH_SHIFT		19
36 #define CON_FIFO_TH_MASK		(0x7 << 19)
37 #define CON_USERDATA_23RDBIT		(0x1 << 12)
38 
39 #define CON_SW_RESET			(0x1 << 5)
40 
41 #define CON_MCLKDIV_MASK		(0x3 << 3)
42 #define CON_MCLKDIV_256FS		(0x0 << 3)
43 #define CON_MCLKDIV_384FS		(0x1 << 3)
44 #define CON_MCLKDIV_512FS		(0x2 << 3)
45 
46 #define CON_PCM_MASK			(0x3 << 1)
47 #define CON_PCM_16BIT			(0x0 << 1)
48 #define CON_PCM_20BIT			(0x1 << 1)
49 #define CON_PCM_24BIT			(0x2 << 1)
50 
51 #define CON_PCM_DATA			(0x1 << 0)
52 
53 #define CSTAS_MASK			0x3fffffff
54 #define CSTAS_SAMP_FREQ_MASK		(0xF << 24)
55 #define CSTAS_SAMP_FREQ_44		(0x0 << 24)
56 #define CSTAS_SAMP_FREQ_48		(0x2 << 24)
57 #define CSTAS_SAMP_FREQ_32		(0x3 << 24)
58 #define CSTAS_SAMP_FREQ_96		(0xA << 24)
59 
60 #define CSTAS_CATEGORY_MASK		(0xFF << 8)
61 #define CSTAS_CATEGORY_CODE_CDP		(0x01 << 8)
62 
63 #define CSTAS_NO_COPYRIGHT		(0x1 << 2)
64 
65 /**
66  * struct samsung_spdif_info - Samsung S/PDIF Controller information
67  * @lock: Spin lock for S/PDIF.
68  * @dev: The parent device passed to use from the probe.
69  * @regs: The pointer to the device register block.
70  * @clk_rate: Current clock rate for calcurate ratio.
71  * @pclk: The peri-clock pointer for spdif master operation.
72  * @sclk: The source clock pointer for making sync signals.
73  * @saved_clkcon: Backup clkcon reg. in suspend.
74  * @saved_con: Backup con reg. in suspend.
75  * @saved_cstas: Backup cstas reg. in suspend.
76  * @dma_playback: DMA information for playback channel.
77  */
78 struct samsung_spdif_info {
79 	spinlock_t	lock;
80 	struct device	*dev;
81 	void __iomem	*regs;
82 	unsigned long	clk_rate;
83 	struct clk	*pclk;
84 	struct clk	*sclk;
85 	u32		saved_clkcon;
86 	u32		saved_con;
87 	u32		saved_cstas;
88 	struct snd_dmaengine_dai_dma_data *dma_playback;
89 };
90 
91 static struct snd_dmaengine_dai_dma_data spdif_stereo_out;
92 static struct samsung_spdif_info spdif_info;
93 
94 static inline struct samsung_spdif_info
95 *component_to_info(struct snd_soc_component *component)
96 {
97 	return snd_soc_component_get_drvdata(component);
98 }
99 
100 static inline struct samsung_spdif_info *to_info(struct snd_soc_dai *cpu_dai)
101 {
102 	return snd_soc_dai_get_drvdata(cpu_dai);
103 }
104 
105 static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
106 {
107 	void __iomem *regs = spdif->regs;
108 	u32 clkcon;
109 
110 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
111 
112 	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
113 	if (on)
114 		writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
115 	else
116 		writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
117 }
118 
119 static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
120 				int clk_id, unsigned int freq, int dir)
121 {
122 	struct samsung_spdif_info *spdif = to_info(cpu_dai);
123 	u32 clkcon;
124 
125 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
126 
127 	clkcon = readl(spdif->regs + CLKCON);
128 
129 	if (clk_id == SND_SOC_SPDIF_INT_MCLK)
130 		clkcon &= ~CLKCTL_MCLK_EXT;
131 	else
132 		clkcon |= CLKCTL_MCLK_EXT;
133 
134 	writel(clkcon, spdif->regs + CLKCON);
135 
136 	spdif->clk_rate = freq;
137 
138 	return 0;
139 }
140 
141 static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
142 				struct snd_soc_dai *dai)
143 {
144 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
145 	struct samsung_spdif_info *spdif = to_info(snd_soc_rtd_to_cpu(rtd, 0));
146 
147 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
148 
149 	switch (cmd) {
150 	case SNDRV_PCM_TRIGGER_START:
151 	case SNDRV_PCM_TRIGGER_RESUME:
152 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
153 		scoped_guard(spinlock_irqsave, &spdif->lock)
154 			spdif_snd_txctrl(spdif, 1);
155 		break;
156 	case SNDRV_PCM_TRIGGER_STOP:
157 	case SNDRV_PCM_TRIGGER_SUSPEND:
158 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
159 		scoped_guard(spinlock_irqsave, &spdif->lock)
160 			spdif_snd_txctrl(spdif, 0);
161 		break;
162 	default:
163 		return -EINVAL;
164 	}
165 
166 	return 0;
167 }
168 
169 static int spdif_sysclk_ratios[] = {
170 	512, 384, 256,
171 };
172 
173 static int spdif_hw_params(struct snd_pcm_substream *substream,
174 				struct snd_pcm_hw_params *params,
175 				struct snd_soc_dai *socdai)
176 {
177 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
178 	struct samsung_spdif_info *spdif = to_info(snd_soc_rtd_to_cpu(rtd, 0));
179 	void __iomem *regs = spdif->regs;
180 	struct snd_dmaengine_dai_dma_data *dma_data;
181 	u32 con, clkcon, cstas;
182 	int i, ratio;
183 
184 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
185 
186 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
187 		dma_data = spdif->dma_playback;
188 	else {
189 		dev_err(spdif->dev, "Capture is not supported\n");
190 		return -EINVAL;
191 	}
192 
193 	snd_soc_dai_set_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream, dma_data);
194 
195 	guard(spinlock_irqsave)(&spdif->lock);
196 
197 	con = readl(regs + CON) & CON_MASK;
198 	cstas = readl(regs + CSTAS) & CSTAS_MASK;
199 	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
200 
201 	con &= ~CON_FIFO_TH_MASK;
202 	con |= (0x7 << CON_FIFO_TH_SHIFT);
203 	con |= CON_USERDATA_23RDBIT;
204 	con |= CON_PCM_DATA;
205 
206 	con &= ~CON_PCM_MASK;
207 	switch (params_width(params)) {
208 	case 16:
209 		con |= CON_PCM_16BIT;
210 		break;
211 	default:
212 		dev_err(spdif->dev, "Unsupported data size.\n");
213 		return -EINVAL;
214 	}
215 
216 	ratio = spdif->clk_rate / params_rate(params);
217 	for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
218 		if (ratio == spdif_sysclk_ratios[i])
219 			break;
220 	if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
221 		dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
222 				spdif->clk_rate, params_rate(params));
223 		return -EINVAL;
224 	}
225 
226 	con &= ~CON_MCLKDIV_MASK;
227 	switch (ratio) {
228 	case 256:
229 		con |= CON_MCLKDIV_256FS;
230 		break;
231 	case 384:
232 		con |= CON_MCLKDIV_384FS;
233 		break;
234 	case 512:
235 		con |= CON_MCLKDIV_512FS;
236 		break;
237 	}
238 
239 	cstas &= ~CSTAS_SAMP_FREQ_MASK;
240 	switch (params_rate(params)) {
241 	case 44100:
242 		cstas |= CSTAS_SAMP_FREQ_44;
243 		break;
244 	case 48000:
245 		cstas |= CSTAS_SAMP_FREQ_48;
246 		break;
247 	case 32000:
248 		cstas |= CSTAS_SAMP_FREQ_32;
249 		break;
250 	case 96000:
251 		cstas |= CSTAS_SAMP_FREQ_96;
252 		break;
253 	default:
254 		dev_err(spdif->dev, "Invalid sampling rate %d\n",
255 				params_rate(params));
256 		return -EINVAL;
257 	}
258 
259 	cstas &= ~CSTAS_CATEGORY_MASK;
260 	cstas |= CSTAS_CATEGORY_CODE_CDP;
261 	cstas |= CSTAS_NO_COPYRIGHT;
262 
263 	writel(con, regs + CON);
264 	writel(cstas, regs + CSTAS);
265 	writel(clkcon, regs + CLKCON);
266 
267 	return 0;
268 }
269 
270 static void spdif_shutdown(struct snd_pcm_substream *substream,
271 				struct snd_soc_dai *dai)
272 {
273 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
274 	struct samsung_spdif_info *spdif = to_info(snd_soc_rtd_to_cpu(rtd, 0));
275 	void __iomem *regs = spdif->regs;
276 	u32 con, clkcon;
277 
278 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
279 
280 	con = readl(regs + CON) & CON_MASK;
281 	clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
282 
283 	writel(con | CON_SW_RESET, regs + CON);
284 	cpu_relax();
285 
286 	writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
287 }
288 
289 #ifdef CONFIG_PM
290 static int spdif_suspend(struct snd_soc_component *component)
291 {
292 	struct samsung_spdif_info *spdif = component_to_info(component);
293 	u32 con = spdif->saved_con;
294 
295 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
296 
297 	spdif->saved_clkcon = readl(spdif->regs	+ CLKCON) & CLKCTL_MASK;
298 	spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
299 	spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
300 
301 	writel(con | CON_SW_RESET, spdif->regs + CON);
302 	cpu_relax();
303 
304 	return 0;
305 }
306 
307 static int spdif_resume(struct snd_soc_component *component)
308 {
309 	struct samsung_spdif_info *spdif = component_to_info(component);
310 
311 	dev_dbg(spdif->dev, "Entered %s\n", __func__);
312 
313 	writel(spdif->saved_clkcon, spdif->regs	+ CLKCON);
314 	writel(spdif->saved_con, spdif->regs + CON);
315 	writel(spdif->saved_cstas, spdif->regs + CSTAS);
316 
317 	return 0;
318 }
319 #else
320 #define spdif_suspend NULL
321 #define spdif_resume NULL
322 #endif
323 
324 static const struct snd_soc_dai_ops spdif_dai_ops = {
325 	.set_sysclk	= spdif_set_sysclk,
326 	.trigger	= spdif_trigger,
327 	.hw_params	= spdif_hw_params,
328 	.shutdown	= spdif_shutdown,
329 };
330 
331 static struct snd_soc_dai_driver samsung_spdif_dai = {
332 	.name = "samsung-spdif",
333 	.playback = {
334 		.stream_name = "S/PDIF Playback",
335 		.channels_min = 2,
336 		.channels_max = 2,
337 		.rates = (SNDRV_PCM_RATE_32000 |
338 				SNDRV_PCM_RATE_44100 |
339 				SNDRV_PCM_RATE_48000 |
340 				SNDRV_PCM_RATE_96000),
341 		.formats = SNDRV_PCM_FMTBIT_S16_LE, },
342 	.ops = &spdif_dai_ops,
343 };
344 
345 static const struct snd_soc_component_driver samsung_spdif_component = {
346 	.name			= "samsung-spdif",
347 	.suspend		= spdif_suspend,
348 	.resume			= spdif_resume,
349 	.legacy_dai_naming	= 1,
350 };
351 
352 static int spdif_probe(struct platform_device *pdev)
353 {
354 	struct s3c_audio_pdata *spdif_pdata;
355 	struct resource *mem_res;
356 	struct samsung_spdif_info *spdif;
357 	dma_filter_fn filter;
358 	int ret;
359 
360 	spdif_pdata = pdev->dev.platform_data;
361 
362 	dev_dbg(&pdev->dev, "Entered %s\n", __func__);
363 
364 	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
365 	if (!mem_res) {
366 		dev_err(&pdev->dev, "Unable to get register resource.\n");
367 		return -ENXIO;
368 	}
369 
370 	if (spdif_pdata && spdif_pdata->cfg_gpio
371 			&& spdif_pdata->cfg_gpio(pdev)) {
372 		dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
373 		return -EINVAL;
374 	}
375 
376 	spdif = &spdif_info;
377 	spdif->dev = &pdev->dev;
378 
379 	spin_lock_init(&spdif->lock);
380 
381 	spdif->pclk = devm_clk_get(&pdev->dev, "spdif");
382 	if (IS_ERR(spdif->pclk)) {
383 		dev_err(&pdev->dev, "failed to get peri-clock\n");
384 		ret = -ENOENT;
385 		goto err0;
386 	}
387 	ret = clk_prepare_enable(spdif->pclk);
388 	if (ret)
389 		goto err0;
390 
391 	spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif");
392 	if (IS_ERR(spdif->sclk)) {
393 		dev_err(&pdev->dev, "failed to get internal source clock\n");
394 		ret = -ENOENT;
395 		goto err1;
396 	}
397 	ret = clk_prepare_enable(spdif->sclk);
398 	if (ret)
399 		goto err1;
400 
401 	spdif->regs = devm_ioremap_resource(&pdev->dev, mem_res);
402 	if (IS_ERR(spdif->regs)) {
403 		ret = PTR_ERR(spdif->regs);
404 		goto err2;
405 	}
406 
407 	spdif_stereo_out.addr_width = 2;
408 	spdif_stereo_out.addr = mem_res->start + DATA_OUTBUF;
409 	filter = NULL;
410 	if (spdif_pdata) {
411 		spdif_stereo_out.filter_data = spdif_pdata->dma_playback;
412 		filter = spdif_pdata->dma_filter;
413 	}
414 	spdif->dma_playback = &spdif_stereo_out;
415 
416 	ret = samsung_asoc_dma_platform_register(&pdev->dev, filter,
417 						 NULL, NULL, NULL);
418 	if (ret) {
419 		dev_err(&pdev->dev, "failed to register DMA: %d\n", ret);
420 		goto err2;
421 	}
422 
423 	dev_set_drvdata(&pdev->dev, spdif);
424 
425 	ret = devm_snd_soc_register_component(&pdev->dev,
426 			&samsung_spdif_component, &samsung_spdif_dai, 1);
427 	if (ret != 0) {
428 		dev_err(&pdev->dev, "fail to register dai\n");
429 		goto err2;
430 	}
431 
432 	return 0;
433 err2:
434 	clk_disable_unprepare(spdif->sclk);
435 err1:
436 	clk_disable_unprepare(spdif->pclk);
437 err0:
438 	return ret;
439 }
440 
441 static void spdif_remove(struct platform_device *pdev)
442 {
443 	struct samsung_spdif_info *spdif = &spdif_info;
444 
445 	clk_disable_unprepare(spdif->sclk);
446 	clk_disable_unprepare(spdif->pclk);
447 }
448 
449 static struct platform_driver samsung_spdif_driver = {
450 	.probe	= spdif_probe,
451 	.remove = spdif_remove,
452 	.driver	= {
453 		.name	= "samsung-spdif",
454 	},
455 };
456 
457 module_platform_driver(samsung_spdif_driver);
458 
459 MODULE_AUTHOR("Seungwhan Youn, <sw.youn@samsung.com>");
460 MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
461 MODULE_LICENSE("GPL");
462 MODULE_ALIAS("platform:samsung-spdif");
463