1# SPDX-License-Identifier: GPL-2.0 2# Put here option for CPU selection and depending optimization 3choice 4 prompt "x86-32 Processor family" 5 depends on X86_32 6 default M686 7 help 8 This is the processor type of your CPU. This information is 9 used for optimizing purposes. In order to compile a kernel 10 that can run on all supported x86 CPU types (albeit not 11 optimally fast), you can specify "486" here. 12 13 Note that the 386 is no longer supported, this includes 14 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2, 15 UMC 486SX-S and the NexGen Nx586. 16 17 The kernel will not necessarily run on earlier architectures than 18 the one you have chosen, e.g. a Pentium optimized kernel will run on 19 a PPro, but not necessarily on a i486. 20 21 Here are the settings recommended for greatest speed: 22 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or 23 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. 24 - "586" for generic Pentium CPUs lacking the TSC 25 (time stamp counter) register. 26 - "Pentium-Classic" for the Intel Pentium. 27 - "Pentium-MMX" for the Intel Pentium MMX. 28 - "Pentium-Pro" for the Intel Pentium Pro. 29 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron. 30 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. 31 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron. 32 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). 33 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). 34 - "Crusoe" for the Transmeta Crusoe series. 35 - "Efficeon" for the Transmeta Efficeon series. 36 - "Winchip-C6" for original IDT Winchip. 37 - "Winchip-2" for IDT Winchips with 3dNow! capabilities. 38 - "AMD Elan" for the 32-bit AMD Elan embedded CPU. 39 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX). 40 - "Geode GX/LX" For AMD Geode GX and LX processors. 41 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. 42 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above). 43 - "VIA C7" for VIA C7. 44 - "Intel Atom" for the Atom-microarchitecture CPUs. 45 46 See each option's help text for additional details. If you don't know 47 what to do, choose "Pentium-Pro". 48 49config M486SX 50 bool "486SX" 51 depends on X86_32 52 help 53 Select this for an 486-class CPU without an FPU such as 54 AMD/Cyrix/IBM/Intel SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5S. 55 56config M486 57 bool "486DX" 58 depends on X86_32 59 help 60 Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel 61 486DX/DX2/DX4 and UMC U5D. 62 63config M586 64 bool "586/K5/5x86/6x86/6x86MX" 65 depends on X86_32 66 help 67 Select this for an 586 or 686 series processor such as the AMD K5, 68 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not 69 assume the RDTSC (Read Time Stamp Counter) instruction. 70 71config M586TSC 72 bool "Pentium-Classic" 73 depends on X86_32 74 help 75 Select this for a Pentium Classic processor with the RDTSC (Read 76 Time Stamp Counter) instruction for benchmarking. 77 78config M586MMX 79 bool "Pentium-MMX" 80 depends on X86_32 81 help 82 Select this for a Pentium with the MMX graphics/multimedia 83 extended instructions. 84 85config M686 86 bool "Pentium-Pro" 87 depends on X86_32 88 help 89 Select this for Intel Pentium Pro chips. This enables the use of 90 Pentium Pro extended instructions, and disables the init-time guard 91 against the f00f bug found in earlier Pentiums. 92 93config MPENTIUMII 94 bool "Pentium-II/Celeron(pre-Coppermine)" 95 depends on X86_32 96 help 97 Select this for Intel chips based on the Pentium-II and 98 pre-Coppermine Celeron core. This option enables an unaligned 99 copy optimization, compiles the kernel with optimization flags 100 tailored for the chip, and applies any applicable Pentium Pro 101 optimizations. 102 103config MPENTIUMIII 104 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" 105 depends on X86_32 106 help 107 Select this for Intel chips based on the Pentium-III and 108 Celeron-Coppermine core. This option enables use of some 109 extended prefetch instructions in addition to the Pentium II 110 extensions. 111 112config MPENTIUMM 113 bool "Pentium M/Pentium Dual Core/Core Solo/Core Duo" 114 depends on X86_32 115 help 116 Select this for Intel Pentium M (not Pentium-4 M) 117 "Merom" Core Solo/Duo notebook chips 118 119config MPENTIUM4 120 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" 121 depends on X86_32 122 help 123 Select this for Intel Pentium 4 chips. This includes the 124 Pentium 4, Pentium D, P4-based Celeron and Xeon, and 125 Pentium-4 M (not Pentium M) chips. This option enables compile 126 flags optimized for the chip, uses the correct cache line size, and 127 applies any applicable optimizations. 128 129 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 ) 130 131 Select this for: 132 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename: 133 -Willamette 134 -Northwood 135 -Mobile Pentium 4 136 -Mobile Pentium 4 M 137 -Extreme Edition (Gallatin) 138 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename: 139 -Foster 140 -Prestonia 141 -Gallatin 142 143config MK6 144 bool "K6/K6-II/K6-III" 145 depends on X86_32 146 help 147 Select this for an AMD K6-family processor. Enables use of 148 some extended instructions, and passes appropriate optimization 149 flags to GCC. 150 151config MK7 152 bool "Athlon/Duron/K7" 153 depends on X86_32 154 help 155 Select this for an AMD Athlon K7-family processor. Enables use of 156 some extended instructions, and passes appropriate optimization 157 flags to GCC. 158 159config MCRUSOE 160 bool "Crusoe" 161 depends on X86_32 162 help 163 Select this for a Transmeta Crusoe processor. Treats the processor 164 like a 586 with TSC, and sets some GCC optimization flags (like a 165 Pentium Pro with no alignment requirements). 166 167config MEFFICEON 168 bool "Efficeon" 169 depends on X86_32 170 help 171 Select this for a Transmeta Efficeon processor. 172 173config MWINCHIPC6 174 bool "Winchip-C6" 175 depends on X86_32 176 help 177 Select this for an IDT Winchip C6 chip. Linux and GCC 178 treat this chip as a 586TSC with some extended instructions 179 and alignment requirements. 180 181config MWINCHIP3D 182 bool "Winchip-2/Winchip-2A/Winchip-3" 183 depends on X86_32 184 help 185 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC 186 treat this chip as a 586TSC with some extended instructions 187 and alignment requirements. Also enable out of order memory 188 stores for this CPU, which can increase performance of some 189 operations. 190 191config MELAN 192 bool "AMD Elan" 193 depends on X86_32 194 help 195 Select this for an AMD Elan processor. 196 197 Do not use this option for K6/Athlon/Opteron processors! 198 199config MGEODEGX1 200 bool "GeodeGX1" 201 depends on X86_32 202 help 203 Select this for a Geode GX1 (Cyrix MediaGX) chip. 204 205config MGEODE_LX 206 bool "Geode GX/LX" 207 depends on X86_32 208 help 209 Select this for AMD Geode GX and LX processors. 210 211config MCYRIXIII 212 bool "CyrixIII/VIA-C3" 213 depends on X86_32 214 help 215 Select this for a Cyrix III or C3 chip. Presently Linux and GCC 216 treat this chip as a generic 586. Whilst the CPU is 686 class, 217 it lacks the cmov extension which gcc assumes is present when 218 generating 686 code. 219 Note that Nehemiah (Model 9) and above will not boot with this 220 kernel due to them lacking the 3DNow! instructions used in earlier 221 incarnations of the CPU. 222 223config MVIAC3_2 224 bool "VIA C3-2 (Nehemiah)" 225 depends on X86_32 226 help 227 Select this for a VIA C3 "Nehemiah". Selecting this enables usage 228 of SSE and tells gcc to treat the CPU as a 686. 229 Note, this kernel will not boot on older (pre model 9) C3s. 230 231config MVIAC7 232 bool "VIA C7" 233 depends on X86_32 234 help 235 Select this for a VIA C7. Selecting this uses the correct cache 236 shift and tells gcc to treat the CPU as a 686. 237 238config MATOM 239 bool "Intel Atom" 240 help 241 Select this for the Intel Atom platform. Intel Atom CPUs have an 242 in-order pipelining architecture and thus can benefit from 243 accordingly optimized code. Use a recent GCC with specific Atom 244 support in order to fully benefit from selecting this option. 245 246endchoice 247 248config CC_HAS_MARCH_NATIVE 249 # This flag might not be available in cross-compilers: 250 def_bool $(cc-option, -march=native) 251 # LLVM 18 has an easily triggered internal compiler error in core 252 # networking code with '-march=native' on certain systems: 253 # https://github.com/llvm/llvm-project/issues/72026 254 # LLVM 19 introduces an optimization that resolves some high stack 255 # usage warnings that only appear wth '-march=native'. 256 depends on CC_IS_GCC || CLANG_VERSION >= 190100 257 258config X86_NATIVE_CPU 259 bool "Build and optimize for local/native CPU" 260 depends on X86_64 261 depends on CC_HAS_MARCH_NATIVE 262 help 263 Optimize for the current CPU used to compile the kernel. 264 Use this option if you intend to build the kernel for your 265 local machine. 266 267 Note that such a kernel might not work optimally on a 268 different x86 machine. 269 270 If unsure, say N. 271 272config X86_GENERIC 273 bool "Generic x86 support" 274 depends on X86_32 275 help 276 Instead of just including optimizations for the selected 277 x86 variant (e.g. PII, Crusoe or Athlon), include some more 278 generic optimizations as well. This will make the kernel 279 perform better on x86 CPUs other than that selected. 280 281 This is really intended for distributors who need more 282 generic optimizations. 283 284# 285# Define implied options from the CPU selection here 286config X86_INTERNODE_CACHE_SHIFT 287 int 288 default "12" if X86_VSMP 289 default X86_L1_CACHE_SHIFT 290 291config X86_L1_CACHE_SHIFT 292 int 293 default "7" if MPENTIUM4 294 default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X86_64 295 default "4" if MELAN || M486SX || M486 || MGEODEGX1 296 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX 297 298config X86_F00F_BUG 299 def_bool y 300 depends on M586MMX || M586TSC || M586 || M486SX || M486 301 302config X86_INVD_BUG 303 def_bool y 304 depends on M486SX || M486 305 306config X86_ALIGNMENT_16 307 def_bool y 308 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1 309 310config X86_INTEL_USERCOPY 311 def_bool y 312 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK7 || MEFFICEON 313 314config X86_USE_PPRO_CHECKSUM 315 def_bool y 316 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM 317 318config X86_TSC 319 def_bool y 320 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MATOM) || X86_64 321 322config X86_HAVE_PAE 323 def_bool y 324 depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC7 || MATOM || X86_64 325 326config X86_CX8 327 def_bool y 328 depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7 || MGEODEGX1 || MGEODE_LX 329 330# this should be set for all -march=.. options where the compiler 331# generates cmov. 332config X86_CMOV 333 def_bool y 334 depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || MATOM || MGEODE_LX || X86_64) 335 336config X86_MINIMUM_CPU_FAMILY 337 int 338 default "64" if X86_64 339 default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MK7) 340 default "5" if X86_32 && X86_CX8 341 default "4" 342 343config X86_DEBUGCTLMSR 344 def_bool y 345 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486SX || M486) && !UML 346 347config IA32_FEAT_CTL 348 def_bool y 349 depends on CPU_SUP_INTEL || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN 350 351config X86_VMX_FEATURE_NAMES 352 def_bool y 353 depends on IA32_FEAT_CTL 354 355menuconfig PROCESSOR_SELECT 356 bool "Supported processor vendors" if EXPERT 357 help 358 This lets you choose what x86 vendor support code your kernel 359 will include. 360 361config BROADCAST_TLB_FLUSH 362 def_bool y 363 depends on CPU_SUP_AMD && 64BIT 364 365config CPU_SUP_INTEL 366 default y 367 bool "Support Intel processors" if PROCESSOR_SELECT 368 help 369 This enables detection, tunings and quirks for Intel processors 370 371 You need this enabled if you want your kernel to run on an 372 Intel CPU. Disabling this option on other types of CPUs 373 makes the kernel a tiny bit smaller. Disabling it on an Intel 374 CPU might render the kernel unbootable. 375 376 If unsure, say N. 377 378config CPU_SUP_CYRIX_32 379 default y 380 bool "Support Cyrix processors" if PROCESSOR_SELECT 381 depends on M486SX || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT) 382 help 383 This enables detection, tunings and quirks for Cyrix processors 384 385 You need this enabled if you want your kernel to run on a 386 Cyrix CPU. Disabling this option on other types of CPUs 387 makes the kernel a tiny bit smaller. Disabling it on a Cyrix 388 CPU might render the kernel unbootable. 389 390 If unsure, say N. 391 392config CPU_SUP_AMD 393 default y 394 bool "Support AMD processors" if PROCESSOR_SELECT 395 help 396 This enables detection, tunings and quirks for AMD processors 397 398 You need this enabled if you want your kernel to run on an 399 AMD CPU. Disabling this option on other types of CPUs 400 makes the kernel a tiny bit smaller. Disabling it on an AMD 401 CPU might render the kernel unbootable. 402 403 If unsure, say N. 404 405config CPU_SUP_HYGON 406 default y 407 bool "Support Hygon processors" if PROCESSOR_SELECT 408 select CPU_SUP_AMD 409 help 410 This enables detection, tunings and quirks for Hygon processors 411 412 You need this enabled if you want your kernel to run on an 413 Hygon CPU. Disabling this option on other types of CPUs 414 makes the kernel a tiny bit smaller. Disabling it on an Hygon 415 CPU might render the kernel unbootable. 416 417 If unsure, say N. 418 419config CPU_SUP_CENTAUR 420 default y 421 bool "Support Centaur processors" if PROCESSOR_SELECT 422 help 423 This enables detection, tunings and quirks for Centaur processors 424 425 You need this enabled if you want your kernel to run on a 426 Centaur CPU. Disabling this option on other types of CPUs 427 makes the kernel a tiny bit smaller. Disabling it on a Centaur 428 CPU might render the kernel unbootable. 429 430 If unsure, say N. 431 432config CPU_SUP_TRANSMETA_32 433 default y 434 bool "Support Transmeta processors" if PROCESSOR_SELECT 435 depends on !64BIT 436 help 437 This enables detection, tunings and quirks for Transmeta processors 438 439 You need this enabled if you want your kernel to run on a 440 Transmeta CPU. Disabling this option on other types of CPUs 441 makes the kernel a tiny bit smaller. Disabling it on a Transmeta 442 CPU might render the kernel unbootable. 443 444 If unsure, say N. 445 446config CPU_SUP_UMC_32 447 default y 448 bool "Support UMC processors" if PROCESSOR_SELECT 449 depends on M486SX || M486 || (EXPERT && !64BIT) 450 help 451 This enables detection, tunings and quirks for UMC processors 452 453 You need this enabled if you want your kernel to run on a 454 UMC CPU. Disabling this option on other types of CPUs 455 makes the kernel a tiny bit smaller. Disabling it on a UMC 456 CPU might render the kernel unbootable. 457 458 If unsure, say N. 459 460config CPU_SUP_ZHAOXIN 461 default y 462 bool "Support Zhaoxin processors" if PROCESSOR_SELECT 463 help 464 This enables detection, tunings and quirks for Zhaoxin processors 465 466 You need this enabled if you want your kernel to run on a 467 Zhaoxin CPU. Disabling this option on other types of CPUs 468 makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin 469 CPU might render the kernel unbootable. 470 471 If unsure, say N. 472 473config CPU_SUP_VORTEX_32 474 default y 475 bool "Support Vortex processors" if PROCESSOR_SELECT 476 depends on X86_32 477 help 478 This enables detection, tunings and quirks for Vortex processors 479 480 You need this enabled if you want your kernel to run on a 481 Vortex CPU. Disabling this option on other types of CPUs 482 makes the kernel a tiny bit smaller. 483 484 If unsure, say N. 485