xref: /linux/arch/m68k/Kconfig.cpu (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1# SPDX-License-Identifier: GPL-2.0
2comment "Processor Type"
3
4choice
5	prompt "CPU family support"
6	default M68KCLASSIC if MMU
7	default COLDFIRE if !MMU
8	help
9	  The Freescale (was Motorola) M68K family of processors implements
10	  the full 68000 processor instruction set.
11	  The Freescale ColdFire family of processors is a modern derivative
12	  of the 68000 processor family. They are mainly targeted at embedded
13	  applications, and are all System-On-Chip (SOC) devices, as opposed
14	  to stand alone CPUs. They implement a subset of the original 68000
15	  processor instruction set.
16	  If you anticipate running this kernel on a computer with a classic
17	  MC68xxx processor, select M68KCLASSIC.
18	  If you anticipate running this kernel on a computer with a ColdFire
19	  processor, select COLDFIRE.
20
21config M68KCLASSIC
22	bool "Classic M68K CPU family support"
23	select HAVE_ARCH_PFN_VALID
24
25config COLDFIRE
26	bool "Coldfire CPU family support"
27	select CPU_HAS_NO_BITFIELDS
28	select CPU_HAS_NO_CAS
29	select CPU_HAS_NO_MULDIV64
30	select GENERIC_CSUM
31	select GPIOLIB
32	select HAVE_LEGACY_CLK
33	select HAVE_PAGE_SIZE_8KB if !MMU
34
35endchoice
36
37if M68KCLASSIC
38
39config M68000
40	def_bool y
41	depends on !MMU
42	select CPU_HAS_NO_BITFIELDS
43	select CPU_HAS_NO_CAS
44	select CPU_HAS_NO_MULDIV64
45	select CPU_HAS_NO_UNALIGNED
46	select GENERIC_CSUM
47	select CPU_NO_EFFICIENT_FFS
48	select HAVE_ARCH_HASH
49	select HAVE_PAGE_SIZE_4KB
50	select LEGACY_TIMER_TICK
51	help
52	  The Freescale (was Motorola) 68000 CPU is the first generation of
53	  the well known M68K family of processors. The CPU core as well as
54	  being available as a stand alone CPU was also used in many
55	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
56	  a paging MMU.
57
58config M68020
59	bool "68020 support"
60	depends on MMU
61	select FPU
62	select CPU_HAS_ADDRESS_SPACES
63	help
64	  If you anticipate running this kernel on a computer with a MC68020
65	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
66	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
67	  Sun 3, which provides its own version.
68
69config M68030
70	bool "68030 support"
71	depends on MMU && !MMU_SUN3
72	select FPU
73	select CPU_HAS_ADDRESS_SPACES
74	help
75	  If you anticipate running this kernel on a computer with a MC68030
76	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
77	  work, as it does not include an MMU (Memory Management Unit).
78
79config M68040
80	bool "68040 support"
81	depends on MMU && !MMU_SUN3
82	select FPU
83	select CPU_HAS_ADDRESS_SPACES
84	help
85	  If you anticipate running this kernel on a computer with a MC68LC040
86	  or MC68040 processor, say Y. Otherwise, say N. Note that an
87	  MC68EC040 will not work, as it does not include an MMU (Memory
88	  Management Unit).
89
90config M68060
91	bool "68060 support"
92	depends on MMU && !MMU_SUN3
93	select FPU
94	select CPU_HAS_ADDRESS_SPACES
95	help
96	  If you anticipate running this kernel on a computer with a MC68060
97	  processor, say Y. Otherwise, say N.
98
99config M68328
100	bool
101	depends on !MMU
102	select M68000
103	help
104	  Motorola 68328 processor support.
105
106config M68EZ328
107	bool
108	depends on !MMU
109	select M68000
110	help
111	  Motorola 68EX328 processor support.
112
113config M68VZ328
114	bool
115	depends on !MMU
116	select M68000
117	help
118	  Motorola 68VZ328 processor support.
119
120endif # M68KCLASSIC
121
122if COLDFIRE
123
124choice
125	prompt "ColdFire SoC type"
126	default M520x
127	help
128	  Select the type of ColdFire System-on-Chip (SoC) that you want
129	  to build for.
130
131config M5206
132	bool "MCF5206"
133	depends on !MMU
134	select COLDFIRE_SW_A7
135	select COLDFIRE_TIMERS
136	select HAVE_MBAR
137	select CPU_NO_EFFICIENT_FFS
138	help
139	  Motorola ColdFire 5206 processor support.
140
141config M5206e
142	bool "MCF5206e"
143	depends on !MMU
144	select COLDFIRE_SW_A7
145	select COLDFIRE_TIMERS
146	select HAVE_MBAR
147	select CPU_NO_EFFICIENT_FFS
148	help
149	  Motorola ColdFire 5206e processor support.
150
151config M520x
152	bool "MCF520x"
153	depends on !MMU
154	select COLDFIRE_PIT_TIMER
155	select HAVE_CACHE_SPLIT
156	help
157	  Freescale Coldfire 5207/5208 processor support.
158
159config M523x
160	bool "MCF523x"
161	depends on !MMU
162	select COLDFIRE_PIT_TIMER
163	select HAVE_CACHE_SPLIT
164	select HAVE_IPSBAR
165	help
166	  Freescale Coldfire 5230/1/2/4/5 processor support
167
168config M5249
169	bool "MCF5249"
170	depends on !MMU
171	select COLDFIRE_SW_A7
172	select COLDFIRE_TIMERS
173	select HAVE_MBAR
174	select CPU_NO_EFFICIENT_FFS
175	help
176	  Motorola ColdFire 5249 processor support.
177
178config M525x
179	bool "MCF525x"
180	depends on !MMU
181	select COLDFIRE_SW_A7
182	select COLDFIRE_TIMERS
183	select HAVE_MBAR
184	select CPU_NO_EFFICIENT_FFS
185	help
186	  Freescale (Motorola) Coldfire 5251/5253 processor support.
187
188config M5271
189	bool "MCF5271"
190	depends on !MMU
191	select COLDFIRE_PIT_TIMER
192	select M527x
193	select HAVE_CACHE_SPLIT
194	select HAVE_IPSBAR
195	help
196	  Freescale (Motorola) ColdFire 5270/5271 processor support.
197
198config M5272
199	bool "MCF5272"
200	depends on !MMU
201	select COLDFIRE_SW_A7
202	select COLDFIRE_TIMERS
203	select HAVE_MBAR
204	select CPU_NO_EFFICIENT_FFS
205	help
206	  Motorola ColdFire 5272 processor support.
207
208config M5275
209	bool "MCF5275"
210	depends on !MMU
211	select COLDFIRE_PIT_TIMER
212	select M527x
213	select HAVE_CACHE_SPLIT
214	select HAVE_IPSBAR
215	help
216	  Freescale (Motorola) ColdFire 5274/5275 processor support.
217
218config M528x
219	bool "MCF528x"
220	depends on !MMU
221	select COLDFIRE_PIT_TIMER
222	select HAVE_CACHE_SPLIT
223	select HAVE_IPSBAR
224	help
225	  Motorola ColdFire 5280/5282 processor support.
226
227config M5307
228	bool "MCF5307"
229	depends on !MMU
230	select COLDFIRE_TIMERS
231	select COLDFIRE_SW_A7
232	select HAVE_CACHE_CB
233	select HAVE_MBAR
234	select CPU_NO_EFFICIENT_FFS
235	help
236	  Motorola ColdFire 5307 processor support.
237
238config M532x
239	bool "MCF532x"
240	depends on !MMU
241	select COLDFIRE_TIMERS
242	select M53xx
243	select HAVE_CACHE_CB
244	help
245	  Freescale (Motorola) ColdFire 532x processor support.
246
247config M537x
248	bool "MCF537x"
249	depends on !MMU
250	select COLDFIRE_TIMERS
251	select M53xx
252	select HAVE_CACHE_CB
253	help
254	  Freescale ColdFire 537x processor support.
255
256config M5407
257	bool "MCF5407"
258	depends on !MMU
259	select COLDFIRE_SW_A7
260	select COLDFIRE_TIMERS
261	select HAVE_CACHE_CB
262	select HAVE_MBAR
263	select CPU_NO_EFFICIENT_FFS
264	help
265	  Motorola ColdFire 5407 processor support.
266
267config M547x
268	bool "MCF547x"
269	select M54xx
270	select COLDFIRE_SLTIMERS
271	select MMU_COLDFIRE if MMU
272	select FPU if MMU
273	select HAVE_CACHE_CB
274	select HAVE_MBAR
275	select CPU_NO_EFFICIENT_FFS
276	help
277	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
278
279config M548x
280	bool "MCF548x"
281	select COLDFIRE_SLTIMERS
282	select MMU_COLDFIRE if MMU
283	select FPU if MMU
284	select M54xx
285	select HAVE_CACHE_CB
286	select HAVE_MBAR
287	select CPU_NO_EFFICIENT_FFS
288	help
289	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
290
291config M5441x
292	bool "MCF5441x"
293	select COLDFIRE_PIT_TIMER
294	select MMU_COLDFIRE if MMU
295	select HAVE_CACHE_CB
296	help
297	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
298
299endchoice
300
301config M527x
302	bool
303
304config M53xx
305	bool
306
307config M54xx
308	select HAVE_PCI
309	bool
310
311config COLDFIRE_PIT_TIMER
312	bool
313
314config COLDFIRE_TIMERS
315	bool
316	select LEGACY_TIMER_TICK
317
318config COLDFIRE_SLTIMERS
319	bool
320	select LEGACY_TIMER_TICK
321
322endif # COLDFIRE
323
324comment "Processor Specific Options"
325
326config M68KFPU_EMU
327	bool "Math emulation support"
328	depends on M68KCLASSIC && FPU
329	help
330	  At some point in the future, this will cause floating-point math
331	  instructions to be emulated by the kernel on machines that lack a
332	  floating-point math coprocessor.  Thrill-seekers and chronically
333	  sleep-deprived psychotic hacker types can say Y now, everyone else
334	  should probably wait a while.
335
336config M68KFPU_EMU_EXTRAPREC
337	bool "Math emulation extra precision"
338	depends on M68KFPU_EMU
339	help
340	  The fpu uses normally a few bit more during calculations for
341	  correct rounding, the emulator can (often) do the same but this
342	  extra calculation can cost quite some time, so you can disable
343	  it here. The emulator will then "only" calculate with a 64 bit
344	  mantissa and round slightly incorrect, what is more than enough
345	  for normal usage.
346
347config M68KFPU_EMU_ONLY
348	bool "Math emulation only kernel"
349	depends on M68KFPU_EMU
350	help
351	  This option prevents any floating-point instructions from being
352	  compiled into the kernel, thereby the kernel doesn't save any
353	  floating point context anymore during task switches, so this
354	  kernel will only be usable on machines without a floating-point
355	  math coprocessor. This makes the kernel a bit faster as no tests
356	  needs to be executed whether a floating-point instruction in the
357	  kernel should be executed or not.
358
359config ADVANCED
360	bool "Advanced configuration options"
361	depends on MMU
362	help
363	  This gives you access to some advanced options for the CPU. The
364	  defaults should be fine for most users, but these options may make
365	  it possible for you to improve performance somewhat if you know what
366	  you are doing.
367
368	  Note that the answer to this question won't directly affect the
369	  kernel: saying N will just cause the configurator to skip all
370	  the questions about these options.
371
372	  Most users should say N to this question.
373
374config RMW_INSNS
375	bool "Use read-modify-write instructions"
376	depends on ADVANCED && !CPU_HAS_NO_CAS
377	help
378	  This allows to use certain instructions that work with indivisible
379	  read-modify-write bus cycles. While this is faster than the
380	  workaround of disabling interrupts, it can conflict with DMA
381	  ( = direct memory access) on many Amiga systems, and it is also said
382	  to destabilize other machines. It is very likely that this will
383	  cause serious problems on any Amiga or Atari Medusa if set. The only
384	  configuration where it should work are 68030-based Ataris, where it
385	  apparently improves performance. But you've been warned! Unless you
386	  really know what you are doing, say N. Try Y only if you're quite
387	  adventurous.
388
389config SINGLE_MEMORY_CHUNK
390	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
391	depends on MMU
392	default y if SUN3 || MMU_COLDFIRE
393	help
394	  Ignore all but the first contiguous chunk of physical memory for VM
395	  purposes.  This will save a few bytes kernel size and may speed up
396	  some operations.
397	  When this option os set to N, you may want to lower "Maximum zone
398	  order" to save memory that could be wasted for unused memory map.
399	  Say N if not sure.
400
401config ARCH_FORCE_MAX_ORDER
402	int "Order of maximal physically contiguous allocations" if ADVANCED
403	depends on !SINGLE_MEMORY_CHUNK
404	default "10"
405	help
406	  The kernel page allocator limits the size of maximal physically
407	  contiguous allocations. The limit is called MAX_PAGE_ORDER and it
408	  defines the maximal power of two of number of pages that can be
409	  allocated as a single contiguous block. This option allows
410	  overriding the default setting when ability to allocate very
411	  large blocks of physically contiguous memory is required.
412
413	  For systems that have holes in their physical address space this
414	  value also defines the minimal size of the hole that allows
415	  freeing unused memory map.
416
417	  Don't change if unsure.
418
419config 060_WRITETHROUGH
420	bool "Use write-through caching for 68060 supervisor accesses"
421	depends on ADVANCED && M68060
422	help
423	  The 68060 generally uses copyback caching of recently accessed data.
424	  Copyback caching means that memory writes will be held in an on-chip
425	  cache and only written back to memory some time later.  Saying Y
426	  here will force supervisor (kernel) accesses to use writethrough
427	  caching.  Writethrough caching means that data is written to memory
428	  straight away, so that cache and memory data always agree.
429	  Writethrough caching is less efficient, but is needed for some
430	  drivers on 68060 based systems where the 68060 bus snooping signal
431	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
432	  this problem.
433
434config M68K_L2_CACHE
435	bool
436	depends on MAC
437	default y
438
439config CPU_HAS_NO_BITFIELDS
440	bool
441
442config CPU_HAS_NO_CAS
443	bool
444
445config CPU_HAS_NO_MULDIV64
446	bool
447
448config CPU_HAS_NO_UNALIGNED
449	bool
450
451config CPU_HAS_ADDRESS_SPACES
452	bool
453	select ALTERNATE_USER_ADDRESS_SPACE
454
455config FPU
456	bool
457
458config COLDFIRE_SW_A7
459	bool
460
461config HAVE_CACHE_SPLIT
462	bool
463
464config HAVE_CACHE_CB
465	bool
466
467config HAVE_MBAR
468	bool
469
470config HAVE_IPSBAR
471	bool
472
473config CLOCK_FREQ
474	int "Set the core clock frequency"
475	default "25000000" if M5206
476	default "54000000" if M5206e
477	default "166666666" if M520x
478	default "140000000" if M5249
479	default "150000000" if M527x || M523x
480	default "90000000" if M5307
481	default "50000000" if M5407
482	default "266000000" if M54xx
483	default "66666666"
484	depends on COLDFIRE
485	help
486	  Define the CPU clock frequency in use. This is the core clock
487	  frequency, it may or may not be the same as the external clock
488	  crystal fitted to your board. Some processors have an internal
489	  PLL and can have their frequency programmed at run time, others
490	  use internal dividers. In general the kernel won't setup a PLL
491	  if it is fitted (there are some exceptions). This value will be
492	  specific to the exact CPU that you are using.
493
494config OLDMASK
495	bool "Old mask 5307 (1H55J) silicon"
496	depends on M5307
497	help
498	  Build support for the older revision ColdFire 5307 silicon.
499	  Specifically this is the 1H55J mask revision.
500
501if HAVE_CACHE_SPLIT
502choice
503	prompt "Split Cache Configuration"
504	default CACHE_I
505
506config CACHE_I
507	bool "Instruction"
508	help
509	  Use all of the ColdFire CPU cache memory as an instruction cache.
510
511config CACHE_D
512	bool "Data"
513	help
514	  Use all of the ColdFire CPU cache memory as a data cache.
515
516config CACHE_BOTH
517	bool "Both"
518	help
519	  Split the ColdFire CPU cache, and use half as an instruction cache
520	  and half as a data cache.
521endchoice
522endif # HAVE_CACHE_SPLIT
523
524if HAVE_CACHE_CB
525choice
526	prompt "Data cache mode"
527	default CACHE_WRITETHRU
528
529config CACHE_WRITETHRU
530	bool "Write-through"
531	help
532	  The ColdFire CPU cache is set into Write-through mode.
533
534config CACHE_COPYBACK
535	bool "Copy-back"
536	help
537	  The ColdFire CPU cache is set into Copy-back mode.
538endchoice
539endif # HAVE_CACHE_CB
540
541# Coldfire cores that do not have a data cache configured can do coherent DMA.
542config COLDFIRE_COHERENT_DMA
543	bool
544	default y
545	depends on COLDFIRE
546	depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
547
548config M68K_NONCOHERENT_DMA
549	bool
550	default y
551	depends on HAS_DMA && !COLDFIRE_COHERENT_DMA
552