1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * bpf_jit.h: BPF JIT compiler for PPC 4 * 5 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 7 */ 8 #ifndef _BPF_JIT_H 9 #define _BPF_JIT_H 10 11 #ifndef __ASSEMBLER__ 12 13 #include <asm/types.h> 14 #include <asm/ppc-opcode.h> 15 #include <linux/build_bug.h> 16 17 /* 18 * We need at least 2 passes for proper code generation, and may need 19 * additional passes if code size changes between passes. 20 */ 21 #define CODEGEN_MIN_PASSES 2 22 #define CODEGEN_MAX_PASSES 3 23 24 #ifdef CONFIG_PPC64_ELF_ABI_V1 25 #define FUNCTION_DESCR_SIZE 24 26 #else 27 #define FUNCTION_DESCR_SIZE 0 28 #endif 29 30 #define CTX_NIA(ctx) ((unsigned long)ctx->idx * 4) 31 32 #define SZL sizeof(unsigned long) 33 #define BPF_INSN_SAFETY 64 34 #define BPF_PPC_TAILCALL 8 35 36 #define PLANT_INSTR(d, idx, instr) \ 37 do { if (d) { (d)[idx] = instr; } idx++; } while (0) 38 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 39 40 /* Long jump; (unconditional 'branch') */ 41 #define PPC_JMP(dest) \ 42 do { \ 43 long offset = (long)(dest) - CTX_NIA(ctx); \ 44 if ((dest) != 0 && !is_offset_in_branch_range(offset)) { \ 45 pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 46 return -ERANGE; \ 47 } \ 48 EMIT(PPC_RAW_BRANCH(offset)); \ 49 } while (0) 50 51 /* "cond" here covers BO:BI fields. */ 52 #define PPC_BCC_SHORT(cond, dest) \ 53 do { \ 54 long offset = (long)(dest) - CTX_NIA(ctx); \ 55 if ((dest) != 0 && !is_offset_in_cond_branch_range(offset)) { \ 56 pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 57 return -ERANGE; \ 58 } \ 59 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 60 } while (0) 61 62 /* When constant jump offset is known prior */ 63 #define PPC_BCC_CONST_SHORT(cond, offset) \ 64 do { \ 65 BUILD_BUG_ON(offset < -0x8000 || offset > 0x7fff || (offset & 0x3)); \ 66 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 67 } while (0) 68 69 /* 70 * Sign-extended 32-bit immediate load 71 * 72 * If this is a dummy pass (!image), account for 73 * maximum possible instructions. 74 */ 75 #define PPC_LI32(d, i) do { \ 76 if (!image) \ 77 ctx->idx += 2; \ 78 else { \ 79 if ((int)(uintptr_t)(i) >= -32768 && \ 80 (int)(uintptr_t)(i) < 32768) \ 81 EMIT(PPC_RAW_LI(d, i)); \ 82 else { \ 83 EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 84 if (IMM_L(i)) \ 85 EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 86 } \ 87 } } while (0) 88 89 #ifdef CONFIG_PPC64 90 91 /* If dummy pass (!image), account for maximum possible instructions */ 92 #define PPC_LI64(d, i) do { \ 93 if (!image) \ 94 ctx->idx += 5; \ 95 else { \ 96 if ((long)(i) >= -2147483648 && \ 97 (long)(i) < 2147483648) \ 98 PPC_LI32(d, i); \ 99 else { \ 100 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 101 EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 102 0xffff)); \ 103 else { \ 104 EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 105 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 106 EMIT(PPC_RAW_ORI(d, d, \ 107 ((uintptr_t)(i) >> 32) & 0xffff)); \ 108 } \ 109 EMIT(PPC_RAW_SLDI(d, d, 32)); \ 110 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 111 EMIT(PPC_RAW_ORIS(d, d, \ 112 ((uintptr_t)(i) >> 16) & 0xffff)); \ 113 if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 114 EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 115 0xffff)); \ 116 } \ 117 } } while (0) 118 #define PPC_LI_ADDR PPC_LI64 119 120 #ifndef CONFIG_PPC_KERNEL_PCREL 121 #define PPC64_LOAD_PACA() \ 122 EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc))) 123 #else 124 #define PPC64_LOAD_PACA() do {} while (0) 125 #endif 126 #else 127 #define PPC_LI64(d, i) BUILD_BUG() 128 #define PPC_LI_ADDR PPC_LI32 129 #define PPC64_LOAD_PACA() BUILD_BUG() 130 #endif 131 132 /* 133 * The fly in the ointment of code size changing from pass to pass is 134 * avoided by padding the short branch case with a NOP. If code size differs 135 * with different branch reaches we will have the issue of code moving from 136 * one pass to the next and will need a few passes to converge on a stable 137 * state. 138 */ 139 #define PPC_BCC(cond, dest) do { \ 140 if (is_offset_in_cond_branch_range((long)(dest) - CTX_NIA(ctx))) { \ 141 PPC_BCC_SHORT(cond, dest); \ 142 EMIT(PPC_RAW_NOP()); \ 143 } else { \ 144 /* Flip the 'T or F' bit to invert comparison */ \ 145 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, CTX_NIA(ctx) + 2*4); \ 146 PPC_JMP(dest); \ 147 } } while(0) 148 149 /* To create a branch condition, select a bit of cr0... */ 150 #define CR0_LT 0 151 #define CR0_GT 1 152 #define CR0_EQ 2 153 /* ...and modify BO[3] */ 154 #define COND_CMP_TRUE 0x100 155 #define COND_CMP_FALSE 0x000 156 /* Together, they make all required comparisons: */ 157 #define COND_GT (CR0_GT | COND_CMP_TRUE) 158 #define COND_GE (CR0_LT | COND_CMP_FALSE) 159 #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 160 #define COND_NE (CR0_EQ | COND_CMP_FALSE) 161 #define COND_LT (CR0_LT | COND_CMP_TRUE) 162 #define COND_LE (CR0_GT | COND_CMP_FALSE) 163 164 #define SEEN_FUNC 0x20000000 /* might call external helpers */ 165 #define SEEN_TAILCALL 0x40000000 /* uses tail calls */ 166 167 struct codegen_context { 168 /* 169 * This is used to track register usage as well 170 * as calls to external helpers. 171 * - register usage is tracked with corresponding 172 * bits (r3-r31) 173 * - rest of the bits can be used to track other 174 * things -- for now, we use bits 0 to 2 175 * encoded in SEEN_* macros above 176 */ 177 unsigned int seen; 178 unsigned int idx; 179 unsigned int stack_size; 180 int b2p[MAX_BPF_JIT_REG + 3]; 181 unsigned int exentry_idx; 182 unsigned int alt_exit_addr; 183 u64 arena_vm_start; 184 u64 user_vm_start; 185 bool is_subprog; 186 bool exception_boundary; 187 bool exception_cb; 188 void __percpu *priv_sp; 189 unsigned int priv_stack_size; 190 }; 191 192 /* Memory size & magic-value to detect private stack overflow/underflow */ 193 #define PRIV_STACK_GUARD_SZ 16 194 #define PRIV_STACK_GUARD_VAL 0xEB9F12345678eb9fULL 195 196 #define bpf_to_ppc(r) (ctx->b2p[r]) 197 198 #ifdef CONFIG_PPC64 199 #define PPC_RAW_CMPLLI(a, i) PPC_RAW_CMPLDI(a, i) 200 #else 201 #define PPC_RAW_CMPLLI(a, i) PPC_RAW_CMPLWI(a, i) 202 #endif 203 204 #ifdef CONFIG_PPC32 205 #define BPF_FIXUP_LEN 3 /* Three instructions => 12 bytes */ 206 #else 207 #define BPF_FIXUP_LEN 2 /* Two instructions => 8 bytes */ 208 #endif 209 210 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 211 { 212 return ctx->seen & (1 << (31 - i)); 213 } 214 215 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 216 { 217 ctx->seen |= 1 << (31 - i); 218 } 219 220 static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i) 221 { 222 ctx->seen &= ~(1 << (31 - i)); 223 } 224 225 void bpf_jit_init_reg_mapping(struct codegen_context *ctx); 226 int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func); 227 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx, 228 u32 *addrs, int pass, bool extra_pass); 229 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); 230 void bpf_jit_build_epilogue(u32 *image, u32 *fimage, struct codegen_context *ctx); 231 void bpf_jit_build_fentry_stubs(u32 *image, u32 *fimage, struct codegen_context *ctx); 232 void bpf_jit_realloc_regs(struct codegen_context *ctx); 233 int bpf_jit_emit_exit_insn(u32 *image, u32 *fimage, struct codegen_context *ctx, int tmp_reg, 234 long exit_addr); 235 void prepare_for_fsession_fentry(u32 *image, struct codegen_context *ctx, int cookie_cnt, 236 int cookie_off, int retval_off); 237 void store_func_meta(u32 *image, struct codegen_context *ctx, u64 func_meta, int func_meta_off); 238 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass, 239 struct codegen_context *ctx, int insn_idx, 240 int jmp_off, int dst_reg, u32 code); 241 #endif 242 243 #endif 244