1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2018 Chelsio Communications, Inc. */ 3 4 #ifndef __CHCR_IPSEC_H__ 5 #define __CHCR_IPSEC_H__ 6 7 #include "t4_hw.h" 8 #include "cxgb4.h" 9 #include "t4_msg.h" 10 #include "cxgb4_uld.h" 11 12 #include "chcr_core.h" 13 #include "chcr_algo.h" 14 #include "chcr_crypto.h" 15 16 #define CHIPSEC_DRV_MODULE_NAME "ch_ipsec" 17 #define CHIPSEC_DRV_VERSION "1.0.0.0-ko" 18 #define CHIPSEC_DRV_DESC "Chelsio T6 Crypto Ipsec offload Driver" 19 20 struct ipsec_uld_ctx { 21 struct list_head entry; 22 struct cxgb4_lld_info lldi; 23 }; 24 25 struct chcr_ipsec_req { 26 struct ulp_txpkt ulptx; 27 struct ulptx_idata sc_imm; 28 struct cpl_tx_sec_pdu sec_cpl; 29 struct _key_ctx key_ctx; 30 }; 31 32 struct chcr_ipsec_wr { 33 struct fw_ulptx_wr wreq; 34 struct chcr_ipsec_req req; 35 }; 36 37 #define ESN_IV_INSERT_OFFSET 12 38 struct chcr_ipsec_aadiv { 39 __be32 spi; 40 u8 seq_no[8]; 41 u8 iv[8]; 42 }; 43 44 struct ipsec_sa_entry { 45 int hmac_ctrl; 46 u16 esn; 47 u16 resv; 48 unsigned int enckey_len; 49 unsigned int kctx_len; 50 unsigned int authsize; 51 __be32 key_ctx_hdr; 52 char salt[MAX_SALT]; 53 char key[2 * AES_MAX_KEY_SIZE]; 54 }; 55 56 #endif /* __CHCR_IPSEC_H__ */ 57 58