1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28
29 #include <linux/delay.h>
30 #include <linux/i2c.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/slab.h>
34
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_crtc_helper.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_modeset_helper_vtables.h>
39 #include <drm/drm_print.h>
40
41 #include "psb_drv.h"
42 #include "psb_intel_drv.h"
43 #include "psb_intel_reg.h"
44 #include "psb_intel_sdvo_regs.h"
45
46 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
47 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
48 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
49 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
50
51 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
52 SDVO_TV_MASK)
53
54 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
55 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
56 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
57 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
58
59
60 static const char *tv_format_names[] = {
61 "NTSC_M" , "NTSC_J" , "NTSC_443",
62 "PAL_B" , "PAL_D" , "PAL_G" ,
63 "PAL_H" , "PAL_I" , "PAL_M" ,
64 "PAL_N" , "PAL_NC" , "PAL_60" ,
65 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
66 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
67 "SECAM_60"
68 };
69
70 struct psb_intel_sdvo {
71 struct gma_encoder base;
72
73 struct i2c_adapter *i2c;
74 u8 target_addr;
75
76 struct i2c_adapter ddc;
77
78 /* Register for the SDVO device: SDVOB or SDVOC */
79 int sdvo_reg;
80
81 /* Active outputs controlled by this SDVO output */
82 uint16_t controlled_output;
83
84 /*
85 * Capabilities of the SDVO device returned by
86 * i830_sdvo_get_capabilities()
87 */
88 struct psb_intel_sdvo_caps caps;
89
90 /* Pixel clock limitations reported by the SDVO device, in kHz */
91 int pixel_clock_min, pixel_clock_max;
92
93 /*
94 * For multiple function SDVO device,
95 * this is for current attached outputs.
96 */
97 uint16_t attached_output;
98
99 /**
100 * This is used to select the color range of RBG outputs in HDMI mode.
101 * It is only valid when using TMDS encoding and 8 bit per color mode.
102 */
103 uint32_t color_range;
104
105 /**
106 * This is set if we're going to treat the device as TV-out.
107 *
108 * While we have these nice friendly flags for output types that ought
109 * to decide this for us, the S-Video output on our HDMI+S-Video card
110 * shows up as RGB1 (VGA).
111 */
112 bool is_tv;
113
114 /* This is for current tv format name */
115 int tv_format_index;
116
117 /**
118 * This is set if we treat the device as HDMI, instead of DVI.
119 */
120 bool is_hdmi;
121 bool has_hdmi_monitor;
122 bool has_hdmi_audio;
123
124 /**
125 * This is set if we detect output of sdvo device as LVDS and
126 * have a valid fixed mode to use with the panel.
127 */
128 bool is_lvds;
129
130 /**
131 * This is sdvo fixed panel mode pointer
132 */
133 struct drm_display_mode *sdvo_lvds_fixed_mode;
134
135 /* DDC bus used by this SDVO encoder */
136 uint8_t ddc_bus;
137
138 u8 pixel_multiplier;
139
140 /* Input timings for adjusted_mode */
141 struct psb_intel_sdvo_dtd input_dtd;
142
143 /* Saved SDVO output states */
144 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
145 };
146
147 struct psb_intel_sdvo_connector {
148 struct gma_connector base;
149
150 /* Mark the type of connector */
151 uint16_t output_flag;
152
153 int force_audio;
154
155 /* This contains all current supported TV format */
156 u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
157 int format_supported_num;
158 struct drm_property *tv_format;
159
160 /* add the property for the SDVO-TV */
161 struct drm_property *left;
162 struct drm_property *right;
163 struct drm_property *top;
164 struct drm_property *bottom;
165 struct drm_property *hpos;
166 struct drm_property *vpos;
167 struct drm_property *contrast;
168 struct drm_property *saturation;
169 struct drm_property *hue;
170 struct drm_property *sharpness;
171 struct drm_property *flicker_filter;
172 struct drm_property *flicker_filter_adaptive;
173 struct drm_property *flicker_filter_2d;
174 struct drm_property *tv_chroma_filter;
175 struct drm_property *tv_luma_filter;
176 struct drm_property *dot_crawl;
177
178 /* add the property for the SDVO-TV/LVDS */
179 struct drm_property *brightness;
180
181 /* Add variable to record current setting for the above property */
182 u32 left_margin, right_margin, top_margin, bottom_margin;
183
184 /* this is to get the range of margin.*/
185 u32 max_hscan, max_vscan;
186 u32 max_hpos, cur_hpos;
187 u32 max_vpos, cur_vpos;
188 u32 cur_brightness, max_brightness;
189 u32 cur_contrast, max_contrast;
190 u32 cur_saturation, max_saturation;
191 u32 cur_hue, max_hue;
192 u32 cur_sharpness, max_sharpness;
193 u32 cur_flicker_filter, max_flicker_filter;
194 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
195 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
196 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
197 u32 cur_tv_luma_filter, max_tv_luma_filter;
198 u32 cur_dot_crawl, max_dot_crawl;
199 };
200
to_psb_intel_sdvo(struct drm_encoder * encoder)201 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
202 {
203 return container_of(encoder, struct psb_intel_sdvo, base.base);
204 }
205
intel_attached_sdvo(struct drm_connector * connector)206 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
207 {
208 return container_of(gma_attached_encoder(connector),
209 struct psb_intel_sdvo, base);
210 }
211
to_psb_intel_sdvo_connector(struct drm_connector * connector)212 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
213 {
214 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
215 }
216
217 static bool
218 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
219 static bool
220 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
221 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
222 int type);
223 static bool
224 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
225 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
226
227 /*
228 * Writes the SDVOB or SDVOC with the given value, but always writes both
229 * SDVOB and SDVOC to work around apparent hardware issues (according to
230 * comments in the BIOS).
231 */
psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo * psb_intel_sdvo,u32 val)232 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
233 {
234 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
235 u32 bval = val, cval = val;
236 int i, j;
237 int need_aux = IS_MRST(dev) ? 1 : 0;
238
239 for (j = 0; j <= need_aux; j++) {
240 if (psb_intel_sdvo->sdvo_reg == SDVOB)
241 cval = REG_READ_WITH_AUX(SDVOC, j);
242 else
243 bval = REG_READ_WITH_AUX(SDVOB, j);
244
245 /*
246 * Write the registers twice for luck. Sometimes,
247 * writing them only once doesn't appear to 'stick'.
248 * The BIOS does this too. Yay, magic
249 */
250 for (i = 0; i < 2; i++) {
251 REG_WRITE_WITH_AUX(SDVOB, bval, j);
252 REG_READ_WITH_AUX(SDVOB, j);
253 REG_WRITE_WITH_AUX(SDVOC, cval, j);
254 REG_READ_WITH_AUX(SDVOC, j);
255 }
256 }
257 }
258
psb_intel_sdvo_read_byte(struct psb_intel_sdvo * psb_intel_sdvo,u8 addr,u8 * ch)259 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
260 {
261 struct i2c_msg msgs[] = {
262 {
263 .addr = psb_intel_sdvo->target_addr,
264 .flags = 0,
265 .len = 1,
266 .buf = &addr,
267 },
268 {
269 .addr = psb_intel_sdvo->target_addr,
270 .flags = I2C_M_RD,
271 .len = 1,
272 .buf = ch,
273 }
274 };
275 int ret;
276
277 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
278 return true;
279
280 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
281 return false;
282 }
283
284 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
285 /** Mapping of command numbers to names, for debug output */
286 static const struct _sdvo_cmd_name {
287 u8 cmd;
288 const char *name;
289 } sdvo_cmd_names[] = {
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
333
334 /* Add the op code for SDVO enhancements */
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
379
380 /* HDMI op code */
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
401 };
402
403 #define IS_SDVOB(reg) (reg == SDVOB)
404 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
405
psb_intel_sdvo_debug_write(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * args,int args_len)406 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo,
407 u8 cmd, const void *args, int args_len)
408 {
409 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
410 int i, pos = 0;
411 char buffer[73];
412
413 #define BUF_PRINT(args...) \
414 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
415
416 for (i = 0; i < args_len; i++) {
417 BUF_PRINT("%02X ", ((u8 *)args)[i]);
418 }
419
420 for (; i < 8; i++) {
421 BUF_PRINT(" ");
422 }
423
424 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
425 if (cmd == sdvo_cmd_names[i].cmd) {
426 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
427 break;
428 }
429 }
430
431 if (i == ARRAY_SIZE(sdvo_cmd_names))
432 BUF_PRINT("(%02X)", cmd);
433
434 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1);
435 #undef BUF_PRINT
436
437 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(psb_intel_sdvo), cmd, buffer);
438 }
439
440 static const char *cmd_status_names[] = {
441 "Power on",
442 "Success",
443 "Not supported",
444 "Invalid arg",
445 "Pending",
446 "Target not specified",
447 "Scaling not supported"
448 };
449
450 #define MAX_ARG_LEN 32
451
psb_intel_sdvo_write_cmd(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * args,int args_len)452 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
453 const void *args, int args_len)
454 {
455 u8 buf[MAX_ARG_LEN*2 + 2], status;
456 struct i2c_msg msgs[MAX_ARG_LEN + 3];
457 int i, ret;
458
459 if (args_len > MAX_ARG_LEN) {
460 DRM_ERROR("Need to increase arg length\n");
461 return false;
462 }
463
464 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
465
466 for (i = 0; i < args_len; i++) {
467 msgs[i].addr = psb_intel_sdvo->target_addr;
468 msgs[i].flags = 0;
469 msgs[i].len = 2;
470 msgs[i].buf = buf + 2 *i;
471 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
472 buf[2*i + 1] = ((u8*)args)[i];
473 }
474 msgs[i].addr = psb_intel_sdvo->target_addr;
475 msgs[i].flags = 0;
476 msgs[i].len = 2;
477 msgs[i].buf = buf + 2*i;
478 buf[2*i + 0] = SDVO_I2C_OPCODE;
479 buf[2*i + 1] = cmd;
480
481 /* the following two are to read the response */
482 status = SDVO_I2C_CMD_STATUS;
483 msgs[i+1].addr = psb_intel_sdvo->target_addr;
484 msgs[i+1].flags = 0;
485 msgs[i+1].len = 1;
486 msgs[i+1].buf = &status;
487
488 msgs[i+2].addr = psb_intel_sdvo->target_addr;
489 msgs[i+2].flags = I2C_M_RD;
490 msgs[i+2].len = 1;
491 msgs[i+2].buf = &status;
492
493 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
494 if (ret < 0) {
495 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
496 return false;
497 }
498 if (ret != i+3) {
499 /* failure in I2C transfer */
500 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
501 return false;
502 }
503
504 return true;
505 }
506
psb_intel_sdvo_read_response(struct psb_intel_sdvo * psb_intel_sdvo,void * response,int response_len)507 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
508 void *response, int response_len)
509 {
510 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
511 char buffer[73];
512 int i, pos = 0;
513 u8 retry = 5;
514 u8 status;
515
516 /*
517 * The documentation states that all commands will be
518 * processed within 15µs, and that we need only poll
519 * the status byte a maximum of 3 times in order for the
520 * command to be complete.
521 *
522 * Check 5 times in case the hardware failed to read the docs.
523 */
524 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
525 SDVO_I2C_CMD_STATUS,
526 &status))
527 goto log_fail;
528
529 while ((status == SDVO_CMD_STATUS_PENDING ||
530 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
531 udelay(15);
532 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
533 SDVO_I2C_CMD_STATUS,
534 &status))
535 goto log_fail;
536 }
537
538 #define BUF_PRINT(args...) \
539 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
540
541 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
542 BUF_PRINT("(%s)", cmd_status_names[status]);
543 else
544 BUF_PRINT("(??? %d)", status);
545
546 if (status != SDVO_CMD_STATUS_SUCCESS)
547 goto log_fail;
548
549 /* Read the command response */
550 for (i = 0; i < response_len; i++) {
551 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
552 SDVO_I2C_RETURN_0 + i,
553 &((u8 *)response)[i]))
554 goto log_fail;
555 BUF_PRINT(" %02X", ((u8 *)response)[i]);
556 }
557
558 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1);
559 #undef BUF_PRINT
560
561 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(psb_intel_sdvo), buffer);
562 return true;
563
564 log_fail:
565 DRM_DEBUG_KMS("%s: R: ... failed %s\n",
566 SDVO_NAME(psb_intel_sdvo), buffer);
567 return false;
568 }
569
psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode * mode)570 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
571 {
572 if (mode->clock >= 100000)
573 return 1;
574 else if (mode->clock >= 50000)
575 return 2;
576 else
577 return 4;
578 }
579
psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo * psb_intel_sdvo,u8 ddc_bus)580 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
581 u8 ddc_bus)
582 {
583 /* This must be the immediately preceding write before the i2c xfer */
584 return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
585 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
586 &ddc_bus, 1);
587 }
588
psb_intel_sdvo_set_value(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,const void * data,int len)589 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
590 {
591 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
592 return false;
593
594 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
595 }
596
597 static bool
psb_intel_sdvo_get_value(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,void * value,int len)598 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
599 {
600 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
601 return false;
602
603 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
604 }
605
psb_intel_sdvo_set_target_input(struct psb_intel_sdvo * psb_intel_sdvo)606 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
607 {
608 struct psb_intel_sdvo_set_target_input_args targets = {0};
609 return psb_intel_sdvo_set_value(psb_intel_sdvo,
610 SDVO_CMD_SET_TARGET_INPUT,
611 &targets, sizeof(targets));
612 }
613
614 /*
615 * Return whether each input is trained.
616 *
617 * This function is making an assumption about the layout of the response,
618 * which should be checked against the docs.
619 */
psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo * psb_intel_sdvo,bool * input_1,bool * input_2)620 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
621 {
622 struct psb_intel_sdvo_get_trained_inputs_response response;
623
624 BUILD_BUG_ON(sizeof(response) != 1);
625 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
626 &response, sizeof(response)))
627 return false;
628
629 *input_1 = response.input0_trained;
630 *input_2 = response.input1_trained;
631 return true;
632 }
633
psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo * psb_intel_sdvo,u16 outputs)634 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
635 u16 outputs)
636 {
637 return psb_intel_sdvo_set_value(psb_intel_sdvo,
638 SDVO_CMD_SET_ACTIVE_OUTPUTS,
639 &outputs, sizeof(outputs));
640 }
641
psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo * psb_intel_sdvo,int mode)642 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
643 int mode)
644 {
645 u8 state = SDVO_ENCODER_STATE_ON;
646
647 switch (mode) {
648 case DRM_MODE_DPMS_ON:
649 state = SDVO_ENCODER_STATE_ON;
650 break;
651 case DRM_MODE_DPMS_STANDBY:
652 state = SDVO_ENCODER_STATE_STANDBY;
653 break;
654 case DRM_MODE_DPMS_SUSPEND:
655 state = SDVO_ENCODER_STATE_SUSPEND;
656 break;
657 case DRM_MODE_DPMS_OFF:
658 state = SDVO_ENCODER_STATE_OFF;
659 break;
660 }
661
662 return psb_intel_sdvo_set_value(psb_intel_sdvo,
663 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
664 }
665
psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo * psb_intel_sdvo,int * clock_min,int * clock_max)666 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
667 int *clock_min,
668 int *clock_max)
669 {
670 struct psb_intel_sdvo_pixel_clock_range clocks;
671
672 BUILD_BUG_ON(sizeof(clocks) != 4);
673 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
674 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
675 &clocks, sizeof(clocks)))
676 return false;
677
678 /* Convert the values from units of 10 kHz to kHz. */
679 *clock_min = clocks.min * 10;
680 *clock_max = clocks.max * 10;
681 return true;
682 }
683
psb_intel_sdvo_set_target_output(struct psb_intel_sdvo * psb_intel_sdvo,u16 outputs)684 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
685 u16 outputs)
686 {
687 return psb_intel_sdvo_set_value(psb_intel_sdvo,
688 SDVO_CMD_SET_TARGET_OUTPUT,
689 &outputs, sizeof(outputs));
690 }
691
psb_intel_sdvo_set_timing(struct psb_intel_sdvo * psb_intel_sdvo,u8 cmd,struct psb_intel_sdvo_dtd * dtd)692 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
693 struct psb_intel_sdvo_dtd *dtd)
694 {
695 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
696 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
697 }
698
psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)699 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
700 struct psb_intel_sdvo_dtd *dtd)
701 {
702 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
703 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
704 }
705
psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)706 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
707 struct psb_intel_sdvo_dtd *dtd)
708 {
709 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
710 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
711 }
712
713 static bool
psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,uint16_t clock,uint16_t width,uint16_t height)714 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
715 uint16_t clock,
716 uint16_t width,
717 uint16_t height)
718 {
719 struct psb_intel_sdvo_preferred_input_timing_args args;
720
721 memset(&args, 0, sizeof(args));
722 args.clock = clock;
723 args.width = width;
724 args.height = height;
725 args.interlace = 0;
726
727 if (psb_intel_sdvo->is_lvds &&
728 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
729 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
730 args.scaled = 1;
731
732 return psb_intel_sdvo_set_value(psb_intel_sdvo,
733 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
734 &args, sizeof(args));
735 }
736
psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_dtd * dtd)737 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
738 struct psb_intel_sdvo_dtd *dtd)
739 {
740 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
741 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
742 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
743 &dtd->part1, sizeof(dtd->part1)) &&
744 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
745 &dtd->part2, sizeof(dtd->part2));
746 }
747
psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo * psb_intel_sdvo,u8 val)748 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
749 {
750 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
751 }
752
psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd * dtd,const struct drm_display_mode * mode)753 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
754 const struct drm_display_mode *mode)
755 {
756 uint16_t width, height;
757 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
758 uint16_t h_sync_offset, v_sync_offset;
759
760 width = mode->crtc_hdisplay;
761 height = mode->crtc_vdisplay;
762
763 /* do some mode translations */
764 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
765 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
766
767 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
768 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
769
770 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
771 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
772
773 dtd->part1.clock = mode->clock / 10;
774 dtd->part1.h_active = width & 0xff;
775 dtd->part1.h_blank = h_blank_len & 0xff;
776 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
777 ((h_blank_len >> 8) & 0xf);
778 dtd->part1.v_active = height & 0xff;
779 dtd->part1.v_blank = v_blank_len & 0xff;
780 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
781 ((v_blank_len >> 8) & 0xf);
782
783 dtd->part2.h_sync_off = h_sync_offset & 0xff;
784 dtd->part2.h_sync_width = h_sync_len & 0xff;
785 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
786 (v_sync_len & 0xf);
787 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
788 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
789 ((v_sync_len & 0x30) >> 4);
790
791 dtd->part2.dtd_flags = 0x18;
792 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
793 dtd->part2.dtd_flags |= 0x2;
794 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
795 dtd->part2.dtd_flags |= 0x4;
796
797 dtd->part2.sdvo_flags = 0;
798 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
799 dtd->part2.reserved = 0;
800 }
801
psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,const struct psb_intel_sdvo_dtd * dtd)802 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
803 const struct psb_intel_sdvo_dtd *dtd)
804 {
805 mode->hdisplay = dtd->part1.h_active;
806 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
807 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
808 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
809 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
810 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
811 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
812 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
813
814 mode->vdisplay = dtd->part1.v_active;
815 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
816 mode->vsync_start = mode->vdisplay;
817 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
818 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
819 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
820 mode->vsync_end = mode->vsync_start +
821 (dtd->part2.v_sync_off_width & 0xf);
822 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
823 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
824 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
825
826 mode->clock = dtd->part1.clock * 10;
827
828 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
829 if (dtd->part2.dtd_flags & 0x2)
830 mode->flags |= DRM_MODE_FLAG_PHSYNC;
831 if (dtd->part2.dtd_flags & 0x4)
832 mode->flags |= DRM_MODE_FLAG_PVSYNC;
833 }
834
psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo * psb_intel_sdvo)835 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
836 {
837 struct psb_intel_sdvo_encode encode;
838
839 BUILD_BUG_ON(sizeof(encode) != 2);
840 return psb_intel_sdvo_get_value(psb_intel_sdvo,
841 SDVO_CMD_GET_SUPP_ENCODE,
842 &encode, sizeof(encode));
843 }
844
psb_intel_sdvo_set_encode(struct psb_intel_sdvo * psb_intel_sdvo,uint8_t mode)845 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
846 uint8_t mode)
847 {
848 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
849 }
850
psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo * psb_intel_sdvo,uint8_t mode)851 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
852 uint8_t mode)
853 {
854 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
855 }
856
857 #if 0
858 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
859 {
860 int i, j;
861 uint8_t set_buf_index[2];
862 uint8_t av_split;
863 uint8_t buf_size;
864 uint8_t buf[48];
865 uint8_t *pos;
866
867 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
868
869 for (i = 0; i <= av_split; i++) {
870 set_buf_index[0] = i; set_buf_index[1] = 0;
871 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
872 set_buf_index, 2);
873 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
874 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
875
876 pos = buf;
877 for (j = 0; j <= buf_size; j += 8) {
878 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
879 NULL, 0);
880 psb_intel_sdvo_read_response(encoder, pos, 8);
881 pos += 8;
882 }
883 }
884 }
885 #endif
886
psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo * psb_intel_sdvo)887 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
888 {
889 DRM_INFO("HDMI is not supported yet");
890
891 return false;
892 }
893
psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo * psb_intel_sdvo)894 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
895 {
896 struct psb_intel_sdvo_tv_format format;
897 uint32_t format_map;
898
899 format_map = 1 << psb_intel_sdvo->tv_format_index;
900 memset(&format, 0, sizeof(format));
901 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
902
903 BUILD_BUG_ON(sizeof(format) != 6);
904 return psb_intel_sdvo_set_value(psb_intel_sdvo,
905 SDVO_CMD_SET_TV_FORMAT,
906 &format, sizeof(format));
907 }
908
909 static bool
psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo * psb_intel_sdvo,const struct drm_display_mode * mode)910 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
911 const struct drm_display_mode *mode)
912 {
913 struct psb_intel_sdvo_dtd output_dtd;
914
915 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
916 psb_intel_sdvo->attached_output))
917 return false;
918
919 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
920 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
921 return false;
922
923 return true;
924 }
925
926 static bool
psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo * psb_intel_sdvo,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)927 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
928 const struct drm_display_mode *mode,
929 struct drm_display_mode *adjusted_mode)
930 {
931 /* Reset the input timing to the screen. Assume always input 0. */
932 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
933 return false;
934
935 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
936 mode->clock / 10,
937 mode->hdisplay,
938 mode->vdisplay))
939 return false;
940
941 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
942 &psb_intel_sdvo->input_dtd))
943 return false;
944
945 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
946
947 drm_mode_set_crtcinfo(adjusted_mode, 0);
948 return true;
949 }
950
psb_intel_sdvo_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)951 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
952 const struct drm_display_mode *mode,
953 struct drm_display_mode *adjusted_mode)
954 {
955 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
956
957 /* We need to construct preferred input timings based on our
958 * output timings. To do that, we have to set the output
959 * timings, even though this isn't really the right place in
960 * the sequence to do it. Oh well.
961 */
962 if (psb_intel_sdvo->is_tv) {
963 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
964 return false;
965
966 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
967 mode,
968 adjusted_mode);
969 } else if (psb_intel_sdvo->is_lvds) {
970 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
971 psb_intel_sdvo->sdvo_lvds_fixed_mode))
972 return false;
973
974 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
975 mode,
976 adjusted_mode);
977 }
978
979 /* Make the CRTC code factor in the SDVO pixel multiplier. The
980 * SDVO device will factor out the multiplier during mode_set.
981 */
982 psb_intel_sdvo->pixel_multiplier =
983 psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
984 adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;
985
986 return true;
987 }
988
psb_intel_sdvo_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)989 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
990 struct drm_display_mode *mode,
991 struct drm_display_mode *adjusted_mode)
992 {
993 struct drm_device *dev = encoder->dev;
994 struct drm_crtc *crtc = encoder->crtc;
995 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
996 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
997 u32 sdvox;
998 struct psb_intel_sdvo_in_out_map in_out;
999 struct psb_intel_sdvo_dtd input_dtd;
1000 int rate;
1001 int need_aux = IS_MRST(dev) ? 1 : 0;
1002
1003 if (!mode)
1004 return;
1005
1006 /* First, set the input mapping for the first input to our controlled
1007 * output. This is only correct if we're a single-input device, in
1008 * which case the first input is the output from the appropriate SDVO
1009 * channel on the motherboard. In a two-input device, the first input
1010 * will be SDVOB and the second SDVOC.
1011 */
1012 in_out.in0 = psb_intel_sdvo->attached_output;
1013 in_out.in1 = 0;
1014
1015 psb_intel_sdvo_set_value(psb_intel_sdvo,
1016 SDVO_CMD_SET_IN_OUT_MAP,
1017 &in_out, sizeof(in_out));
1018
1019 /* Set the output timings to the screen */
1020 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1021 psb_intel_sdvo->attached_output))
1022 return;
1023
1024 /* We have tried to get input timing in mode_fixup, and filled into
1025 * adjusted_mode.
1026 */
1027 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1028 input_dtd = psb_intel_sdvo->input_dtd;
1029 } else {
1030 /* Set the output timing to the screen */
1031 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1032 psb_intel_sdvo->attached_output))
1033 return;
1034
1035 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1036 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1037 }
1038
1039 /* Set the input timing to the screen. Assume always input 0. */
1040 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1041 return;
1042
1043 if (psb_intel_sdvo->has_hdmi_monitor) {
1044 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1045 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1046 SDVO_COLORIMETRY_RGB256);
1047 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1048 } else
1049 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1050
1051 if (psb_intel_sdvo->is_tv &&
1052 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1053 return;
1054
1055 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1056
1057 switch (psb_intel_sdvo->pixel_multiplier) {
1058 default:
1059 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1060 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1061 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1062 }
1063 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1064 return;
1065
1066 /* Set the SDVO control regs. */
1067 if (need_aux)
1068 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1069 else
1070 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1071
1072 switch (psb_intel_sdvo->sdvo_reg) {
1073 case SDVOB:
1074 sdvox &= SDVOB_PRESERVE_MASK;
1075 break;
1076 case SDVOC:
1077 sdvox &= SDVOC_PRESERVE_MASK;
1078 break;
1079 }
1080 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1081
1082 if (gma_crtc->pipe == 1)
1083 sdvox |= SDVO_PIPE_B_SELECT;
1084 if (psb_intel_sdvo->has_hdmi_audio)
1085 sdvox |= SDVO_AUDIO_ENABLE;
1086
1087 /* FIXME: Check if this is needed for PSB
1088 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1089 */
1090
1091 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1092 sdvox |= SDVO_STALL_SELECT;
1093 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1094 }
1095
psb_intel_sdvo_dpms(struct drm_encoder * encoder,int mode)1096 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1097 {
1098 struct drm_device *dev = encoder->dev;
1099 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1100 u32 temp;
1101 int i;
1102 int need_aux = IS_MRST(dev) ? 1 : 0;
1103
1104 switch (mode) {
1105 case DRM_MODE_DPMS_ON:
1106 DRM_DEBUG("DPMS_ON");
1107 break;
1108 case DRM_MODE_DPMS_OFF:
1109 DRM_DEBUG("DPMS_OFF");
1110 break;
1111 default:
1112 DRM_DEBUG("DPMS: %d", mode);
1113 }
1114
1115 if (mode != DRM_MODE_DPMS_ON) {
1116 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1117 if (0)
1118 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1119
1120 if (mode == DRM_MODE_DPMS_OFF) {
1121 if (need_aux)
1122 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1123 else
1124 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1125
1126 if ((temp & SDVO_ENABLE) != 0) {
1127 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1128 }
1129 }
1130 } else {
1131 bool input1, input2;
1132 u8 status;
1133
1134 if (need_aux)
1135 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1136 else
1137 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1138
1139 if ((temp & SDVO_ENABLE) == 0)
1140 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1141
1142 for (i = 0; i < 2; i++)
1143 gma_wait_for_vblank(dev);
1144
1145 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1146 /* Warn if the device reported failure to sync.
1147 * A lot of SDVO devices fail to notify of sync, but it's
1148 * a given it the status is a success, we succeeded.
1149 */
1150 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1151 DRM_DEBUG_KMS("First %s output reported failure to "
1152 "sync\n", SDVO_NAME(psb_intel_sdvo));
1153 }
1154
1155 if (0)
1156 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1157 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1158 }
1159 return;
1160 }
1161
psb_intel_sdvo_mode_valid(struct drm_connector * connector,const struct drm_display_mode * mode)1162 static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1163 const struct drm_display_mode *mode)
1164 {
1165 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1166
1167 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1168 return MODE_NO_DBLESCAN;
1169
1170 if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1171 return MODE_CLOCK_LOW;
1172
1173 if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1174 return MODE_CLOCK_HIGH;
1175
1176 if (psb_intel_sdvo->is_lvds) {
1177 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1178 return MODE_PANEL;
1179
1180 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1181 return MODE_PANEL;
1182 }
1183
1184 return MODE_OK;
1185 }
1186
psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_caps * caps)1187 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1188 {
1189 BUILD_BUG_ON(sizeof(*caps) != 8);
1190 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1191 SDVO_CMD_GET_DEVICE_CAPS,
1192 caps, sizeof(*caps)))
1193 return false;
1194
1195 DRM_DEBUG_KMS("SDVO capabilities:\n"
1196 " vendor_id: %d\n"
1197 " device_id: %d\n"
1198 " device_rev_id: %d\n"
1199 " sdvo_version_major: %d\n"
1200 " sdvo_version_minor: %d\n"
1201 " sdvo_inputs_mask: %d\n"
1202 " smooth_scaling: %d\n"
1203 " sharp_scaling: %d\n"
1204 " up_scaling: %d\n"
1205 " down_scaling: %d\n"
1206 " stall_support: %d\n"
1207 " output_flags: %d\n",
1208 caps->vendor_id,
1209 caps->device_id,
1210 caps->device_rev_id,
1211 caps->sdvo_version_major,
1212 caps->sdvo_version_minor,
1213 caps->sdvo_inputs_mask,
1214 caps->smooth_scaling,
1215 caps->sharp_scaling,
1216 caps->up_scaling,
1217 caps->down_scaling,
1218 caps->stall_support,
1219 caps->output_flags);
1220
1221 return true;
1222 }
1223
1224 static bool
psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo * psb_intel_sdvo)1225 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1226 {
1227 /* Is there more than one type of output? */
1228 int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1229 return caps & -caps;
1230 }
1231
1232 static struct edid *
psb_intel_sdvo_get_edid(struct drm_connector * connector)1233 psb_intel_sdvo_get_edid(struct drm_connector *connector)
1234 {
1235 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1236 return drm_get_edid(connector, &sdvo->ddc);
1237 }
1238
1239 /* Mac mini hack -- use the same DDC as the analog connector */
1240 static struct edid *
psb_intel_sdvo_get_analog_edid(struct drm_connector * connector)1241 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1242 {
1243 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1244
1245 return drm_get_edid(connector,
1246 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1247 }
1248
1249 static enum drm_connector_status
psb_intel_sdvo_hdmi_sink_detect(struct drm_connector * connector)1250 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1251 {
1252 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1253 enum drm_connector_status status;
1254 struct edid *edid;
1255
1256 edid = psb_intel_sdvo_get_edid(connector);
1257
1258 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1259 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1260
1261 /*
1262 * Don't use the 1 as the argument of DDC bus switch to get
1263 * the EDID. It is used for SDVO SPD ROM.
1264 */
1265 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1266 psb_intel_sdvo->ddc_bus = ddc;
1267 edid = psb_intel_sdvo_get_edid(connector);
1268 if (edid)
1269 break;
1270 }
1271 /*
1272 * If we found the EDID on the other bus,
1273 * assume that is the correct DDC bus.
1274 */
1275 if (edid == NULL)
1276 psb_intel_sdvo->ddc_bus = saved_ddc;
1277 }
1278
1279 /*
1280 * When there is no edid and no monitor is connected with VGA
1281 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1282 */
1283 if (edid == NULL)
1284 edid = psb_intel_sdvo_get_analog_edid(connector);
1285
1286 status = connector_status_unknown;
1287 if (edid != NULL) {
1288 /* DDC bus is shared, match EDID to connector type */
1289 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1290 status = connector_status_connected;
1291 if (psb_intel_sdvo->is_hdmi) {
1292 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1293 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1294 }
1295 } else
1296 status = connector_status_disconnected;
1297 kfree(edid);
1298 }
1299
1300 if (status == connector_status_connected) {
1301 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1302 if (psb_intel_sdvo_connector->force_audio)
1303 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1304 }
1305
1306 return status;
1307 }
1308
1309 static enum drm_connector_status
psb_intel_sdvo_detect(struct drm_connector * connector,bool force)1310 psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1311 {
1312 uint16_t response;
1313 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1314 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1315 enum drm_connector_status ret;
1316
1317 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1318 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1319 return connector_status_unknown;
1320
1321 /* add 30ms delay when the output type might be TV */
1322 if (psb_intel_sdvo->caps.output_flags &
1323 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1324 mdelay(30);
1325
1326 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1327 return connector_status_unknown;
1328
1329 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1330 response & 0xff, response >> 8,
1331 psb_intel_sdvo_connector->output_flag);
1332
1333 if (response == 0)
1334 return connector_status_disconnected;
1335
1336 psb_intel_sdvo->attached_output = response;
1337
1338 psb_intel_sdvo->has_hdmi_monitor = false;
1339 psb_intel_sdvo->has_hdmi_audio = false;
1340
1341 if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1342 ret = connector_status_disconnected;
1343 else if (IS_TMDS(psb_intel_sdvo_connector))
1344 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1345 else {
1346 struct edid *edid;
1347
1348 /* if we have an edid check it matches the connection */
1349 edid = psb_intel_sdvo_get_edid(connector);
1350 if (edid == NULL)
1351 edid = psb_intel_sdvo_get_analog_edid(connector);
1352 if (edid != NULL) {
1353 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1354 ret = connector_status_disconnected;
1355 else
1356 ret = connector_status_connected;
1357 kfree(edid);
1358 } else
1359 ret = connector_status_connected;
1360 }
1361
1362 /* May update encoder flag for like clock for SDVO TV, etc.*/
1363 if (ret == connector_status_connected) {
1364 psb_intel_sdvo->is_tv = false;
1365 psb_intel_sdvo->is_lvds = false;
1366 psb_intel_sdvo->base.needs_tv_clock = false;
1367
1368 if (response & SDVO_TV_MASK) {
1369 psb_intel_sdvo->is_tv = true;
1370 psb_intel_sdvo->base.needs_tv_clock = true;
1371 }
1372 if (response & SDVO_LVDS_MASK)
1373 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1374 }
1375
1376 return ret;
1377 }
1378
psb_intel_sdvo_get_ddc_modes(struct drm_connector * connector)1379 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1380 {
1381 struct edid *edid;
1382
1383 /* set the bus switch and get the modes */
1384 edid = psb_intel_sdvo_get_edid(connector);
1385
1386 /*
1387 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1388 * link between analog and digital outputs. So, if the regular SDVO
1389 * DDC fails, check to see if the analog output is disconnected, in
1390 * which case we'll look there for the digital DDC data.
1391 */
1392 if (edid == NULL)
1393 edid = psb_intel_sdvo_get_analog_edid(connector);
1394
1395 if (edid != NULL) {
1396 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1397 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1398 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1399
1400 if (connector_is_digital == monitor_is_digital) {
1401 drm_connector_update_edid_property(connector, edid);
1402 drm_add_edid_modes(connector, edid);
1403 }
1404
1405 kfree(edid);
1406 }
1407 }
1408
1409 /*
1410 * Set of SDVO TV modes.
1411 * Note! This is in reply order (see loop in get_tv_modes).
1412 * XXX: all 60Hz refresh?
1413 */
1414 static const struct drm_display_mode sdvo_tv_modes[] = {
1415 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1416 416, 0, 200, 201, 232, 233, 0,
1417 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1418 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1419 416, 0, 240, 241, 272, 273, 0,
1420 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1421 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1422 496, 0, 300, 301, 332, 333, 0,
1423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1424 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1425 736, 0, 350, 351, 382, 383, 0,
1426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1427 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1428 736, 0, 400, 401, 432, 433, 0,
1429 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1430 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1431 736, 0, 480, 481, 512, 513, 0,
1432 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1433 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1434 800, 0, 480, 481, 512, 513, 0,
1435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1436 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1437 800, 0, 576, 577, 608, 609, 0,
1438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1439 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1440 816, 0, 350, 351, 382, 383, 0,
1441 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1442 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1443 816, 0, 400, 401, 432, 433, 0,
1444 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1445 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1446 816, 0, 480, 481, 512, 513, 0,
1447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1449 816, 0, 540, 541, 572, 573, 0,
1450 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1451 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1452 816, 0, 576, 577, 608, 609, 0,
1453 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1454 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1455 864, 0, 576, 577, 608, 609, 0,
1456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1458 896, 0, 600, 601, 632, 633, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1461 928, 0, 624, 625, 656, 657, 0,
1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1464 1016, 0, 766, 767, 798, 799, 0,
1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1467 1120, 0, 768, 769, 800, 801, 0,
1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1470 1376, 0, 1024, 1025, 1056, 1057, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 };
1473
psb_intel_sdvo_get_tv_modes(struct drm_connector * connector)1474 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1475 {
1476 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1477 struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1478 uint32_t reply = 0, format_map = 0;
1479 int i;
1480
1481 /* Read the list of supported input resolutions for the selected TV
1482 * format.
1483 */
1484 format_map = 1 << psb_intel_sdvo->tv_format_index;
1485 memcpy(&tv_res, &format_map,
1486 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1487
1488 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1489 return;
1490
1491 BUILD_BUG_ON(sizeof(tv_res) != 3);
1492 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1493 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1494 &tv_res, sizeof(tv_res)))
1495 return;
1496 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1497 return;
1498
1499 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1500 if (reply & (1 << i)) {
1501 struct drm_display_mode *nmode;
1502 nmode = drm_mode_duplicate(connector->dev,
1503 &sdvo_tv_modes[i]);
1504 if (nmode)
1505 drm_mode_probed_add(connector, nmode);
1506 }
1507 }
1508
psb_intel_sdvo_get_lvds_modes(struct drm_connector * connector)1509 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1510 {
1511 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1512 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1513 struct drm_display_mode *newmode;
1514
1515 /*
1516 * Attempt to get the mode list from DDC.
1517 * Assume that the preferred modes are
1518 * arranged in priority order.
1519 */
1520 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1521 if (list_empty(&connector->probed_modes) == false)
1522 goto end;
1523
1524 /* Fetch modes from VBT */
1525 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1526 newmode = drm_mode_duplicate(connector->dev,
1527 dev_priv->sdvo_lvds_vbt_mode);
1528 if (newmode != NULL) {
1529 /* Guarantee the mode is preferred */
1530 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1531 DRM_MODE_TYPE_DRIVER);
1532 drm_mode_probed_add(connector, newmode);
1533 }
1534 }
1535
1536 end:
1537 list_for_each_entry(newmode, &connector->probed_modes, head) {
1538 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1539 psb_intel_sdvo->sdvo_lvds_fixed_mode =
1540 drm_mode_duplicate(connector->dev, newmode);
1541
1542 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1543 0);
1544
1545 psb_intel_sdvo->is_lvds = true;
1546 break;
1547 }
1548 }
1549
1550 }
1551
psb_intel_sdvo_get_modes(struct drm_connector * connector)1552 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1553 {
1554 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1555
1556 if (IS_TV(psb_intel_sdvo_connector))
1557 psb_intel_sdvo_get_tv_modes(connector);
1558 else if (IS_LVDS(psb_intel_sdvo_connector))
1559 psb_intel_sdvo_get_lvds_modes(connector);
1560 else
1561 psb_intel_sdvo_get_ddc_modes(connector);
1562
1563 return !list_empty(&connector->probed_modes);
1564 }
1565
psb_intel_sdvo_destroy(struct drm_connector * connector)1566 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1567 {
1568 struct gma_connector *gma_connector = to_gma_connector(connector);
1569
1570 drm_connector_cleanup(connector);
1571 kfree(gma_connector);
1572 }
1573
psb_intel_sdvo_detect_hdmi_audio(struct drm_connector * connector)1574 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1575 {
1576 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1577 struct edid *edid;
1578 bool has_audio = false;
1579
1580 if (!psb_intel_sdvo->is_hdmi)
1581 return false;
1582
1583 edid = psb_intel_sdvo_get_edid(connector);
1584 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1585 has_audio = drm_detect_monitor_audio(edid);
1586
1587 return has_audio;
1588 }
1589
1590 static int
psb_intel_sdvo_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)1591 psb_intel_sdvo_set_property(struct drm_connector *connector,
1592 struct drm_property *property,
1593 uint64_t val)
1594 {
1595 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1596 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1597 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1598 uint16_t temp_value;
1599 uint8_t cmd;
1600 int ret;
1601
1602 ret = drm_object_property_set_value(&connector->base, property, val);
1603 if (ret)
1604 return ret;
1605
1606 if (property == dev_priv->force_audio_property) {
1607 int i = val;
1608 bool has_audio;
1609
1610 if (i == psb_intel_sdvo_connector->force_audio)
1611 return 0;
1612
1613 psb_intel_sdvo_connector->force_audio = i;
1614
1615 if (i == 0)
1616 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1617 else
1618 has_audio = i > 0;
1619
1620 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1621 return 0;
1622
1623 psb_intel_sdvo->has_hdmi_audio = has_audio;
1624 goto done;
1625 }
1626
1627 if (property == dev_priv->broadcast_rgb_property) {
1628 if (val == !!psb_intel_sdvo->color_range)
1629 return 0;
1630
1631 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1632 goto done;
1633 }
1634
1635 #define CHECK_PROPERTY(name, NAME) \
1636 if (psb_intel_sdvo_connector->name == property) { \
1637 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1638 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1639 cmd = SDVO_CMD_SET_##NAME; \
1640 psb_intel_sdvo_connector->cur_##name = temp_value; \
1641 goto set_value; \
1642 }
1643
1644 if (property == psb_intel_sdvo_connector->tv_format) {
1645 if (val >= ARRAY_SIZE(tv_format_names))
1646 return -EINVAL;
1647
1648 if (psb_intel_sdvo->tv_format_index ==
1649 psb_intel_sdvo_connector->tv_format_supported[val])
1650 return 0;
1651
1652 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1653 goto done;
1654 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1655 temp_value = val;
1656 if (psb_intel_sdvo_connector->left == property) {
1657 drm_object_property_set_value(&connector->base,
1658 psb_intel_sdvo_connector->right, val);
1659 if (psb_intel_sdvo_connector->left_margin == temp_value)
1660 return 0;
1661
1662 psb_intel_sdvo_connector->left_margin = temp_value;
1663 psb_intel_sdvo_connector->right_margin = temp_value;
1664 temp_value = psb_intel_sdvo_connector->max_hscan -
1665 psb_intel_sdvo_connector->left_margin;
1666 cmd = SDVO_CMD_SET_OVERSCAN_H;
1667 goto set_value;
1668 } else if (psb_intel_sdvo_connector->right == property) {
1669 drm_object_property_set_value(&connector->base,
1670 psb_intel_sdvo_connector->left, val);
1671 if (psb_intel_sdvo_connector->right_margin == temp_value)
1672 return 0;
1673
1674 psb_intel_sdvo_connector->left_margin = temp_value;
1675 psb_intel_sdvo_connector->right_margin = temp_value;
1676 temp_value = psb_intel_sdvo_connector->max_hscan -
1677 psb_intel_sdvo_connector->left_margin;
1678 cmd = SDVO_CMD_SET_OVERSCAN_H;
1679 goto set_value;
1680 } else if (psb_intel_sdvo_connector->top == property) {
1681 drm_object_property_set_value(&connector->base,
1682 psb_intel_sdvo_connector->bottom, val);
1683 if (psb_intel_sdvo_connector->top_margin == temp_value)
1684 return 0;
1685
1686 psb_intel_sdvo_connector->top_margin = temp_value;
1687 psb_intel_sdvo_connector->bottom_margin = temp_value;
1688 temp_value = psb_intel_sdvo_connector->max_vscan -
1689 psb_intel_sdvo_connector->top_margin;
1690 cmd = SDVO_CMD_SET_OVERSCAN_V;
1691 goto set_value;
1692 } else if (psb_intel_sdvo_connector->bottom == property) {
1693 drm_object_property_set_value(&connector->base,
1694 psb_intel_sdvo_connector->top, val);
1695 if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1696 return 0;
1697
1698 psb_intel_sdvo_connector->top_margin = temp_value;
1699 psb_intel_sdvo_connector->bottom_margin = temp_value;
1700 temp_value = psb_intel_sdvo_connector->max_vscan -
1701 psb_intel_sdvo_connector->top_margin;
1702 cmd = SDVO_CMD_SET_OVERSCAN_V;
1703 goto set_value;
1704 }
1705 CHECK_PROPERTY(hpos, HPOS)
1706 CHECK_PROPERTY(vpos, VPOS)
1707 CHECK_PROPERTY(saturation, SATURATION)
1708 CHECK_PROPERTY(contrast, CONTRAST)
1709 CHECK_PROPERTY(hue, HUE)
1710 CHECK_PROPERTY(brightness, BRIGHTNESS)
1711 CHECK_PROPERTY(sharpness, SHARPNESS)
1712 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1713 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1714 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1715 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1716 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1717 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1718 }
1719
1720 return -EINVAL; /* unknown property */
1721
1722 set_value:
1723 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1724 return -EIO;
1725
1726
1727 done:
1728 if (psb_intel_sdvo->base.base.crtc) {
1729 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1730 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1731 crtc->y, crtc->primary->fb);
1732 }
1733
1734 return 0;
1735 #undef CHECK_PROPERTY
1736 }
1737
psb_intel_sdvo_save(struct drm_connector * connector)1738 static void psb_intel_sdvo_save(struct drm_connector *connector)
1739 {
1740 struct drm_device *dev = connector->dev;
1741 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1742 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1743
1744 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1745 }
1746
psb_intel_sdvo_restore(struct drm_connector * connector)1747 static void psb_intel_sdvo_restore(struct drm_connector *connector)
1748 {
1749 struct drm_device *dev = connector->dev;
1750 struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1751 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1752 struct drm_crtc *crtc = encoder->crtc;
1753
1754 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1755
1756 /* Force a full mode set on the crtc. We're supposed to have the
1757 mode_config lock already. */
1758 if (connector->status == connector_status_connected)
1759 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1760 NULL);
1761 }
1762
1763 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1764 .dpms = psb_intel_sdvo_dpms,
1765 .mode_fixup = psb_intel_sdvo_mode_fixup,
1766 .prepare = gma_encoder_prepare,
1767 .mode_set = psb_intel_sdvo_mode_set,
1768 .commit = gma_encoder_commit,
1769 };
1770
1771 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1772 .dpms = drm_helper_connector_dpms,
1773 .detect = psb_intel_sdvo_detect,
1774 .fill_modes = drm_helper_probe_single_connector_modes,
1775 .set_property = psb_intel_sdvo_set_property,
1776 .destroy = psb_intel_sdvo_destroy,
1777 };
1778
1779 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1780 .get_modes = psb_intel_sdvo_get_modes,
1781 .mode_valid = psb_intel_sdvo_mode_valid,
1782 .best_encoder = gma_best_encoder,
1783 };
1784
psb_intel_sdvo_enc_destroy(struct drm_encoder * encoder)1785 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1786 {
1787 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1788
1789 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1790 drm_mode_destroy(encoder->dev,
1791 psb_intel_sdvo->sdvo_lvds_fixed_mode);
1792
1793 i2c_del_adapter(&psb_intel_sdvo->ddc);
1794 gma_encoder_destroy(encoder);
1795 }
1796
1797 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1798 .destroy = psb_intel_sdvo_enc_destroy,
1799 };
1800
1801 static void
psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo * sdvo)1802 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1803 {
1804 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1805 * We need to figure out if this is true for all available poulsbo
1806 * hardware, or if we need to fiddle with the guessing code above.
1807 * The problem might go away if we can parse sdvo mappings from bios */
1808 sdvo->ddc_bus = 2;
1809
1810 #if 0
1811 uint16_t mask = 0;
1812 unsigned int num_bits;
1813
1814 /* Make a mask of outputs less than or equal to our own priority in the
1815 * list.
1816 */
1817 switch (sdvo->controlled_output) {
1818 case SDVO_OUTPUT_LVDS1:
1819 mask |= SDVO_OUTPUT_LVDS1;
1820 case SDVO_OUTPUT_LVDS0:
1821 mask |= SDVO_OUTPUT_LVDS0;
1822 case SDVO_OUTPUT_TMDS1:
1823 mask |= SDVO_OUTPUT_TMDS1;
1824 case SDVO_OUTPUT_TMDS0:
1825 mask |= SDVO_OUTPUT_TMDS0;
1826 case SDVO_OUTPUT_RGB1:
1827 mask |= SDVO_OUTPUT_RGB1;
1828 case SDVO_OUTPUT_RGB0:
1829 mask |= SDVO_OUTPUT_RGB0;
1830 break;
1831 }
1832
1833 /* Count bits to find what number we are in the priority list. */
1834 mask &= sdvo->caps.output_flags;
1835 num_bits = hweight16(mask);
1836 /* If more than 3 outputs, default to DDC bus 3 for now. */
1837 if (num_bits > 3)
1838 num_bits = 3;
1839
1840 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1841 sdvo->ddc_bus = 1 << num_bits;
1842 #endif
1843 }
1844
1845 /*
1846 * Choose the appropriate DDC bus for control bus switch command for this
1847 * SDVO output based on the controlled output.
1848 *
1849 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1850 * outputs, then LVDS outputs.
1851 */
1852 static void
psb_intel_sdvo_select_ddc_bus(struct drm_psb_private * dev_priv,struct psb_intel_sdvo * sdvo,u32 reg)1853 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1854 struct psb_intel_sdvo *sdvo, u32 reg)
1855 {
1856 struct sdvo_device_mapping *mapping;
1857
1858 if (IS_SDVOB(reg))
1859 mapping = &(dev_priv->sdvo_mappings[0]);
1860 else
1861 mapping = &(dev_priv->sdvo_mappings[1]);
1862
1863 if (mapping->initialized)
1864 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1865 else
1866 psb_intel_sdvo_guess_ddc_bus(sdvo);
1867 }
1868
1869 static void
psb_intel_sdvo_select_i2c_bus(struct drm_psb_private * dev_priv,struct psb_intel_sdvo * sdvo,u32 reg)1870 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1871 struct psb_intel_sdvo *sdvo, u32 reg)
1872 {
1873 struct sdvo_device_mapping *mapping;
1874 u8 pin, speed;
1875
1876 if (IS_SDVOB(reg))
1877 mapping = &dev_priv->sdvo_mappings[0];
1878 else
1879 mapping = &dev_priv->sdvo_mappings[1];
1880
1881 pin = GMBUS_PORT_DPB;
1882 speed = GMBUS_RATE_1MHZ >> 8;
1883 if (mapping->initialized) {
1884 pin = mapping->i2c_pin;
1885 speed = mapping->i2c_speed;
1886 }
1887
1888 if (pin < GMBUS_NUM_PORTS) {
1889 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1890 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1891 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1892 } else
1893 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1894 }
1895
1896 static bool
psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo * psb_intel_sdvo,int device)1897 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1898 {
1899 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1900 }
1901
1902 static u8
psb_intel_sdvo_get_target_addr(struct drm_device * dev,int sdvo_reg)1903 psb_intel_sdvo_get_target_addr(struct drm_device *dev, int sdvo_reg)
1904 {
1905 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
1906 struct sdvo_device_mapping *my_mapping, *other_mapping;
1907
1908 if (IS_SDVOB(sdvo_reg)) {
1909 my_mapping = &dev_priv->sdvo_mappings[0];
1910 other_mapping = &dev_priv->sdvo_mappings[1];
1911 } else {
1912 my_mapping = &dev_priv->sdvo_mappings[1];
1913 other_mapping = &dev_priv->sdvo_mappings[0];
1914 }
1915
1916 /* If the BIOS described our SDVO device, take advantage of it. */
1917 if (my_mapping->target_addr)
1918 return my_mapping->target_addr;
1919
1920 /* If the BIOS only described a different SDVO device, use the
1921 * address that it isn't using.
1922 */
1923 if (other_mapping->target_addr) {
1924 if (other_mapping->target_addr == 0x70)
1925 return 0x72;
1926 else
1927 return 0x70;
1928 }
1929
1930 /* No SDVO device info is found for another DVO port,
1931 * so use mapping assumption we had before BIOS parsing.
1932 */
1933 if (IS_SDVOB(sdvo_reg))
1934 return 0x70;
1935 else
1936 return 0x72;
1937 }
1938
1939 static void
psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector * connector,struct psb_intel_sdvo * encoder)1940 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
1941 struct psb_intel_sdvo *encoder)
1942 {
1943 drm_connector_init(encoder->base.base.dev,
1944 &connector->base.base,
1945 &psb_intel_sdvo_connector_funcs,
1946 connector->base.base.connector_type);
1947
1948 drm_connector_helper_add(&connector->base.base,
1949 &psb_intel_sdvo_connector_helper_funcs);
1950
1951 connector->base.base.interlace_allowed = 0;
1952 connector->base.base.doublescan_allowed = 0;
1953 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1954
1955 connector->base.save = psb_intel_sdvo_save;
1956 connector->base.restore = psb_intel_sdvo_restore;
1957
1958 gma_connector_attach_encoder(&connector->base, &encoder->base);
1959 }
1960
1961 static void
psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector * connector)1962 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
1963 {
1964 /* FIXME: We don't support HDMI at the moment
1965 struct drm_device *dev = connector->base.base.dev;
1966
1967 intel_attach_force_audio_property(&connector->base.base);
1968 intel_attach_broadcast_rgb_property(&connector->base.base);
1969 */
1970 }
1971
1972 static bool
psb_intel_sdvo_dvi_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)1973 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1974 {
1975 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1976 struct drm_connector *connector;
1977 struct gma_connector *intel_connector;
1978 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1979
1980 psb_intel_sdvo_connector = kzalloc_obj(struct psb_intel_sdvo_connector);
1981 if (!psb_intel_sdvo_connector)
1982 return false;
1983
1984 if (device == 0) {
1985 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
1986 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
1987 } else if (device == 1) {
1988 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
1989 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
1990 }
1991
1992 intel_connector = &psb_intel_sdvo_connector->base;
1993 connector = &intel_connector->base;
1994 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
1995 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
1996 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
1997
1998 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
1999 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2000 psb_intel_sdvo->is_hdmi = true;
2001 }
2002 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2003 (1 << INTEL_ANALOG_CLONE_BIT));
2004
2005 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2006 if (psb_intel_sdvo->is_hdmi)
2007 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2008
2009 return true;
2010 }
2011
2012 static bool
psb_intel_sdvo_tv_init(struct psb_intel_sdvo * psb_intel_sdvo,int type)2013 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2014 {
2015 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2016 struct drm_connector *connector;
2017 struct gma_connector *intel_connector;
2018 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2019
2020 psb_intel_sdvo_connector = kzalloc_obj(struct psb_intel_sdvo_connector);
2021 if (!psb_intel_sdvo_connector)
2022 return false;
2023
2024 intel_connector = &psb_intel_sdvo_connector->base;
2025 connector = &intel_connector->base;
2026 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2027 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2028
2029 psb_intel_sdvo->controlled_output |= type;
2030 psb_intel_sdvo_connector->output_flag = type;
2031
2032 psb_intel_sdvo->is_tv = true;
2033 psb_intel_sdvo->base.needs_tv_clock = true;
2034 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2035
2036 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2037
2038 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2039 goto err;
2040
2041 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2042 goto err;
2043
2044 return true;
2045
2046 err:
2047 psb_intel_sdvo_destroy(connector);
2048 return false;
2049 }
2050
2051 static bool
psb_intel_sdvo_analog_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)2052 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2053 {
2054 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2055 struct drm_connector *connector;
2056 struct gma_connector *intel_connector;
2057 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2058
2059 psb_intel_sdvo_connector = kzalloc_obj(struct psb_intel_sdvo_connector);
2060 if (!psb_intel_sdvo_connector)
2061 return false;
2062
2063 intel_connector = &psb_intel_sdvo_connector->base;
2064 connector = &intel_connector->base;
2065 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2066 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2067 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2068
2069 if (device == 0) {
2070 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2071 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2072 } else if (device == 1) {
2073 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2074 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2075 }
2076
2077 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2078 (1 << INTEL_ANALOG_CLONE_BIT));
2079
2080 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2081 psb_intel_sdvo);
2082 return true;
2083 }
2084
2085 static bool
psb_intel_sdvo_lvds_init(struct psb_intel_sdvo * psb_intel_sdvo,int device)2086 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2087 {
2088 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2089 struct drm_connector *connector;
2090 struct gma_connector *intel_connector;
2091 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2092
2093 psb_intel_sdvo_connector = kzalloc_obj(struct psb_intel_sdvo_connector);
2094 if (!psb_intel_sdvo_connector)
2095 return false;
2096
2097 intel_connector = &psb_intel_sdvo_connector->base;
2098 connector = &intel_connector->base;
2099 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2100 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2101
2102 if (device == 0) {
2103 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2104 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2105 } else if (device == 1) {
2106 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2107 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2108 }
2109
2110 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2111 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2112
2113 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2114 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2115 goto err;
2116
2117 return true;
2118
2119 err:
2120 psb_intel_sdvo_destroy(connector);
2121 return false;
2122 }
2123
2124 static bool
psb_intel_sdvo_output_setup(struct psb_intel_sdvo * psb_intel_sdvo,uint16_t flags)2125 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2126 {
2127 psb_intel_sdvo->is_tv = false;
2128 psb_intel_sdvo->base.needs_tv_clock = false;
2129 psb_intel_sdvo->is_lvds = false;
2130
2131 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2132
2133 if (flags & SDVO_OUTPUT_TMDS0)
2134 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2135 return false;
2136
2137 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2138 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2139 return false;
2140
2141 /* TV has no XXX1 function block */
2142 if (flags & SDVO_OUTPUT_SVID0)
2143 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2144 return false;
2145
2146 if (flags & SDVO_OUTPUT_CVBS0)
2147 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2148 return false;
2149
2150 if (flags & SDVO_OUTPUT_RGB0)
2151 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2152 return false;
2153
2154 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2155 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2156 return false;
2157
2158 if (flags & SDVO_OUTPUT_LVDS0)
2159 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2160 return false;
2161
2162 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2163 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2164 return false;
2165
2166 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2167 unsigned char bytes[2];
2168
2169 psb_intel_sdvo->controlled_output = 0;
2170 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2171 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2172 SDVO_NAME(psb_intel_sdvo),
2173 bytes[0], bytes[1]);
2174 return false;
2175 }
2176 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2177
2178 return true;
2179 }
2180
psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,int type)2181 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2182 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2183 int type)
2184 {
2185 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2186 struct psb_intel_sdvo_tv_format format;
2187 uint32_t format_map, i;
2188
2189 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2190 return false;
2191
2192 BUILD_BUG_ON(sizeof(format) != 6);
2193 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2194 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2195 &format, sizeof(format)))
2196 return false;
2197
2198 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2199
2200 if (format_map == 0)
2201 return false;
2202
2203 psb_intel_sdvo_connector->format_supported_num = 0;
2204 for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2205 if (format_map & (1 << i))
2206 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2207
2208
2209 psb_intel_sdvo_connector->tv_format =
2210 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2211 "mode", psb_intel_sdvo_connector->format_supported_num);
2212 if (!psb_intel_sdvo_connector->tv_format)
2213 return false;
2214
2215 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2216 drm_property_add_enum(
2217 psb_intel_sdvo_connector->tv_format,
2218 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2219
2220 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2221 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2222 psb_intel_sdvo_connector->tv_format, 0);
2223 return true;
2224
2225 }
2226
2227 #define ENHANCEMENT(name, NAME) do { \
2228 if (enhancements.name) { \
2229 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2230 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2231 return false; \
2232 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2233 psb_intel_sdvo_connector->cur_##name = response; \
2234 psb_intel_sdvo_connector->name = \
2235 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2236 if (!psb_intel_sdvo_connector->name) return false; \
2237 drm_object_attach_property(&connector->base, \
2238 psb_intel_sdvo_connector->name, \
2239 psb_intel_sdvo_connector->cur_##name); \
2240 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2241 data_value[0], data_value[1], response); \
2242 } \
2243 } while(0)
2244
2245 static bool
psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,struct psb_intel_sdvo_enhancements_reply enhancements)2246 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2247 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2248 struct psb_intel_sdvo_enhancements_reply enhancements)
2249 {
2250 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2251 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2252 uint16_t response, data_value[2];
2253
2254 /* when horizontal overscan is supported, Add the left/right property */
2255 if (enhancements.overscan_h) {
2256 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2257 SDVO_CMD_GET_MAX_OVERSCAN_H,
2258 &data_value, 4))
2259 return false;
2260
2261 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2262 SDVO_CMD_GET_OVERSCAN_H,
2263 &response, 2))
2264 return false;
2265
2266 psb_intel_sdvo_connector->max_hscan = data_value[0];
2267 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2268 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2269 psb_intel_sdvo_connector->left =
2270 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2271 if (!psb_intel_sdvo_connector->left)
2272 return false;
2273
2274 drm_object_attach_property(&connector->base,
2275 psb_intel_sdvo_connector->left,
2276 psb_intel_sdvo_connector->left_margin);
2277
2278 psb_intel_sdvo_connector->right =
2279 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2280 if (!psb_intel_sdvo_connector->right)
2281 return false;
2282
2283 drm_object_attach_property(&connector->base,
2284 psb_intel_sdvo_connector->right,
2285 psb_intel_sdvo_connector->right_margin);
2286 DRM_DEBUG_KMS("h_overscan: max %d, "
2287 "default %d, current %d\n",
2288 data_value[0], data_value[1], response);
2289 }
2290
2291 if (enhancements.overscan_v) {
2292 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2293 SDVO_CMD_GET_MAX_OVERSCAN_V,
2294 &data_value, 4))
2295 return false;
2296
2297 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2298 SDVO_CMD_GET_OVERSCAN_V,
2299 &response, 2))
2300 return false;
2301
2302 psb_intel_sdvo_connector->max_vscan = data_value[0];
2303 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2304 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2305 psb_intel_sdvo_connector->top =
2306 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2307 if (!psb_intel_sdvo_connector->top)
2308 return false;
2309
2310 drm_object_attach_property(&connector->base,
2311 psb_intel_sdvo_connector->top,
2312 psb_intel_sdvo_connector->top_margin);
2313
2314 psb_intel_sdvo_connector->bottom =
2315 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2316 if (!psb_intel_sdvo_connector->bottom)
2317 return false;
2318
2319 drm_object_attach_property(&connector->base,
2320 psb_intel_sdvo_connector->bottom,
2321 psb_intel_sdvo_connector->bottom_margin);
2322 DRM_DEBUG_KMS("v_overscan: max %d, "
2323 "default %d, current %d\n",
2324 data_value[0], data_value[1], response);
2325 }
2326
2327 ENHANCEMENT(hpos, HPOS);
2328 ENHANCEMENT(vpos, VPOS);
2329 ENHANCEMENT(saturation, SATURATION);
2330 ENHANCEMENT(contrast, CONTRAST);
2331 ENHANCEMENT(hue, HUE);
2332 ENHANCEMENT(sharpness, SHARPNESS);
2333 ENHANCEMENT(brightness, BRIGHTNESS);
2334 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2335 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2336 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2337 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2338 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2339
2340 if (enhancements.dot_crawl) {
2341 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2342 return false;
2343
2344 psb_intel_sdvo_connector->max_dot_crawl = 1;
2345 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2346 psb_intel_sdvo_connector->dot_crawl =
2347 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2348 if (!psb_intel_sdvo_connector->dot_crawl)
2349 return false;
2350
2351 drm_object_attach_property(&connector->base,
2352 psb_intel_sdvo_connector->dot_crawl,
2353 psb_intel_sdvo_connector->cur_dot_crawl);
2354 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2355 }
2356
2357 return true;
2358 }
2359
2360 static bool
psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector,struct psb_intel_sdvo_enhancements_reply enhancements)2361 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2362 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2363 struct psb_intel_sdvo_enhancements_reply enhancements)
2364 {
2365 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2366 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2367 uint16_t response, data_value[2];
2368
2369 ENHANCEMENT(brightness, BRIGHTNESS);
2370
2371 return true;
2372 }
2373 #undef ENHANCEMENT
2374
psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo * psb_intel_sdvo,struct psb_intel_sdvo_connector * psb_intel_sdvo_connector)2375 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2376 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2377 {
2378 union {
2379 struct psb_intel_sdvo_enhancements_reply reply;
2380 uint16_t response;
2381 } enhancements;
2382
2383 BUILD_BUG_ON(sizeof(enhancements) != 2);
2384
2385 enhancements.response = 0;
2386 psb_intel_sdvo_get_value(psb_intel_sdvo,
2387 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2388 &enhancements, sizeof(enhancements));
2389 if (enhancements.response == 0) {
2390 DRM_DEBUG_KMS("No enhancement is supported\n");
2391 return true;
2392 }
2393
2394 if (IS_TV(psb_intel_sdvo_connector))
2395 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2396 else if(IS_LVDS(psb_intel_sdvo_connector))
2397 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2398 else
2399 return true;
2400 }
2401
psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter * adapter,struct i2c_msg * msgs,int num)2402 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2403 struct i2c_msg *msgs,
2404 int num)
2405 {
2406 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2407
2408 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2409 return -EIO;
2410
2411 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2412 }
2413
psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter * adapter)2414 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2415 {
2416 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2417 return sdvo->i2c->algo->functionality(sdvo->i2c);
2418 }
2419
2420 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2421 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer,
2422 .functionality = psb_intel_sdvo_ddc_proxy_func
2423 };
2424
2425 static bool
psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo * sdvo,struct drm_device * dev)2426 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2427 struct drm_device *dev)
2428 {
2429 sdvo->ddc.owner = THIS_MODULE;
2430 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2431 sdvo->ddc.dev.parent = dev->dev;
2432 sdvo->ddc.algo_data = sdvo;
2433 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2434
2435 return i2c_add_adapter(&sdvo->ddc) == 0;
2436 }
2437
psb_intel_sdvo_init(struct drm_device * dev,int sdvo_reg)2438 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2439 {
2440 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
2441 struct gma_encoder *gma_encoder;
2442 struct psb_intel_sdvo *psb_intel_sdvo;
2443 int i;
2444
2445 psb_intel_sdvo = kzalloc_obj(struct psb_intel_sdvo);
2446 if (!psb_intel_sdvo)
2447 return false;
2448
2449 psb_intel_sdvo->sdvo_reg = sdvo_reg;
2450 psb_intel_sdvo->target_addr = psb_intel_sdvo_get_target_addr(dev, sdvo_reg) >> 1;
2451 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2452 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2453 kfree(psb_intel_sdvo);
2454 return false;
2455 }
2456
2457 /* encoder type will be decided later */
2458 gma_encoder = &psb_intel_sdvo->base;
2459 gma_encoder->type = INTEL_OUTPUT_SDVO;
2460 drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2461 0, NULL);
2462
2463 /* Read the regs to test if we can talk to the device */
2464 for (i = 0; i < 0x40; i++) {
2465 u8 byte;
2466
2467 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2468 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2469 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2470 goto err;
2471 }
2472 }
2473
2474 if (IS_SDVOB(sdvo_reg))
2475 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2476 else
2477 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2478
2479 drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2480
2481 /* In default case sdvo lvds is false */
2482 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2483 goto err;
2484
2485 if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2486 psb_intel_sdvo->caps.output_flags) != true) {
2487 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2488 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2489 goto err;
2490 }
2491
2492 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2493
2494 /* Set the input timing to the screen. Assume always input 0. */
2495 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2496 goto err;
2497
2498 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2499 &psb_intel_sdvo->pixel_clock_min,
2500 &psb_intel_sdvo->pixel_clock_max))
2501 goto err;
2502
2503 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2504 "clock range %dMHz - %dMHz, "
2505 "input 1: %c, input 2: %c, "
2506 "output 1: %c, output 2: %c\n",
2507 SDVO_NAME(psb_intel_sdvo),
2508 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2509 psb_intel_sdvo->caps.device_rev_id,
2510 psb_intel_sdvo->pixel_clock_min / 1000,
2511 psb_intel_sdvo->pixel_clock_max / 1000,
2512 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2513 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2514 /* check currently supported outputs */
2515 psb_intel_sdvo->caps.output_flags &
2516 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2517 psb_intel_sdvo->caps.output_flags &
2518 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2519 return true;
2520
2521 err:
2522 drm_encoder_cleanup(&gma_encoder->base);
2523 i2c_del_adapter(&psb_intel_sdvo->ddc);
2524 kfree(psb_intel_sdvo);
2525
2526 return false;
2527 }
2528