xref: /linux/include/dt-bindings/clock/qcom,sc8180x-camcc.h (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SC8180X_H
7 #define _DT_BINDINGS_CLK_QCOM_CAM_CC_SC8180X_H
8 
9 /* CAM_CC clocks */
10 #define CAM_CC_BPS_AHB_CLK					0
11 #define CAM_CC_BPS_AREG_CLK					1
12 #define CAM_CC_BPS_AXI_CLK					2
13 #define CAM_CC_BPS_CLK						3
14 #define CAM_CC_BPS_CLK_SRC					4
15 #define CAM_CC_CAMNOC_AXI_CLK					5
16 #define CAM_CC_CAMNOC_AXI_CLK_SRC				6
17 #define CAM_CC_CAMNOC_DCD_XO_CLK				7
18 #define CAM_CC_CCI_0_CLK					8
19 #define CAM_CC_CCI_0_CLK_SRC					9
20 #define CAM_CC_CCI_1_CLK					10
21 #define CAM_CC_CCI_1_CLK_SRC					11
22 #define CAM_CC_CCI_2_CLK					12
23 #define CAM_CC_CCI_2_CLK_SRC					13
24 #define CAM_CC_CCI_3_CLK					14
25 #define CAM_CC_CCI_3_CLK_SRC					15
26 #define CAM_CC_CORE_AHB_CLK					16
27 #define CAM_CC_CPAS_AHB_CLK					17
28 #define CAM_CC_CPHY_RX_CLK_SRC					18
29 #define CAM_CC_CSI0PHYTIMER_CLK					19
30 #define CAM_CC_CSI0PHYTIMER_CLK_SRC				20
31 #define CAM_CC_CSI1PHYTIMER_CLK					21
32 #define CAM_CC_CSI1PHYTIMER_CLK_SRC				22
33 #define CAM_CC_CSI2PHYTIMER_CLK					23
34 #define CAM_CC_CSI2PHYTIMER_CLK_SRC				24
35 #define CAM_CC_CSI3PHYTIMER_CLK					25
36 #define CAM_CC_CSI3PHYTIMER_CLK_SRC				26
37 #define CAM_CC_CSIPHY0_CLK					27
38 #define CAM_CC_CSIPHY1_CLK					28
39 #define CAM_CC_CSIPHY2_CLK					29
40 #define CAM_CC_CSIPHY3_CLK					30
41 #define CAM_CC_FAST_AHB_CLK_SRC					31
42 #define CAM_CC_FD_CORE_CLK					32
43 #define CAM_CC_FD_CORE_CLK_SRC					33
44 #define CAM_CC_FD_CORE_UAR_CLK					34
45 #define CAM_CC_ICP_AHB_CLK					35
46 #define CAM_CC_ICP_CLK						36
47 #define CAM_CC_ICP_CLK_SRC					37
48 #define CAM_CC_IFE_0_AXI_CLK					38
49 #define CAM_CC_IFE_0_CLK					39
50 #define CAM_CC_IFE_0_CLK_SRC					40
51 #define CAM_CC_IFE_0_CPHY_RX_CLK				41
52 #define CAM_CC_IFE_0_CSID_CLK					42
53 #define CAM_CC_IFE_0_CSID_CLK_SRC				43
54 #define CAM_CC_IFE_0_DSP_CLK					44
55 #define CAM_CC_IFE_1_AXI_CLK					45
56 #define CAM_CC_IFE_1_CLK					46
57 #define CAM_CC_IFE_1_CLK_SRC					47
58 #define CAM_CC_IFE_1_CPHY_RX_CLK				48
59 #define CAM_CC_IFE_1_CSID_CLK					49
60 #define CAM_CC_IFE_1_CSID_CLK_SRC				50
61 #define CAM_CC_IFE_1_DSP_CLK					51
62 #define CAM_CC_IFE_2_AXI_CLK					52
63 #define CAM_CC_IFE_2_CLK					53
64 #define CAM_CC_IFE_2_CLK_SRC					54
65 #define CAM_CC_IFE_2_CPHY_RX_CLK				55
66 #define CAM_CC_IFE_2_CSID_CLK					56
67 #define CAM_CC_IFE_2_CSID_CLK_SRC				57
68 #define CAM_CC_IFE_2_DSP_CLK					58
69 #define CAM_CC_IFE_3_AXI_CLK					59
70 #define CAM_CC_IFE_3_CLK					60
71 #define CAM_CC_IFE_3_CLK_SRC					61
72 #define CAM_CC_IFE_3_CPHY_RX_CLK				62
73 #define CAM_CC_IFE_3_CSID_CLK					63
74 #define CAM_CC_IFE_3_CSID_CLK_SRC				64
75 #define CAM_CC_IFE_3_DSP_CLK					65
76 #define CAM_CC_IFE_LITE_0_CLK					66
77 #define CAM_CC_IFE_LITE_0_CLK_SRC				67
78 #define CAM_CC_IFE_LITE_0_CPHY_RX_CLK				68
79 #define CAM_CC_IFE_LITE_0_CSID_CLK				69
80 #define CAM_CC_IFE_LITE_0_CSID_CLK_SRC				70
81 #define CAM_CC_IFE_LITE_1_CLK					71
82 #define CAM_CC_IFE_LITE_1_CLK_SRC				72
83 #define CAM_CC_IFE_LITE_1_CPHY_RX_CLK				73
84 #define CAM_CC_IFE_LITE_1_CSID_CLK				74
85 #define CAM_CC_IFE_LITE_1_CSID_CLK_SRC				75
86 #define CAM_CC_IFE_LITE_2_CLK					76
87 #define CAM_CC_IFE_LITE_2_CLK_SRC				77
88 #define CAM_CC_IFE_LITE_2_CPHY_RX_CLK				78
89 #define CAM_CC_IFE_LITE_2_CSID_CLK				79
90 #define CAM_CC_IFE_LITE_2_CSID_CLK_SRC				80
91 #define CAM_CC_IFE_LITE_3_CLK					81
92 #define CAM_CC_IFE_LITE_3_CLK_SRC				82
93 #define CAM_CC_IFE_LITE_3_CPHY_RX_CLK				83
94 #define CAM_CC_IFE_LITE_3_CSID_CLK				84
95 #define CAM_CC_IFE_LITE_3_CSID_CLK_SRC				85
96 #define CAM_CC_IPE_0_AHB_CLK					86
97 #define CAM_CC_IPE_0_AREG_CLK					87
98 #define CAM_CC_IPE_0_AXI_CLK					88
99 #define CAM_CC_IPE_0_CLK					89
100 #define CAM_CC_IPE_0_CLK_SRC					90
101 #define CAM_CC_IPE_1_AHB_CLK					91
102 #define CAM_CC_IPE_1_AREG_CLK					92
103 #define CAM_CC_IPE_1_AXI_CLK					93
104 #define CAM_CC_IPE_1_CLK					94
105 #define CAM_CC_JPEG_CLK						95
106 #define CAM_CC_JPEG_CLK_SRC					96
107 #define CAM_CC_LRME_CLK						97
108 #define CAM_CC_LRME_CLK_SRC					98
109 #define CAM_CC_MCLK0_CLK					99
110 #define CAM_CC_MCLK0_CLK_SRC					100
111 #define CAM_CC_MCLK1_CLK					101
112 #define CAM_CC_MCLK1_CLK_SRC					102
113 #define CAM_CC_MCLK2_CLK					103
114 #define CAM_CC_MCLK2_CLK_SRC					104
115 #define CAM_CC_MCLK3_CLK					105
116 #define CAM_CC_MCLK3_CLK_SRC					106
117 #define CAM_CC_MCLK4_CLK					107
118 #define CAM_CC_MCLK4_CLK_SRC					108
119 #define CAM_CC_MCLK5_CLK					109
120 #define CAM_CC_MCLK5_CLK_SRC					110
121 #define CAM_CC_MCLK6_CLK					111
122 #define CAM_CC_MCLK6_CLK_SRC					112
123 #define CAM_CC_MCLK7_CLK					113
124 #define CAM_CC_MCLK7_CLK_SRC					114
125 #define CAM_CC_PLL0						115
126 #define CAM_CC_PLL0_OUT_EVEN					116
127 #define CAM_CC_PLL0_OUT_ODD					117
128 #define CAM_CC_PLL1						118
129 #define CAM_CC_PLL2						119
130 #define CAM_CC_PLL2_OUT_MAIN					120
131 #define CAM_CC_PLL3						121
132 #define CAM_CC_PLL4						122
133 #define CAM_CC_PLL5						123
134 #define CAM_CC_PLL6						124
135 #define CAM_CC_SLOW_AHB_CLK_SRC					125
136 #define CAM_CC_XO_CLK_SRC					126
137 
138 
139 /* CAM_CC power domains */
140 #define BPS_GDSC						0
141 #define IFE_0_GDSC						1
142 #define IFE_1_GDSC						2
143 #define IFE_2_GDSC						3
144 #define IFE_3_GDSC						4
145 #define IPE_0_GDSC						5
146 #define IPE_1_GDSC						6
147 #define TITAN_TOP_GDSC						7
148 
149 /* CAM_CC resets */
150 #define CAM_CC_BPS_BCR						0
151 #define CAM_CC_CAMNOC_BCR					1
152 #define CAM_CC_CCI_BCR						2
153 #define CAM_CC_CPAS_BCR						3
154 #define CAM_CC_CSI0PHY_BCR					4
155 #define CAM_CC_CSI1PHY_BCR					5
156 #define CAM_CC_CSI2PHY_BCR					6
157 #define CAM_CC_CSI3PHY_BCR					7
158 #define CAM_CC_FD_BCR						8
159 #define CAM_CC_ICP_BCR						9
160 #define CAM_CC_IFE_0_BCR					10
161 #define CAM_CC_IFE_1_BCR					11
162 #define CAM_CC_IFE_2_BCR					12
163 #define CAM_CC_IFE_3_BCR					13
164 #define CAM_CC_IFE_LITE_0_BCR					14
165 #define CAM_CC_IFE_LITE_1_BCR					15
166 #define CAM_CC_IFE_LITE_2_BCR					16
167 #define CAM_CC_IFE_LITE_3_BCR					17
168 #define CAM_CC_IPE_0_BCR					18
169 #define CAM_CC_IPE_1_BCR					19
170 #define CAM_CC_JPEG_BCR						20
171 #define CAM_CC_LRME_BCR						21
172 #define CAM_CC_MCLK0_BCR					22
173 #define CAM_CC_MCLK1_BCR					23
174 #define CAM_CC_MCLK2_BCR					24
175 #define CAM_CC_MCLK3_BCR					25
176 #define CAM_CC_MCLK4_BCR					26
177 #define CAM_CC_MCLK5_BCR					27
178 #define CAM_CC_MCLK6_BCR					28
179 #define CAM_CC_MCLK7_BCR					29
180 
181 #endif
182