| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 162 const MachineOperand *BaseOp; in runOnMachineFunction() local
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| H A D | AArch64InstrInfo.cpp | 2706 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
3491 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMemAbsolute.cpp | 131 const MachineOperand *BaseOp = nullptr; in runOnMachineFunction() local
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| H A D | HexagonOptAddrMode.cpp | 432 MachineOperand BaseOp = MI->getOperand(getBaseOpPosition(MI)); in processAddUses() local
498 MachineOperand &BaseOp = UseMI->getOperand(getBaseOpPosition(UseMI)); in updateAddUses() local
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| H A D | HexagonInstrInfo.cpp | 1173 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1188 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1211 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
1227 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
3077 const MachineOperand *BaseOp = getBaseAndOffset(LdSt, Offset, Width); in getMemOperandsWithOffsetWidth() local
3316 const MachineOperand &BaseOp = MI.getOperand(BasePos); in getBaseAndOffset() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 755 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
811 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1624 const MachineOperand &BaseOp = MI.getOperand(2); in MergeBaseUpdateLSDouble() local
1770 const MachineOperand &BaseOp = MI->getOperand(2); in FixInvalidRegPairOp() local
3019 unsigned BaseOp = getBaseOperandIndex(*MI); in AdjustBaseAndOffset() local
3160 int BaseOp = getBaseOperandIndex(Use); in DistributeIncrements() local
3218 int BaseOp = getBaseOperandIndex(*PrePostInc); in DistributeIncrements() local
3239 unsigned BaseOp = getBaseOperandIndex(*Use); in DistributeIncrements() local
3289 int BaseOp = getBaseOperandIndex(MI); in DistributeIncrements() local
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| H A D | ARMHazardRecognizer.cpp | 109 static bool getBaseOffset(const MachineInstr &MI, const MachineOperand *&BaseOp, in getBaseOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 133 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1; in checkADDrr() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1425 const MachineInstr &MI, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffset()
1593 const MachineOperand *BaseOp; in describeLoadedValue() local
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| H A D | MachineSink.cpp | 1359 const MachineOperand *BaseOp; in SinkingPreventsImplicitNullCheck() local
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| H A D | ModuloSchedule.cpp | 929 const MachineOperand *BaseOp; in computeDelta() local
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| H A D | MachinePipeliner.cpp | 2570 const MachineOperand *BaseOp; in computeDelta() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4278 unsigned BaseOp = 0; in lowerXALUO() local
4304 unsigned BaseOp = 0; in lowerXALUO() local
4371 unsigned BaseOp = 0; in lowerUADDSUBO_CARRY() local
4401 unsigned BaseOp = 0; in lowerUADDSUBO_CARRY() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4498 auto &BaseOp = MemI.getOperand(MemRefBegin + X86::AddrBaseReg); in getAddrModeFromMemoryOp() local
4625 const MachineOperand *BaseOp = in getMemOperandsWithOffsetWidth() local
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| H A D | X86ISelLowering.cpp | 23961 unsigned BaseOp = 0; in getX86XALUOOp() local
54292 SDValue BaseOp = LHS.getOperand(0); in combineSetCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1574 unsigned BaseOp = 0; in lowerOverflowArithmetic() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2640 const MachineOperand *BaseOp; getMemOperandsWithOffsetWidth() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2841 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 5808 const MCOperand &BaseOp = Inst.getOperand(2); in expandSaaAddr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 365 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 7981 unsigned BaseOp; in lowerAddSubSatToMinMax() local
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