1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2025 Broadcom */ 3 4 #ifndef _BNGE_NETDEV_H_ 5 #define _BNGE_NETDEV_H_ 6 7 #include <linux/bnxt/hsi.h> 8 9 struct tx_bd { 10 __le32 tx_bd_len_flags_type; 11 #define TX_BD_TYPE (0x3f << 0) 12 #define TX_BD_TYPE_SHORT_TX_BD (0x00 << 0) 13 #define TX_BD_TYPE_LONG_TX_BD (0x10 << 0) 14 #define TX_BD_FLAGS_PACKET_END (1 << 6) 15 #define TX_BD_FLAGS_NO_CMPL (1 << 7) 16 #define TX_BD_FLAGS_BD_CNT (0x1f << 8) 17 #define TX_BD_FLAGS_BD_CNT_SHIFT 8 18 #define TX_BD_FLAGS_LHINT (3 << 13) 19 #define TX_BD_FLAGS_LHINT_SHIFT 13 20 #define TX_BD_FLAGS_LHINT_512_AND_SMALLER (0 << 13) 21 #define TX_BD_FLAGS_LHINT_512_TO_1023 (1 << 13) 22 #define TX_BD_FLAGS_LHINT_1024_TO_2047 (2 << 13) 23 #define TX_BD_FLAGS_LHINT_2048_AND_LARGER (3 << 13) 24 #define TX_BD_FLAGS_COAL_NOW (1 << 15) 25 #define TX_BD_LEN (0xffff << 16) 26 #define TX_BD_LEN_SHIFT 16 27 u32 tx_bd_opaque; 28 __le64 tx_bd_haddr; 29 } __packed; 30 31 struct rx_bd { 32 __le32 rx_bd_len_flags_type; 33 #define RX_BD_TYPE (0x3f << 0) 34 #define RX_BD_TYPE_RX_PACKET_BD 0x4 35 #define RX_BD_TYPE_RX_BUFFER_BD 0x5 36 #define RX_BD_TYPE_RX_AGG_BD 0x6 37 #define RX_BD_TYPE_16B_BD_SIZE (0 << 4) 38 #define RX_BD_TYPE_32B_BD_SIZE (1 << 4) 39 #define RX_BD_TYPE_48B_BD_SIZE (2 << 4) 40 #define RX_BD_TYPE_64B_BD_SIZE (3 << 4) 41 #define RX_BD_FLAGS_SOP (1 << 6) 42 #define RX_BD_FLAGS_EOP (1 << 7) 43 #define RX_BD_FLAGS_BUFFERS (3 << 8) 44 #define RX_BD_FLAGS_1_BUFFER_PACKET (0 << 8) 45 #define RX_BD_FLAGS_2_BUFFER_PACKET (1 << 8) 46 #define RX_BD_FLAGS_3_BUFFER_PACKET (2 << 8) 47 #define RX_BD_FLAGS_4_BUFFER_PACKET (3 << 8) 48 #define RX_BD_LEN (0xffff << 16) 49 #define RX_BD_LEN_SHIFT 16 50 u32 rx_bd_opaque; 51 __le64 rx_bd_haddr; 52 }; 53 54 struct tx_cmp { 55 __le32 tx_cmp_flags_type; 56 #define CMP_TYPE (0x3f << 0) 57 #define CMP_TYPE_TX_L2_CMP 0 58 #define CMP_TYPE_TX_L2_COAL_CMP 2 59 #define CMP_TYPE_TX_L2_PKT_TS_CMP 4 60 #define CMP_TYPE_RX_L2_CMP 17 61 #define CMP_TYPE_RX_AGG_CMP 18 62 #define CMP_TYPE_RX_L2_TPA_START_CMP 19 63 #define CMP_TYPE_RX_L2_TPA_END_CMP 21 64 #define CMP_TYPE_RX_TPA_AGG_CMP 22 65 #define CMP_TYPE_RX_L2_V3_CMP 23 66 #define CMP_TYPE_RX_L2_TPA_START_V3_CMP 25 67 #define CMP_TYPE_STATUS_CMP 32 68 #define CMP_TYPE_REMOTE_DRIVER_REQ 34 69 #define CMP_TYPE_REMOTE_DRIVER_RESP 36 70 #define CMP_TYPE_ERROR_STATUS 48 71 #define CMPL_BASE_TYPE_STAT_EJECT 0x1aUL 72 #define CMPL_BASE_TYPE_HWRM_DONE 0x20UL 73 #define CMPL_BASE_TYPE_HWRM_FWD_REQ 0x22UL 74 #define CMPL_BASE_TYPE_HWRM_FWD_RESP 0x24UL 75 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT 0x2eUL 76 #define TX_CMP_FLAGS_ERROR (1 << 6) 77 #define TX_CMP_FLAGS_PUSH (1 << 7) 78 u32 tx_cmp_opaque; 79 __le32 tx_cmp_errors_v; 80 #define TX_CMP_V (1 << 0) 81 #define TX_CMP_ERRORS_BUFFER_ERROR (7 << 1) 82 #define TX_CMP_ERRORS_BUFFER_ERROR_NO_ERROR 0 83 #define TX_CMP_ERRORS_BUFFER_ERROR_BAD_FORMAT 2 84 #define TX_CMP_ERRORS_BUFFER_ERROR_INVALID_STAG 4 85 #define TX_CMP_ERRORS_BUFFER_ERROR_STAG_BOUNDS 5 86 #define TX_CMP_ERRORS_ZERO_LENGTH_PKT (1 << 4) 87 #define TX_CMP_ERRORS_EXCESSIVE_BD_LEN (1 << 5) 88 #define TX_CMP_ERRORS_DMA_ERROR (1 << 6) 89 #define TX_CMP_ERRORS_HINT_TOO_SHORT (1 << 7) 90 __le32 sq_cons_idx; 91 #define TX_CMP_SQ_CONS_IDX_MASK 0x00ffffff 92 }; 93 94 struct bnge_sw_tx_bd { 95 struct sk_buff *skb; 96 DEFINE_DMA_UNMAP_ADDR(mapping); 97 DEFINE_DMA_UNMAP_LEN(len); 98 struct page *page; 99 u8 is_ts_pkt; 100 u8 is_push; 101 u8 action; 102 unsigned short nr_frags; 103 union { 104 u16 rx_prod; 105 u16 txts_prod; 106 }; 107 }; 108 109 struct bnge_sw_rx_bd { 110 void *data; 111 u8 *data_ptr; 112 dma_addr_t mapping; 113 }; 114 115 struct bnge_sw_rx_agg_bd { 116 struct page *page; 117 unsigned int offset; 118 dma_addr_t mapping; 119 }; 120 121 #define BNGE_RX_COPY_THRESH 256 122 123 #define BNGE_HW_FEATURE_VLAN_ALL_RX \ 124 (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX) 125 #define BNGE_HW_FEATURE_VLAN_ALL_TX \ 126 (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX) 127 128 enum { 129 BNGE_NET_EN_GRO = BIT(0), 130 BNGE_NET_EN_LRO = BIT(1), 131 BNGE_NET_EN_JUMBO = BIT(2), 132 }; 133 134 #define BNGE_NET_EN_TPA (BNGE_NET_EN_GRO | BNGE_NET_EN_LRO) 135 136 struct bnge_net { 137 struct bnge_dev *bd; 138 struct net_device *netdev; 139 140 u32 priv_flags; 141 142 u32 rx_ring_size; 143 u32 rx_buf_size; 144 u32 rx_buf_use_size; /* usable size */ 145 u32 rx_agg_ring_size; 146 u32 rx_copy_thresh; 147 u32 rx_ring_mask; 148 u32 rx_agg_ring_mask; 149 u16 rx_nr_pages; 150 u16 rx_agg_nr_pages; 151 152 u32 tx_ring_size; 153 u32 tx_ring_mask; 154 u16 tx_nr_pages; 155 156 /* NQs and Completion rings */ 157 u32 cp_ring_size; 158 u32 cp_ring_mask; 159 u32 cp_bit; 160 u16 cp_nr_pages; 161 162 #define BNGE_L2_FLTR_HASH_SIZE 32 163 #define BNGE_L2_FLTR_HASH_MASK (BNGE_L2_FLTR_HASH_SIZE - 1) 164 struct hlist_head l2_fltr_hash_tbl[BNGE_L2_FLTR_HASH_SIZE]; 165 u32 hash_seed; 166 u64 toeplitz_prefix; 167 }; 168 169 #define BNGE_DEFAULT_RX_RING_SIZE 511 170 #define BNGE_DEFAULT_TX_RING_SIZE 511 171 172 int bnge_netdev_alloc(struct bnge_dev *bd, int max_irqs); 173 void bnge_netdev_free(struct bnge_dev *bd); 174 void bnge_set_ring_params(struct bnge_dev *bd); 175 176 #if (BNGE_PAGE_SHIFT == 16) 177 #define MAX_RX_PAGES_AGG_ENA 1 178 #define MAX_RX_PAGES 4 179 #define MAX_RX_AGG_PAGES 4 180 #define MAX_TX_PAGES 1 181 #define MAX_CP_PAGES 16 182 #else 183 #define MAX_RX_PAGES_AGG_ENA 8 184 #define MAX_RX_PAGES 32 185 #define MAX_RX_AGG_PAGES 32 186 #define MAX_TX_PAGES 8 187 #define MAX_CP_PAGES 128 188 #endif 189 190 #define BNGE_RX_PAGE_SIZE (1 << BNGE_RX_PAGE_SHIFT) 191 192 #define RX_DESC_CNT (BNGE_PAGE_SIZE / sizeof(struct rx_bd)) 193 #define TX_DESC_CNT (BNGE_PAGE_SIZE / sizeof(struct tx_bd)) 194 #define CP_DESC_CNT (BNGE_PAGE_SIZE / sizeof(struct tx_cmp)) 195 #define SW_RXBD_RING_SIZE (sizeof(struct bnge_sw_rx_bd) * RX_DESC_CNT) 196 #define HW_RXBD_RING_SIZE (sizeof(struct rx_bd) * RX_DESC_CNT) 197 #define SW_RXBD_AGG_RING_SIZE (sizeof(struct bnge_sw_rx_agg_bd) * RX_DESC_CNT) 198 #define SW_TXBD_RING_SIZE (sizeof(struct bnge_sw_tx_bd) * TX_DESC_CNT) 199 #define HW_TXBD_RING_SIZE (sizeof(struct tx_bd) * TX_DESC_CNT) 200 #define HW_CMPD_RING_SIZE (sizeof(struct tx_cmp) * CP_DESC_CNT) 201 #define BNGE_MAX_RX_DESC_CNT (RX_DESC_CNT * MAX_RX_PAGES - 1) 202 #define BNGE_MAX_RX_DESC_CNT_JUM_ENA (RX_DESC_CNT * MAX_RX_PAGES_AGG_ENA - 1) 203 #define BNGE_MAX_RX_JUM_DESC_CNT (RX_DESC_CNT * MAX_RX_AGG_PAGES - 1) 204 #define BNGE_MAX_TX_DESC_CNT (TX_DESC_CNT * MAX_TX_PAGES - 1) 205 206 #endif /* _BNGE_NETDEV_H_ */ 207