xref: /linux/drivers/iio/magnetometer/bmc150_magn.c (revision 0d5ec7919f3747193f051036b2301734a4b5e1d6)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Bosch BMC150 three-axis magnetic field sensor driver
4  *
5  * Copyright (c) 2015, Intel Corporation.
6  *
7  * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
8  *
9  * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
10  */
11 
12 #include <linux/module.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
17 #include <linux/pm.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/events.h>
23 #include <linux/iio/trigger.h>
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
26 #include <linux/regmap.h>
27 #include <linux/regulator/consumer.h>
28 
29 #include "bmc150_magn.h"
30 
31 #define BMC150_MAGN_REG_CHIP_ID			0x40
32 #define BMC150_MAGN_CHIP_ID_VAL			0x32
33 
34 #define BMC150_MAGN_REG_X_L			0x42
35 #define BMC150_MAGN_REG_X_M			0x43
36 #define BMC150_MAGN_REG_Y_L			0x44
37 #define BMC150_MAGN_REG_Y_M			0x45
38 #define BMC150_MAGN_SHIFT_XY_L			3
39 #define BMC150_MAGN_REG_Z_L			0x46
40 #define BMC150_MAGN_REG_Z_M			0x47
41 #define BMC150_MAGN_SHIFT_Z_L			1
42 #define BMC150_MAGN_REG_RHALL_L			0x48
43 #define BMC150_MAGN_REG_RHALL_M			0x49
44 #define BMC150_MAGN_SHIFT_RHALL_L		2
45 
46 #define BMC150_MAGN_REG_INT_STATUS		0x4A
47 
48 #define BMC150_MAGN_REG_POWER			0x4B
49 #define BMC150_MAGN_MASK_POWER_CTL		BIT(0)
50 
51 #define BMC150_MAGN_REG_OPMODE_ODR		0x4C
52 #define BMC150_MAGN_MASK_OPMODE			GENMASK(2, 1)
53 #define BMC150_MAGN_SHIFT_OPMODE		1
54 #define BMC150_MAGN_MODE_NORMAL			0x00
55 #define BMC150_MAGN_MODE_FORCED			0x01
56 #define BMC150_MAGN_MODE_SLEEP			0x03
57 #define BMC150_MAGN_MASK_ODR			GENMASK(5, 3)
58 #define BMC150_MAGN_SHIFT_ODR			3
59 
60 #define BMC150_MAGN_REG_INT			0x4D
61 
62 #define BMC150_MAGN_REG_INT_DRDY		0x4E
63 #define BMC150_MAGN_MASK_DRDY_EN		BIT(7)
64 #define BMC150_MAGN_SHIFT_DRDY_EN		7
65 #define BMC150_MAGN_MASK_DRDY_INT3		BIT(6)
66 #define BMC150_MAGN_MASK_DRDY_Z_EN		BIT(5)
67 #define BMC150_MAGN_MASK_DRDY_Y_EN		BIT(4)
68 #define BMC150_MAGN_MASK_DRDY_X_EN		BIT(3)
69 #define BMC150_MAGN_MASK_DRDY_DR_POLARITY	BIT(2)
70 #define BMC150_MAGN_MASK_DRDY_LATCHING		BIT(1)
71 #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY	BIT(0)
72 
73 #define BMC150_MAGN_REG_LOW_THRESH		0x4F
74 #define BMC150_MAGN_REG_HIGH_THRESH		0x50
75 #define BMC150_MAGN_REG_REP_XY			0x51
76 #define BMC150_MAGN_REG_REP_Z			0x52
77 #define BMC150_MAGN_REG_REP_DATAMASK		GENMASK(7, 0)
78 
79 #define BMC150_MAGN_REG_TRIM_START		0x5D
80 #define BMC150_MAGN_REG_TRIM_END		0x71
81 
82 #define BMC150_MAGN_XY_OVERFLOW_VAL		-4096
83 #define BMC150_MAGN_Z_OVERFLOW_VAL		-16384
84 
85 /* Time from SUSPEND to SLEEP */
86 #define BMC150_MAGN_START_UP_TIME_MS		3
87 
88 #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS	2000
89 
90 #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
91 #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
92 #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
93 #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
94 
95 enum bmc150_magn_axis {
96 	AXIS_X,
97 	AXIS_Y,
98 	AXIS_Z,
99 	RHALL,
100 	AXIS_XYZ_MAX = RHALL,
101 	AXIS_XYZR_MAX,
102 };
103 
104 enum bmc150_magn_power_modes {
105 	BMC150_MAGN_POWER_MODE_SUSPEND,
106 	BMC150_MAGN_POWER_MODE_SLEEP,
107 	BMC150_MAGN_POWER_MODE_NORMAL,
108 };
109 
110 struct bmc150_magn_trim_regs {
111 	s8 x1;
112 	s8 y1;
113 	__le16 reserved1;
114 	u8 reserved2;
115 	__le16 z4;
116 	s8 x2;
117 	s8 y2;
118 	__le16 reserved3;
119 	__le16 z2;
120 	__le16 z1;
121 	__le16 xyz1;
122 	__le16 z3;
123 	s8 xy2;
124 	u8 xy1;
125 } __packed;
126 
127 struct bmc150_magn_data {
128 	struct device *dev;
129 	/*
130 	 * 1. Protect this structure.
131 	 * 2. Serialize sequences that power on/off the device and access HW.
132 	 */
133 	struct mutex mutex;
134 	struct regmap *regmap;
135 	struct regulator_bulk_data regulators[2];
136 	struct iio_mount_matrix orientation;
137 	/* Ensure timestamp is naturally aligned */
138 	struct {
139 		s32 chans[3];
140 		aligned_s64 timestamp;
141 	} scan;
142 	struct iio_trigger *dready_trig;
143 	bool dready_trigger_on;
144 	int max_odr;
145 	int irq;
146 };
147 
148 static const struct {
149 	int freq;
150 	u8 reg_val;
151 } bmc150_magn_samp_freq_table[] = { {2, 0x01},
152 				    {6, 0x02},
153 				    {8, 0x03},
154 				    {10, 0x00},
155 				    {15, 0x04},
156 				    {20, 0x05},
157 				    {25, 0x06},
158 				    {30, 0x07} };
159 
160 enum bmc150_magn_presets {
161 	LOW_POWER_PRESET,
162 	REGULAR_PRESET,
163 	ENHANCED_REGULAR_PRESET,
164 	HIGH_ACCURACY_PRESET
165 };
166 
167 static const struct bmc150_magn_preset {
168 	u8 rep_xy;
169 	u8 rep_z;
170 	u8 odr;
171 } bmc150_magn_presets_table[] = {
172 	[LOW_POWER_PRESET] = {3, 3, 10},
173 	[REGULAR_PRESET] =  {9, 15, 10},
174 	[ENHANCED_REGULAR_PRESET] =  {15, 27, 10},
175 	[HIGH_ACCURACY_PRESET] =  {47, 83, 20},
176 };
177 
178 #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
179 
bmc150_magn_is_writeable_reg(struct device * dev,unsigned int reg)180 static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
181 {
182 	switch (reg) {
183 	case BMC150_MAGN_REG_POWER:
184 	case BMC150_MAGN_REG_OPMODE_ODR:
185 	case BMC150_MAGN_REG_INT:
186 	case BMC150_MAGN_REG_INT_DRDY:
187 	case BMC150_MAGN_REG_LOW_THRESH:
188 	case BMC150_MAGN_REG_HIGH_THRESH:
189 	case BMC150_MAGN_REG_REP_XY:
190 	case BMC150_MAGN_REG_REP_Z:
191 		return true;
192 	default:
193 		return false;
194 	}
195 }
196 
bmc150_magn_is_volatile_reg(struct device * dev,unsigned int reg)197 static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
198 {
199 	switch (reg) {
200 	case BMC150_MAGN_REG_X_L:
201 	case BMC150_MAGN_REG_X_M:
202 	case BMC150_MAGN_REG_Y_L:
203 	case BMC150_MAGN_REG_Y_M:
204 	case BMC150_MAGN_REG_Z_L:
205 	case BMC150_MAGN_REG_Z_M:
206 	case BMC150_MAGN_REG_RHALL_L:
207 	case BMC150_MAGN_REG_RHALL_M:
208 	case BMC150_MAGN_REG_INT_STATUS:
209 		return true;
210 	default:
211 		return false;
212 	}
213 }
214 
215 const struct regmap_config bmc150_magn_regmap_config = {
216 	.reg_bits = 8,
217 	.val_bits = 8,
218 
219 	.max_register = BMC150_MAGN_REG_TRIM_END,
220 	.cache_type = REGCACHE_RBTREE,
221 
222 	.writeable_reg = bmc150_magn_is_writeable_reg,
223 	.volatile_reg = bmc150_magn_is_volatile_reg,
224 };
225 EXPORT_SYMBOL_NS(bmc150_magn_regmap_config, "IIO_BMC150_MAGN");
226 
bmc150_magn_set_power_mode(struct bmc150_magn_data * data,enum bmc150_magn_power_modes mode,bool state)227 static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
228 				      enum bmc150_magn_power_modes mode,
229 				      bool state)
230 {
231 	int ret;
232 
233 	switch (mode) {
234 	case BMC150_MAGN_POWER_MODE_SUSPEND:
235 		ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
236 					 BMC150_MAGN_MASK_POWER_CTL, !state);
237 		if (ret < 0)
238 			return ret;
239 		usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
240 		return 0;
241 	case BMC150_MAGN_POWER_MODE_SLEEP:
242 		return regmap_update_bits(data->regmap,
243 					  BMC150_MAGN_REG_OPMODE_ODR,
244 					  BMC150_MAGN_MASK_OPMODE,
245 					  BMC150_MAGN_MODE_SLEEP <<
246 					  BMC150_MAGN_SHIFT_OPMODE);
247 	case BMC150_MAGN_POWER_MODE_NORMAL:
248 		return regmap_update_bits(data->regmap,
249 					  BMC150_MAGN_REG_OPMODE_ODR,
250 					  BMC150_MAGN_MASK_OPMODE,
251 					  BMC150_MAGN_MODE_NORMAL <<
252 					  BMC150_MAGN_SHIFT_OPMODE);
253 	}
254 
255 	return -EINVAL;
256 }
257 
bmc150_magn_set_power_state(struct bmc150_magn_data * data,bool on)258 static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
259 {
260 #ifdef CONFIG_PM
261 	int ret;
262 
263 	if (on) {
264 		ret = pm_runtime_resume_and_get(data->dev);
265 	} else {
266 		pm_runtime_mark_last_busy(data->dev);
267 		ret = pm_runtime_put_autosuspend(data->dev);
268 	}
269 
270 	if (ret < 0) {
271 		dev_err(data->dev,
272 			"failed to change power state to %d\n", on);
273 		return ret;
274 	}
275 #endif
276 
277 	return 0;
278 }
279 
bmc150_magn_get_odr(struct bmc150_magn_data * data,int * val)280 static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
281 {
282 	int ret, reg_val;
283 	u8 i, odr_val;
284 
285 	ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
286 	if (ret < 0)
287 		return ret;
288 	odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
289 
290 	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
291 		if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
292 			*val = bmc150_magn_samp_freq_table[i].freq;
293 			return 0;
294 		}
295 
296 	return -EINVAL;
297 }
298 
bmc150_magn_set_odr(struct bmc150_magn_data * data,int val)299 static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
300 {
301 	int ret;
302 	u8 i;
303 
304 	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
305 		if (bmc150_magn_samp_freq_table[i].freq == val) {
306 			ret = regmap_update_bits(data->regmap,
307 						 BMC150_MAGN_REG_OPMODE_ODR,
308 						 BMC150_MAGN_MASK_ODR,
309 						 bmc150_magn_samp_freq_table[i].
310 						 reg_val <<
311 						 BMC150_MAGN_SHIFT_ODR);
312 			if (ret < 0)
313 				return ret;
314 			return 0;
315 		}
316 	}
317 
318 	return -EINVAL;
319 }
320 
bmc150_magn_set_max_odr(struct bmc150_magn_data * data,int rep_xy,int rep_z,int odr)321 static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
322 				   int rep_z, int odr)
323 {
324 	int ret, reg_val, max_odr;
325 
326 	if (rep_xy <= 0) {
327 		ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
328 				  &reg_val);
329 		if (ret < 0)
330 			return ret;
331 		rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
332 	}
333 	if (rep_z <= 0) {
334 		ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
335 				  &reg_val);
336 		if (ret < 0)
337 			return ret;
338 		rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
339 	}
340 	if (odr <= 0) {
341 		ret = bmc150_magn_get_odr(data, &odr);
342 		if (ret < 0)
343 			return ret;
344 	}
345 	/* the maximum selectable read-out frequency from datasheet */
346 	max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
347 	if (odr > max_odr) {
348 		dev_err(data->dev,
349 			"Can't set oversampling with sampling freq %d\n",
350 			odr);
351 		return -EINVAL;
352 	}
353 	data->max_odr = max_odr;
354 
355 	return 0;
356 }
357 
bmc150_magn_compensate_x(struct bmc150_magn_trim_regs * tregs,s16 x,u16 rhall)358 static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
359 				    u16 rhall)
360 {
361 	s16 val;
362 	u16 xyz1 = le16_to_cpu(tregs->xyz1);
363 
364 	if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
365 		return S32_MIN;
366 
367 	if (!rhall)
368 		rhall = xyz1;
369 
370 	val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
371 	val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
372 	      ((s32)val)) >> 7)) + (((s32)val) *
373 	      ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
374 	      ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
375 	      (((s16)tregs->x1) << 3);
376 
377 	return (s32)val;
378 }
379 
bmc150_magn_compensate_y(struct bmc150_magn_trim_regs * tregs,s16 y,u16 rhall)380 static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
381 				    u16 rhall)
382 {
383 	s16 val;
384 	u16 xyz1 = le16_to_cpu(tregs->xyz1);
385 
386 	if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
387 		return S32_MIN;
388 
389 	if (!rhall)
390 		rhall = xyz1;
391 
392 	val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
393 	val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
394 	      ((s32)val)) >> 7)) + (((s32)val) *
395 	      ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
396 	      ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
397 	      (((s16)tregs->y1) << 3);
398 
399 	return (s32)val;
400 }
401 
bmc150_magn_compensate_z(struct bmc150_magn_trim_regs * tregs,s16 z,u16 rhall)402 static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
403 				    u16 rhall)
404 {
405 	s32 val;
406 	u16 xyz1 = le16_to_cpu(tregs->xyz1);
407 	u16 z1 = le16_to_cpu(tregs->z1);
408 	s16 z2 = le16_to_cpu(tregs->z2);
409 	s16 z3 = le16_to_cpu(tregs->z3);
410 	s16 z4 = le16_to_cpu(tregs->z4);
411 
412 	if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
413 		return S32_MIN;
414 
415 	val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
416 	      ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
417 	      ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
418 
419 	return val;
420 }
421 
bmc150_magn_read_xyz(struct bmc150_magn_data * data,s32 * buffer)422 static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
423 {
424 	int ret;
425 	__le16 values[AXIS_XYZR_MAX];
426 	s16 raw_x, raw_y, raw_z;
427 	u16 rhall;
428 	struct bmc150_magn_trim_regs tregs;
429 
430 	ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
431 			       values, sizeof(values));
432 	if (ret < 0)
433 		return ret;
434 
435 	raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
436 	raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
437 	raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
438 	rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
439 
440 	ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
441 			       &tregs, sizeof(tregs));
442 	if (ret < 0)
443 		return ret;
444 
445 	buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
446 	buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
447 	buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
448 
449 	return 0;
450 }
451 
bmc150_magn_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)452 static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
453 				struct iio_chan_spec const *chan,
454 				int *val, int *val2, long mask)
455 {
456 	struct bmc150_magn_data *data = iio_priv(indio_dev);
457 	int ret, tmp;
458 	s32 values[AXIS_XYZ_MAX];
459 
460 	switch (mask) {
461 	case IIO_CHAN_INFO_RAW:
462 		if (iio_buffer_enabled(indio_dev))
463 			return -EBUSY;
464 		mutex_lock(&data->mutex);
465 
466 		ret = bmc150_magn_set_power_state(data, true);
467 		if (ret < 0) {
468 			mutex_unlock(&data->mutex);
469 			return ret;
470 		}
471 
472 		ret = bmc150_magn_read_xyz(data, values);
473 		if (ret < 0) {
474 			bmc150_magn_set_power_state(data, false);
475 			mutex_unlock(&data->mutex);
476 			return ret;
477 		}
478 		*val = values[chan->scan_index];
479 
480 		ret = bmc150_magn_set_power_state(data, false);
481 		if (ret < 0) {
482 			mutex_unlock(&data->mutex);
483 			return ret;
484 		}
485 
486 		mutex_unlock(&data->mutex);
487 		return IIO_VAL_INT;
488 	case IIO_CHAN_INFO_SCALE:
489 		/*
490 		 * The API/driver performs an off-chip temperature
491 		 * compensation and outputs x/y/z magnetic field data in
492 		 * 16 LSB/uT to the upper application layer.
493 		 */
494 		*val = 0;
495 		*val2 = 625;
496 		return IIO_VAL_INT_PLUS_MICRO;
497 	case IIO_CHAN_INFO_SAMP_FREQ:
498 		ret = bmc150_magn_get_odr(data, val);
499 		if (ret < 0)
500 			return ret;
501 		return IIO_VAL_INT;
502 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
503 		switch (chan->channel2) {
504 		case IIO_MOD_X:
505 		case IIO_MOD_Y:
506 			ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
507 					  &tmp);
508 			if (ret < 0)
509 				return ret;
510 			*val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
511 			return IIO_VAL_INT;
512 		case IIO_MOD_Z:
513 			ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
514 					  &tmp);
515 			if (ret < 0)
516 				return ret;
517 			*val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
518 			return IIO_VAL_INT;
519 		default:
520 			return -EINVAL;
521 		}
522 	default:
523 		return -EINVAL;
524 	}
525 }
526 
bmc150_magn_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)527 static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
528 				 struct iio_chan_spec const *chan,
529 				 int val, int val2, long mask)
530 {
531 	struct bmc150_magn_data *data = iio_priv(indio_dev);
532 	int ret;
533 
534 	switch (mask) {
535 	case IIO_CHAN_INFO_SAMP_FREQ:
536 		if (val > data->max_odr)
537 			return -EINVAL;
538 		mutex_lock(&data->mutex);
539 		ret = bmc150_magn_set_odr(data, val);
540 		mutex_unlock(&data->mutex);
541 		return ret;
542 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
543 		switch (chan->channel2) {
544 		case IIO_MOD_X:
545 		case IIO_MOD_Y:
546 			if (val < 1 || val > 511)
547 				return -EINVAL;
548 			mutex_lock(&data->mutex);
549 			ret = bmc150_magn_set_max_odr(data, val, 0, 0);
550 			if (ret < 0) {
551 				mutex_unlock(&data->mutex);
552 				return ret;
553 			}
554 			ret = regmap_update_bits(data->regmap,
555 						 BMC150_MAGN_REG_REP_XY,
556 						 BMC150_MAGN_REG_REP_DATAMASK,
557 						 BMC150_MAGN_REPXY_TO_REGVAL
558 						 (val));
559 			mutex_unlock(&data->mutex);
560 			return ret;
561 		case IIO_MOD_Z:
562 			if (val < 1 || val > 256)
563 				return -EINVAL;
564 			mutex_lock(&data->mutex);
565 			ret = bmc150_magn_set_max_odr(data, 0, val, 0);
566 			if (ret < 0) {
567 				mutex_unlock(&data->mutex);
568 				return ret;
569 			}
570 			ret = regmap_update_bits(data->regmap,
571 						 BMC150_MAGN_REG_REP_Z,
572 						 BMC150_MAGN_REG_REP_DATAMASK,
573 						 BMC150_MAGN_REPZ_TO_REGVAL
574 						 (val));
575 			mutex_unlock(&data->mutex);
576 			return ret;
577 		default:
578 			return -EINVAL;
579 		}
580 	default:
581 		return -EINVAL;
582 	}
583 }
584 
bmc150_magn_show_samp_freq_avail(struct device * dev,struct device_attribute * attr,char * buf)585 static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
586 						struct device_attribute *attr,
587 						char *buf)
588 {
589 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
590 	struct bmc150_magn_data *data = iio_priv(indio_dev);
591 	size_t len = 0;
592 	u8 i;
593 
594 	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
595 		if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
596 			break;
597 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
598 				 bmc150_magn_samp_freq_table[i].freq);
599 	}
600 	/* replace last space with a newline */
601 	buf[len - 1] = '\n';
602 
603 	return len;
604 }
605 
606 static const struct iio_mount_matrix *
bmc150_magn_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)607 bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
608 			      const struct iio_chan_spec *chan)
609 {
610 	struct bmc150_magn_data *data = iio_priv(indio_dev);
611 
612 	return &data->orientation;
613 }
614 
615 static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
616 	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
617 	{ }
618 };
619 
620 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
621 
622 static struct attribute *bmc150_magn_attributes[] = {
623 	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
624 	NULL,
625 };
626 
627 static const struct attribute_group bmc150_magn_attrs_group = {
628 	.attrs = bmc150_magn_attributes,
629 };
630 
631 #define BMC150_MAGN_CHANNEL(_axis) {					\
632 	.type = IIO_MAGN,						\
633 	.modified = 1,							\
634 	.channel2 = IIO_MOD_##_axis,					\
635 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
636 			      BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),	\
637 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) |	\
638 				    BIT(IIO_CHAN_INFO_SCALE),		\
639 	.scan_index = AXIS_##_axis,					\
640 	.scan_type = {							\
641 		.sign = 's',						\
642 		.realbits = 32,						\
643 		.storagebits = 32,					\
644 		.endianness = IIO_LE					\
645 	},								\
646 	.ext_info = bmc150_magn_ext_info,				\
647 }
648 
649 static const struct iio_chan_spec bmc150_magn_channels[] = {
650 	BMC150_MAGN_CHANNEL(X),
651 	BMC150_MAGN_CHANNEL(Y),
652 	BMC150_MAGN_CHANNEL(Z),
653 	IIO_CHAN_SOFT_TIMESTAMP(3),
654 };
655 
656 static const struct iio_info bmc150_magn_info = {
657 	.attrs = &bmc150_magn_attrs_group,
658 	.read_raw = bmc150_magn_read_raw,
659 	.write_raw = bmc150_magn_write_raw,
660 };
661 
662 static const unsigned long bmc150_magn_scan_masks[] = {
663 					BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
664 					0};
665 
bmc150_magn_trigger_handler(int irq,void * p)666 static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
667 {
668 	struct iio_poll_func *pf = p;
669 	struct iio_dev *indio_dev = pf->indio_dev;
670 	struct bmc150_magn_data *data = iio_priv(indio_dev);
671 	int ret;
672 
673 	mutex_lock(&data->mutex);
674 	ret = bmc150_magn_read_xyz(data, data->scan.chans);
675 	if (ret < 0)
676 		goto err;
677 
678 	iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
679 				    pf->timestamp);
680 
681 err:
682 	mutex_unlock(&data->mutex);
683 	iio_trigger_notify_done(indio_dev->trig);
684 
685 	return IRQ_HANDLED;
686 }
687 
bmc150_magn_init(struct bmc150_magn_data * data)688 static int bmc150_magn_init(struct bmc150_magn_data *data)
689 {
690 	int ret, chip_id;
691 	struct bmc150_magn_preset preset;
692 
693 	ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
694 				    data->regulators);
695 	if (ret < 0) {
696 		dev_err(data->dev, "Failed to enable regulators: %d\n", ret);
697 		return ret;
698 	}
699 	/*
700 	 * 3ms power-on time according to datasheet, let's better
701 	 * be safe than sorry and set this delay to 5ms.
702 	 */
703 	msleep(5);
704 
705 	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
706 					 false);
707 	if (ret < 0) {
708 		dev_err(data->dev,
709 			"Failed to bring up device from suspend mode\n");
710 		goto err_regulator_disable;
711 	}
712 
713 	ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
714 	if (ret < 0) {
715 		dev_err(data->dev, "Failed reading chip id\n");
716 		goto err_poweroff;
717 	}
718 	if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
719 		dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
720 		ret = -ENODEV;
721 		goto err_poweroff;
722 	}
723 	dev_dbg(data->dev, "Chip id %x\n", chip_id);
724 
725 	preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
726 	ret = bmc150_magn_set_odr(data, preset.odr);
727 	if (ret < 0) {
728 		dev_err(data->dev, "Failed to set ODR to %d\n",
729 			preset.odr);
730 		goto err_poweroff;
731 	}
732 
733 	ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
734 			   BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
735 	if (ret < 0) {
736 		dev_err(data->dev, "Failed to set REP XY to %d\n",
737 			preset.rep_xy);
738 		goto err_poweroff;
739 	}
740 
741 	ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
742 			   BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
743 	if (ret < 0) {
744 		dev_err(data->dev, "Failed to set REP Z to %d\n",
745 			preset.rep_z);
746 		goto err_poweroff;
747 	}
748 
749 	ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
750 				      preset.odr);
751 	if (ret < 0)
752 		goto err_poweroff;
753 
754 	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
755 					 true);
756 	if (ret < 0) {
757 		dev_err(data->dev, "Failed to power on device\n");
758 		goto err_poweroff;
759 	}
760 
761 	return 0;
762 
763 err_poweroff:
764 	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
765 err_regulator_disable:
766 	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
767 	return ret;
768 }
769 
bmc150_magn_reset_intr(struct bmc150_magn_data * data)770 static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
771 {
772 	int tmp;
773 
774 	/*
775 	 * Data Ready (DRDY) is always cleared after
776 	 * readout of data registers ends.
777 	 */
778 	return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
779 }
780 
bmc150_magn_trig_reen(struct iio_trigger * trig)781 static void bmc150_magn_trig_reen(struct iio_trigger *trig)
782 {
783 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
784 	struct bmc150_magn_data *data = iio_priv(indio_dev);
785 	int ret;
786 
787 	if (!data->dready_trigger_on)
788 		return;
789 
790 	mutex_lock(&data->mutex);
791 	ret = bmc150_magn_reset_intr(data);
792 	mutex_unlock(&data->mutex);
793 	if (ret)
794 		dev_err(data->dev, "Failed to reset interrupt\n");
795 }
796 
bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)797 static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
798 						  bool state)
799 {
800 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
801 	struct bmc150_magn_data *data = iio_priv(indio_dev);
802 	int ret = 0;
803 
804 	mutex_lock(&data->mutex);
805 	if (state == data->dready_trigger_on)
806 		goto err_unlock;
807 
808 	ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
809 				 BMC150_MAGN_MASK_DRDY_EN,
810 				 state << BMC150_MAGN_SHIFT_DRDY_EN);
811 	if (ret < 0)
812 		goto err_unlock;
813 
814 	data->dready_trigger_on = state;
815 
816 	if (state) {
817 		ret = bmc150_magn_reset_intr(data);
818 		if (ret < 0)
819 			goto err_unlock;
820 	}
821 	mutex_unlock(&data->mutex);
822 
823 	return 0;
824 
825 err_unlock:
826 	mutex_unlock(&data->mutex);
827 	return ret;
828 }
829 
830 static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
831 	.set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
832 	.reenable = bmc150_magn_trig_reen,
833 };
834 
bmc150_magn_buffer_preenable(struct iio_dev * indio_dev)835 static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
836 {
837 	struct bmc150_magn_data *data = iio_priv(indio_dev);
838 
839 	return bmc150_magn_set_power_state(data, true);
840 }
841 
bmc150_magn_buffer_postdisable(struct iio_dev * indio_dev)842 static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
843 {
844 	struct bmc150_magn_data *data = iio_priv(indio_dev);
845 
846 	return bmc150_magn_set_power_state(data, false);
847 }
848 
849 static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
850 	.preenable = bmc150_magn_buffer_preenable,
851 	.postdisable = bmc150_magn_buffer_postdisable,
852 };
853 
bmc150_magn_probe(struct device * dev,struct regmap * regmap,int irq,const char * name)854 int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
855 		      int irq, const char *name)
856 {
857 	struct bmc150_magn_data *data;
858 	struct iio_dev *indio_dev;
859 	int ret;
860 
861 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
862 	if (!indio_dev)
863 		return -ENOMEM;
864 
865 	data = iio_priv(indio_dev);
866 	dev_set_drvdata(dev, indio_dev);
867 	data->regmap = regmap;
868 	data->irq = irq;
869 	data->dev = dev;
870 
871 	data->regulators[0].supply = "vdd";
872 	data->regulators[1].supply = "vddio";
873 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
874 				      data->regulators);
875 	if (ret)
876 		return dev_err_probe(dev, ret, "failed to get regulators\n");
877 
878 	ret = iio_read_mount_matrix(dev, &data->orientation);
879 	if (ret)
880 		return ret;
881 
882 	mutex_init(&data->mutex);
883 
884 	ret = bmc150_magn_init(data);
885 	if (ret < 0)
886 		return ret;
887 
888 	indio_dev->channels = bmc150_magn_channels;
889 	indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
890 	indio_dev->available_scan_masks = bmc150_magn_scan_masks;
891 	indio_dev->name = name;
892 	indio_dev->modes = INDIO_DIRECT_MODE;
893 	indio_dev->info = &bmc150_magn_info;
894 
895 	if (irq > 0) {
896 		data->dready_trig = devm_iio_trigger_alloc(dev,
897 							   "%s-dev%d",
898 							   indio_dev->name,
899 							   iio_device_id(indio_dev));
900 		if (!data->dready_trig) {
901 			ret = -ENOMEM;
902 			dev_err(dev, "iio trigger alloc failed\n");
903 			goto err_poweroff;
904 		}
905 
906 		data->dready_trig->ops = &bmc150_magn_trigger_ops;
907 		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
908 		ret = iio_trigger_register(data->dready_trig);
909 		if (ret) {
910 			dev_err(dev, "iio trigger register failed\n");
911 			goto err_poweroff;
912 		}
913 
914 		ret = request_threaded_irq(irq,
915 					   iio_trigger_generic_data_rdy_poll,
916 					   NULL,
917 					   IRQF_TRIGGER_RISING | IRQF_ONESHOT,
918 					   "bmc150_magn_event",
919 					   data->dready_trig);
920 		if (ret < 0) {
921 			dev_err(dev, "request irq %d failed\n", irq);
922 			goto err_trigger_unregister;
923 		}
924 	}
925 
926 	ret = iio_triggered_buffer_setup(indio_dev,
927 					 iio_pollfunc_store_time,
928 					 bmc150_magn_trigger_handler,
929 					 &bmc150_magn_buffer_setup_ops);
930 	if (ret < 0) {
931 		dev_err(dev, "iio triggered buffer setup failed\n");
932 		goto err_free_irq;
933 	}
934 
935 	ret = pm_runtime_set_active(dev);
936 	if (ret)
937 		goto err_buffer_cleanup;
938 
939 	pm_runtime_enable(dev);
940 	pm_runtime_set_autosuspend_delay(dev,
941 					 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
942 	pm_runtime_use_autosuspend(dev);
943 
944 	ret = iio_device_register(indio_dev);
945 	if (ret < 0) {
946 		dev_err(dev, "unable to register iio device\n");
947 		goto err_pm_cleanup;
948 	}
949 
950 	dev_dbg(dev, "Registered device %s\n", name);
951 	return 0;
952 
953 err_pm_cleanup:
954 	pm_runtime_dont_use_autosuspend(dev);
955 	pm_runtime_disable(dev);
956 err_buffer_cleanup:
957 	iio_triggered_buffer_cleanup(indio_dev);
958 err_free_irq:
959 	if (irq > 0)
960 		free_irq(irq, data->dready_trig);
961 err_trigger_unregister:
962 	if (data->dready_trig)
963 		iio_trigger_unregister(data->dready_trig);
964 err_poweroff:
965 	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
966 	return ret;
967 }
968 EXPORT_SYMBOL_NS(bmc150_magn_probe, "IIO_BMC150_MAGN");
969 
bmc150_magn_remove(struct device * dev)970 void bmc150_magn_remove(struct device *dev)
971 {
972 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
973 	struct bmc150_magn_data *data = iio_priv(indio_dev);
974 
975 	iio_device_unregister(indio_dev);
976 
977 	pm_runtime_disable(dev);
978 	pm_runtime_set_suspended(dev);
979 
980 	iio_triggered_buffer_cleanup(indio_dev);
981 
982 	if (data->irq > 0)
983 		free_irq(data->irq, data->dready_trig);
984 
985 	if (data->dready_trig)
986 		iio_trigger_unregister(data->dready_trig);
987 
988 	mutex_lock(&data->mutex);
989 	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
990 	mutex_unlock(&data->mutex);
991 
992 	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
993 }
994 EXPORT_SYMBOL_NS(bmc150_magn_remove, "IIO_BMC150_MAGN");
995 
996 #ifdef CONFIG_PM
bmc150_magn_runtime_suspend(struct device * dev)997 static int bmc150_magn_runtime_suspend(struct device *dev)
998 {
999 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1000 	struct bmc150_magn_data *data = iio_priv(indio_dev);
1001 	int ret;
1002 
1003 	mutex_lock(&data->mutex);
1004 	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1005 					 true);
1006 	mutex_unlock(&data->mutex);
1007 	if (ret < 0) {
1008 		dev_err(dev, "powering off device failed\n");
1009 		return ret;
1010 	}
1011 	return 0;
1012 }
1013 
1014 /*
1015  * Should be called with data->mutex held.
1016  */
bmc150_magn_runtime_resume(struct device * dev)1017 static int bmc150_magn_runtime_resume(struct device *dev)
1018 {
1019 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1020 	struct bmc150_magn_data *data = iio_priv(indio_dev);
1021 
1022 	return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1023 					  true);
1024 }
1025 #endif
1026 
1027 #ifdef CONFIG_PM_SLEEP
bmc150_magn_suspend(struct device * dev)1028 static int bmc150_magn_suspend(struct device *dev)
1029 {
1030 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1031 	struct bmc150_magn_data *data = iio_priv(indio_dev);
1032 	int ret;
1033 
1034 	mutex_lock(&data->mutex);
1035 	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1036 					 true);
1037 	mutex_unlock(&data->mutex);
1038 
1039 	return ret;
1040 }
1041 
bmc150_magn_resume(struct device * dev)1042 static int bmc150_magn_resume(struct device *dev)
1043 {
1044 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1045 	struct bmc150_magn_data *data = iio_priv(indio_dev);
1046 	int ret;
1047 
1048 	mutex_lock(&data->mutex);
1049 	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1050 					 true);
1051 	mutex_unlock(&data->mutex);
1052 
1053 	return ret;
1054 }
1055 #endif
1056 
1057 const struct dev_pm_ops bmc150_magn_pm_ops = {
1058 	SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1059 	SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1060 			   bmc150_magn_runtime_resume, NULL)
1061 };
1062 EXPORT_SYMBOL_NS(bmc150_magn_pm_ops, "IIO_BMC150_MAGN");
1063 
1064 MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1065 MODULE_LICENSE("GPL v2");
1066 MODULE_DESCRIPTION("BMC150 magnetometer core driver");
1067