xref: /linux/drivers/gpu/drm/amd/display/include/set_mode_types.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_SET_MODE_TYPES_H__
27 #define __DAL_SET_MODE_TYPES_H__
28 
29 #include "dc_types.h"
30 #include <linux/hdmi.h>
31 
32 /* Info frame packet status */
33 enum info_frame_flag {
34 	INFO_PACKET_PACKET_INVALID = 0,
35 	INFO_PACKET_PACKET_VALID = 1,
36 	INFO_PACKET_PACKET_RESET = 2,
37 	INFO_PACKET_PACKET_UPDATE_SCAN_TYPE = 8
38 };
39 
40 struct hdmi_info_frame_header {
41 	uint8_t info_frame_type;
42 	uint8_t version;
43 	uint8_t length;
44 };
45 
46 #pragma pack(push)
47 #pragma pack(1)
48 
49 struct info_packet_raw_data {
50 	uint8_t hb0;
51 	uint8_t hb1;
52 	uint8_t hb2;
53 	uint8_t sb[28]; /* sb0~sb27 */
54 };
55 
56 union hdmi_info_packet {
57 	struct avi_info_frame {
58 		struct hdmi_info_frame_header header;
59 
60 		uint8_t CHECK_SUM:8;
61 
62 		uint8_t S0_S1:2;
63 		uint8_t B0_B1:2;
64 		uint8_t A0:1;
65 		uint8_t Y0_Y1_Y2:3;
66 
67 		uint8_t R0_R3:4;
68 		uint8_t M0_M1:2;
69 		uint8_t C0_C1:2;
70 
71 		uint8_t SC0_SC1:2;
72 		uint8_t Q0_Q1:2;
73 		uint8_t EC0_EC2:3;
74 		uint8_t ITC:1;
75 
76 		uint8_t VIC0_VIC7:8;
77 
78 		uint8_t PR0_PR3:4;
79 		uint8_t CN0_CN1:2;
80 		uint8_t YQ0_YQ1:2;
81 
82 		uint16_t bar_top;
83 		uint16_t bar_bottom;
84 		uint16_t bar_left;
85 		uint16_t bar_right;
86 
87 		uint8_t FR0_FR3:4;
88 		uint8_t ACE0_ACE3:4;
89 
90 		uint8_t RID0_RID5:6;
91 		uint8_t FR4:1;
92 		uint8_t F157:1;
93 
94 		uint8_t reserved[12];
95 	} bits;
96 
97 	struct info_packet_raw_data packet_raw_data;
98 };
99 
100 #pragma pack(pop)
101 
102 #endif /* __DAL_SET_MODE_TYPES_H__ */
103