| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 154 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
251 Register AddrReg = MI.getOperand(2).getReg(); doMaskedAtomicBinOpExpansion() local
399 Register AddrReg = MI.getOperand(3).getReg(); expandAtomicMinMaxOp() local
521 Register AddrReg = MI.getOperand(2).getReg(); expandAtomicCmpXchg() local
[all...] |
| H A D | LoongArchExpandPseudoInsts.cpp | 722 Register AddrReg = IsTailCall ? LoongArch::R19 : LoongArch::R1; in expandFunctionCALL() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask()
114 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 242 Register AddrReg = MI.getOperand(2).getReg(); doAtomicBinOpExpansion() local
304 Register AddrReg = MI.getOperand(2).getReg(); doMaskedAtomicBinOpExpansion() local
444 Register AddrReg = MI.getOperand(3).getReg(); expandAtomicMinMaxOp() local
608 Register AddrReg = MI.getOperand(2).getReg(); expandAtomicCmpXchg() local
[all...] |
| H A D | RISCVAsmPrinter.cpp | 379 const MachineOperand &AddrReg = MI->getOperand(OpNo); in PrintAsmMemoryOperand() local
531 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
178 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 179 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
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| H A D | PPCInstructionSelector.cpp | 750 Register AddrReg = I.getOperand(1).getReg(); in select() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 247 Register AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local
327 Register AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
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| H A D | AArch64SIMDInstrOpt.cpp | 507 unsigned SeqReg, AddrReg; optimizeLdStInterleave() local
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| H A D | AArch64FastISel.cpp | 2056 unsigned AddrReg, in emitStoreRelease()
2196 Register AddrReg = getRegForValue(PtrV); in selectStore() local
2515 Register AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
5073 const Register AddrReg = constrainOperandRegClass( in selectAtomicCmpXchg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| H A D | X86SpeculativeLoadHardening.cpp | 1160 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
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| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 103 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| H A D | X86InstructionSelector.cpp | 1540 Register AddrReg = MRI.createVirtualRegister(&X86::GR64RegClass); in materializeFP() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| H A D | ARMExpandPseudoInsts.cpp | 1819 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local
1949 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP_64() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 121 const MachineOperand *AddrReg[MaxAddressRegs]; member
1296 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() local
1371 const MachineOperand *AddrReg = in mergeWrite2Pair() local
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| H A D | R600InstrInfo.cpp | 1097 unsigned AddrReg; in buildIndirectWrite() local
1129 unsigned AddrReg; in buildIndirectRead() local
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| H A D | AMDGPUCallLowering.cpp | 114 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 153 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress() local
275 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 239 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 82 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
|